DE4100865A1 - Use of reactive substrate in thick film resistor mfr. - has thick dielectric layer acting as adhesion promoter and insulating layer, between resistor layer and substrate - Google Patents
Use of reactive substrate in thick film resistor mfr. - has thick dielectric layer acting as adhesion promoter and insulating layer, between resistor layer and substrateInfo
- Publication number
- DE4100865A1 DE4100865A1 DE19914100865 DE4100865A DE4100865A1 DE 4100865 A1 DE4100865 A1 DE 4100865A1 DE 19914100865 DE19914100865 DE 19914100865 DE 4100865 A DE4100865 A DE 4100865A DE 4100865 A1 DE4100865 A1 DE 4100865A1
- Authority
- DE
- Germany
- Prior art keywords
- layer
- resistor
- substrate
- dielectric layer
- conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
- H01C17/065—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thick film techniques, e.g. serigraphy
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0175—Inorganic, non-metallic layer, e.g. resist or dielectric for printed capacitor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1453—Applying the circuit pattern before another process, e.g. before filling of vias with conductive paste, before making printed resistors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Abstract
Description
Die Erfindung bezieht sich auf eine Schichtschaltung mit Lei terstrukturen und Widerständen in Dickschichttechnik auf kera mischen Substratmaterialien, soweit diese nicht auf der Basis von Aluminiumoxid aufgebaut sind.The invention relates to a layer circuit with Lei ter structures and resistors in thick-film technology on kera mix substrate materials, if not based on them are built up of aluminum oxide.
Schichtschaltungen in Dickschichttechnik (Ag/Pd-, Au/Pd- und andere, unter Luft einzubrennende Pastensysteme sowie Cu-Pa stensysteme) auf den oben genannten Substratmaterialien, insbe sondere Yttrium-Eisen-Granat- und Ferrit-Materialien, werden üblicherweise mit Chipwiderständen hergestellt, da Widerstands pasten entweder mit dem Substratmaterial reagieren oder aber nicht mit Lasern abgleichbar sind (Aluminiumnitrid-Substrate zersetzen sich beim Laserabgleich unter Ausbildung einer lei tenden Al-Schicht). Eine Integration von Schichtwiderständen ist somit in Schichtschaltungen in Dickschichttechnik auf der artigen Materialien nicht möglich.Layer circuits in thick film technology (Ag / Pd, Au / Pd and other paste systems to be burned in air as well as Cu-Pa systems) on the above-mentioned substrate materials, esp special yttrium iron garnet and ferrite materials usually made with chip resistors because of resistance pastes either react with the substrate material or cannot be compared with lasers (aluminum nitride substrates decompose during laser adjustment to form a lei Al layer). An integration of film resistors is thus in thick-film technology on the like materials not possible.
Für Frequenzen, bei denen die parasitären Reaktanzen (Indukti vitäten, Kapazitäten) der Chipwiderstände untragbar sind, müs sen Schichtschaltungen auf nichtkeramischen Materialien entwe der komplett in Dünnfilmtechnik gefertigt oder der integrierte Widerstand als getrennte Schaltung auf Aluminiumoxidkeramik realisiert werden. Die letztgenannte Variante erfordert einen zusätzlichen Hybridiervorgang, d. h. Aufbringen einer Bondver bindung zwischen Dickschicht- und Dünnfilmschaltung, sowie den Aufbau der beiden Komponenten auf einer zusätzlichen Träger platte. Die Trägerplatte wiederum erfordert einen größeren Platz in der übergeordneten Baugruppe. Beide Verfahren sind somit sehr kostenintensiv.For frequencies at which the parasitic reactances (Indukti vities, capacities) of chip resistors are intolerable layer circuits on non-ceramic materials the completely manufactured in thin film technology or the integrated Resistor as a separate circuit on aluminum oxide ceramic will be realized. The latter variant requires one additional hybridization process, d. H. Applying a bondver bond between thick film and thin film circuit, as well as the Structure of the two components on an additional carrier plate. The carrier plate in turn requires a larger one Space in the parent assembly. Both procedures are therefore very expensive.
Der Erfindung liegt die Aufgabe zugrunde, für eine Schichtschal tung der eingangs genannten Art eine Lösung zu schaffen, mit der die Widerstände in einfacher Weise integriert werden.The invention is based, for a layered scarf device of the type mentioned at the beginning to create a solution with which the resistors are integrated in a simple manner.
Diese Aufgabe wird gemäß der Erfindung gelöst durch eine als Haft- und Isolierschicht dienende Dielektrikumsschicht zwischen dem Substratmaterial und den aus Widerstandsschichten bestehen den integrierten Widerständen. Diese Isolierschicht verhindert die Reaktion der Widerstandspaste mit dem Substratmaterial beim Einbrand. Sie wird als erste Schicht vor dem Druck der Leiter bahnen und eventuellen Überkreuzungen aufgebracht und einge brannt.This object is achieved according to the invention by a Adhesive and insulating layer serving dielectric layer between the substrate material and consist of resistance layers the integrated resistors. This insulating layer prevents the reaction of the resistance paste with the substrate material during Branding. It is the first layer before the ladder is printed tracks and possible crossings applied and switched on burns.
Bei einem Verfahren zur Herstellung einer solchen Schichtschal tung wird zunächst eine Dielektrikumsschicht in Siebdrucktech nik auf dem Substratmaterial aufgebracht und eingebrannt, an schließend eine Leiterbahnschicht sowie gegebenenfalls erfor derliche weitere Schichten aufgedruckt und eingebrannt und da nach der Druck der Widerstandsschicht(en) mit einem geeigneten Sieb und der Einbrand der Widerstandsschicht(en) vorgenommen. Dieses Verfahren ermöglicht die Herstellung integrierter Wider stände in Dickschichttechnik in Schichtschaltungen auf verschie denen keramischen Substratmaterialien (z. B. Granat, Ferrit, Alu miniumnitrid). Dies gilt sowohl für Pastensysteme, die in Luft, als auch solche, die in Stickstoff eingebrannt werden.In a method for producing such a layered scarf The first step is a dielectric layer using screen printing technology nik applied and baked on the substrate material finally a conductor track layer and possibly necessary other layers printed and baked and there after printing the resistance layer (s) with a suitable one Sieve and penetration of the resistance layer (s) made. This process enables the production of integrated resistors stands in thick film technology in layer circuits on different those ceramic substrate materials (e.g. garnet, ferrite, aluminum minium nitride). This applies to paste systems that are in the air, as well as those that are burned in nitrogen.
Vorteilhafte Ausgestaltungen und Weiterbildungen des Erfin dungsgegenstandes sind in den Unteransprüchen 3 und 4 angege ben.Advantageous refinements and developments of the Erfin subject matter are specified in subclaims 3 and 4 ben.
Nachstehend wird die Erfindung anhand eines in der Zeichnung dargestellten Ausführungsbeispiels näher erläutert.The invention based on one in the drawing illustrated embodiment explained in more detail.
Die Fig. 1 und 2 zeigen die einzelnen Verfahrensschritte bei der Herstellung eines integrierten Widerstandes mit einem Ag/ Pd-Pastensystem auf Granatsubstrat. Dabei erfolgt zunächst der Druck einer Dielektrikumsschicht 2 mit einem geeigneten Sieb auf das Substratmaterial 1 und der Einbrand der Dielektrikums schicht 2. Danach wird eine Leiterbahnschicht 3 aufgedruckt - Fig. 1 zeigt das eingebrannte Dielektrikum 2 und die gedruckte Leiterbahnschicht 3. Nach dem Druck und Einbrand der Leiter bahnschicht 3 sowie aller weiteren gegebenenfalls erforderli chen Schichten (z. B. Leiterbahnen und Dielektrika für Multi layer-Anwendungen) erfolgt der Druck der Widerstandsschicht(en) 4 mit einem geeigneten Sieb. Dieser Verfahrenszustand von ein gebranntem Dielektrikum 2 und eingebrannter Leiterbahn 3 und aufgedrucktem Widerstand 4 ist in Fig. 2 dargestellt. Mit dem nachfolgenden Einbrand der Widerstandsschicht(en) 4 ist die Schaltung fertig. Anschließend kann die Herstellung von Abdeck schichten (Überglasung, Schutzlack) sowie gegebenenfalls eine Oberflächenveredelung durch chemisches oder galvanisches Ver golden erfolgen. Figs. 1 and 2 show the individual steps in the preparation of an integrated resistor with a Ag / Pd paste system garnet substrate. Initially occurs, the pressure of a dielectric layer 2 with a suitable sieve to the substrate material 1 and the penetration of the dielectric layer. 2 A conductor layer 3 is then printed on - FIG. 1 shows the baked dielectric 2 and the printed conductor layer 3 . After the printing and firing of the conductor layer 3 and all other layers that may be required (e.g. conductor tracks and dielectrics for multi-layer applications), the resistance layer (s) 4 is printed with a suitable screen. This process state of a fired dielectric 2 and a burned-in conductor track 3 and printed resistor 4 is shown in FIG. 2. The circuit is finished with the subsequent firing of the resistance layer (s) 4 . Subsequently, the production of cover layers (over-glazing, protective lacquer) and, if necessary, a surface refinement by chemical or galvanic gold can take place.
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19914100865 DE4100865A1 (en) | 1991-01-14 | 1991-01-14 | Use of reactive substrate in thick film resistor mfr. - has thick dielectric layer acting as adhesion promoter and insulating layer, between resistor layer and substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19914100865 DE4100865A1 (en) | 1991-01-14 | 1991-01-14 | Use of reactive substrate in thick film resistor mfr. - has thick dielectric layer acting as adhesion promoter and insulating layer, between resistor layer and substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
DE4100865A1 true DE4100865A1 (en) | 1992-07-16 |
Family
ID=6422971
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19914100865 Ceased DE4100865A1 (en) | 1991-01-14 | 1991-01-14 | Use of reactive substrate in thick film resistor mfr. - has thick dielectric layer acting as adhesion promoter and insulating layer, between resistor layer and substrate |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE4100865A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4234022A1 (en) * | 1992-10-09 | 1994-04-14 | Telefunken Microelectron | Layered circuit with power resistor(s) - has extra ceramic carrier layer in heat conductive contact with power resistor |
DE10042764A1 (en) * | 2000-08-31 | 2002-03-14 | Moeller Gmbh | Process for the production of a massive ohmic resistance and electronic assembly |
DE102014110164B4 (en) | 2014-05-02 | 2022-11-03 | Borgwarner Ludwigsburg Gmbh | Process for manufacturing a heating rod |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2321985A1 (en) * | 1972-05-05 | 1973-11-15 | Hewlett Packard Co | METHOD FOR MANUFACTURING THICK-FILM RESISTORS |
US3909680A (en) * | 1973-02-16 | 1975-09-30 | Matsushita Electric Ind Co Ltd | Printed circuit board with silver migration prevention |
-
1991
- 1991-01-14 DE DE19914100865 patent/DE4100865A1/en not_active Ceased
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2321985A1 (en) * | 1972-05-05 | 1973-11-15 | Hewlett Packard Co | METHOD FOR MANUFACTURING THICK-FILM RESISTORS |
US3909680A (en) * | 1973-02-16 | 1975-09-30 | Matsushita Electric Ind Co Ltd | Printed circuit board with silver migration prevention |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4234022A1 (en) * | 1992-10-09 | 1994-04-14 | Telefunken Microelectron | Layered circuit with power resistor(s) - has extra ceramic carrier layer in heat conductive contact with power resistor |
DE10042764A1 (en) * | 2000-08-31 | 2002-03-14 | Moeller Gmbh | Process for the production of a massive ohmic resistance and electronic assembly |
US6995984B2 (en) | 2000-08-31 | 2006-02-07 | Moeller Gmbh | Method for producing a large-mass ohmic resistor for protecting electronic assemblies from surges, and an electronic assembly |
DE102014110164B4 (en) | 2014-05-02 | 2022-11-03 | Borgwarner Ludwigsburg Gmbh | Process for manufacturing a heating rod |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
8131 | Rejection |