DE4003460A1 - Power amplifier with negligible phase twist - has differential amplifier replaced by device with two outputs, first one controlling current source - Google Patents

Abstract

The differential amplifier with only one output is replaced by a device with two outputs, with first one controlling the first current source (Q1), when the collector current (iE) of an upon transistor is below a reference value (IC). The second output controls a second current source (Q2) between a plus pole (1) of the voltage source and the output (A) of the power amplifier. The seconnd output is activated, when the collector current exceeds the reference value. The ratios of the second source current and the excess above the reference voltage are specified, and the ratio between the max. and min. value of the collector current is kept small by a sufficient reference value. USE/ADVANTAGE - For measuring and LF power techniques, with low voltage drop of load current.

Description

The invention relates to a method for a power amplifier with low phase shift, especially for a variable inductive load according to the preamble of claim 1 and a circuit for such a power amplifier according to the Preamble of claim 2.

The complementary emitter follower has relative due to its high efficiency is of great importance as a power amplifier acquired. However, there is a serious shortcoming in the insufficient linearity of its transmission characteristic. The transmission characteristic of the complementary emitter follower is through the line operation is linearized (Tietze / Schenk, semiconductor circuit technology, 5th edition, Springer-Verlag Berlin, Heidelberg, New York 1980, page 349).

In the case of a complementary emitter follower in AB operation, the Quiescent current can be stabilized to the effect of thermal Suppress positive feedback.

A very simple and reliable measure for this is in current feedback through emitter resistors.

However, the load current creates these emitter resistors an additional voltage drop that is not due to negative feedback can be compensated (using a preamplifier) if it is an inductive load.

Without an emitter resistor, this error is reduced to Amount caused by the voltage drop across the differential resistor the base-emitter diode of the respective conductive transistor is caused.

In DE-OS 37 27 248 a power amplifier is shown that reacts to inductive loads practically without errors, although it also emitter resistors to stabilize the quiescent current contains. Another problem is the phase shift of one Power amplifier, especially with stronger capacitive Burden as it occurs when the consumer enters a  has a longer connection cable. If the power amplifier in including the negative feedback loop of an operational amplifier, reduces the additional phase shift of the power amplifier the phase safety of the operational amplifier circuit with given compensation. The additional phase shift can be compensated with the help of a fast feedback loop if the capacitive load is reasonably constant ist (Dostál, operational amplifier, Verlag Technik Berlin 1986, P. 340).

However, this requirement is met with a variable number of individual Consumer with own connection cable not met. Since the maximum capacitive load must be compensated for reduced load always overcompensation.

At the typical transit frequency of a bipolar operational amplifier of 3 MHz, the phase shift is capacitive not neglect the complementary emitter follower what due to the unfavorable high-frequency properties of a pnp transistor.

This also applies to the power amplifier shown in DE-OS 37 27 248. The phase shift is simple Emitter follower with an npn transistor the complementary Consider emitter follower. The simple emitter follower is however characterized by low efficiency; in use a constant current source as load resistance, it is still under 25%.

Solutions are known (DE-OS 34 16 850, DE-PS 31 20 689, US-PS 45 73 021, US-PS 45 09 020), in which the input with the output of the power amplifier as with the simple emitter follower the base-emitter diode of a transistor is connected, and with which achieve a high level of efficiency. The load current causes but still one at a certain polarity Voltage drop across the differential resistance of the base-emitter diode between the input and the output of the amplifier, so that these solutions are not designed to produce a highly constant Output voltage are suitable for a variable inductive load. In addition, the non-linear current-voltage characteristic affects the base-emitter diode the linearity of the Transmission characteristic.  

A method and a circuit are to be created for a power amplifier with low phase shift and high Stability of the output voltage when switching on an inductive Load.

The invention solves the problem of a method for To create power amplifiers through which the load current only a very low voltage drop between the input terminal and the output terminal.

The power amplifier is intended as a current driver at the output of a bipolar operational amplifier with a typical transit frequency of 3 MHz and can be used under this condition higher capacitive load than a complementary emitter follower allow with comparable performance dimensioning.

This means that the process must be implemented in a circuit let, firstly in the range of the mentioned transit frequency (3 MHz) a smaller dynamic output resistance than that has complementary emitter followers and secondly the higher one capacitive load not due to dynamic instability in principle excludes, in principle, in that also by a frequency response correction under the condition of a sufficient high power bandwidth of the amplifier (slew rate at least 1 V / us) no stability can be achieved.

This object is achieved in a method by in the characterizing part of claim 1 and one Circuit by the in the characterizing part of the claim 2 mentioned features solved. Advantageous training courses are in the dependent claims 3-6 characterized.

Fig. 1 shows the block diagram for the method is according to claim 1.

Fig. 2 shows the currents i _{Q 1} and i _{Q 2} as a function of the collector current i _C.

In practice, the straight lines i _{Q 1} = f (i _C ) and i _{Q 2} = f (i _C ) do not have to have exactly the same slope (apart from the sign).

FIG. 3 shows the course of the currents from FIG. 1 with a sinusoidal full modulation of the power amplifier.

The method according to the invention works with two control devices which work with the same reference variable, the reference value I _C.

If the collector current i _C falls below the reference value I _C , the first control device is activated. It counteracts the further reduction of the collector current i _C by increasing the current of the first current source Q 1 . If the collector current i _C exceeds the reference value I _C , the second control device is activated. It counteracts the further increase in the collector current i _C by increasing the current of the second current source Q 2 .

Both control devices work with the measuring device 3 for the collector current i _C ( Fig. 1).

The device required for the function of a control device to form the difference between the collector current i _C and the reference value I _C is part of the device 4 . It can be carried out jointly for both control devices or individually for each control device. Care must be taken that the two straight lines i _{Q 1} = f (i _C ) and i _{Q 2} = f (i _C ) in Fig. 2 meet at i _Q = 0 or intersect at a value slightly above zero. The stronger control of both power sources at the same time can be reliably excluded.

The device 4 must generate a control signal with the required reference potential for each current source.

The amplification required for the control devices to function can be achieved in different ways. The device 4 can have an amplifier for both control devices together, e.g. B. contain a differential amplifier with two outputs or two individual amplifiers. The required amplification can also be achieved by a sufficiently large transmission ratio between the current of a current source and its control signal.

1, the node equation applies

i _E + i _{Q 2} - i _{Q 1} - i _L = 0

The consequence of the node equation and the relationship i _E ≃ i _C is that at least one control device always reacts to a change in the load current i _L by changing the current of the current source assigned to it. As a result, the load current i _{L is} largely provided by the two current sources Q 1 and Q 2 , and the collector current i _C only changes in proportion to the load current

i _C : i _L = 1: v _{off 1} , i _C : i _L = 1: v _{off 2}

or, if both control devices are active in the vicinity of i _Q = 0, in the ratio

i _C : i _L = 1: (v _{off 1} + v _{off 2} )

(v _{off 1} : open gain of the first control device with Q 1 , v _{off 2} : open gain of the second control device with Q 2 ).

_{According to} the invention, the ratio between the maximum value I _Cmax and the minimum value I _{Cmin of} the collector current i _C ( FIG. 2) is kept small by a sufficiently large reference value I _C. A small ratio results in a small change in the base-emitter voltage of the npn transistor T and in this way a high constancy of the output voltage when an inductive load is switched on.

Another advantage over an amplifier of the beginning mentioned type is that the input resistance of the Power amplifier no longer has the sign of the load current is dependent.

If i _L = 0, the current i _{Q 1 of} the first current source Q 1 becomes the quiescent current I _{R of} the power amplifier (cf. FIG. 3). The collector current i _C assumes the idle value I _CR .

As shown in FIG. 3, the first current source Q 1 has a slightly higher current load than the second current source Q 2 , provided the load current i _{L is} a pure alternating current. . The quantitatively accurate representation of curves of Figure 3 is based on the adoption of the following conditions:

I _C = 0.2 I _Lmax
i _{Q 1} = 10 × (I _C - i _C ) | i _C I _C
i _{Q 2} = 10 × (i _C - I _C ) | i _C I _C

Fig. 4 shows the circuit for a power amplifier with a low phase rotation, in particular for a variable inductive load, according to claim 2.

This power amplifier works according to the method Claim 1.

The collector current i _{C of} the first transistor T 1 generates a voltage drop across a measuring resistor R _M , which is used to evaluate the collector current.

The resistor R 4 generates an almost constant current I _{R 4} at a constant operating voltage. When the fourth transistor is cut off, occurs at the third resistor R3, a voltage drop corresponding to the product I × _{R 4} R. 3

The resistance R 3 is very small, so the voltage drop across R 3 is also very small. The voltage difference between the positive pole of the operating voltage source and the base of the third transistor is equal to the sum

I _{R 4} × R 3 + 3 × U _F (U _F : forward voltage of a diode).

The transition of the third transistor T 3 from the blocked to the conductive state and vice versa takes place practically at a base-emitter voltage U _BE at the level of the forward voltage U _{F of} a diode. If the third diode D 3 technologically corresponds exactly to the base-emitter diode of the third transistor T 3 , and the correspondence of its emitter current with the current I _{R 4 is} defined as the switching point of the third transistor, the third transistor T 3 opens exactly when the collector current the value

i _C = (I _{R 4} × R 3 + 2 × U _F ): R _M

falls below.

Referring to Fig. 4 can be shown that the fourth transistor T 4 opens when the collector current i _C exceeds approximately the same value. It follows that the value

I _C = (I _{R 4} × R 3 + 2 × U _F ): R _M

the reference value I _C according to FIG. 1, for showing the block diagram of the circuit of Fig. 4 corresponds to underlying process.

When the collector current i _C is below the reference value I _C, the difference current I _C flows - i _C as an emitter current i _{ET 3} into the emitter of the third transistor T 3, and the voltage drop across the measuring resistor R _M remains approximately constant (it reduces with increasing undershoot of the reference value I _C somewhat, since the base-emitter voltage of T 3 increases somewhat with the emitter current of the third transistor T 3 ). The base-emitter diode of the fourth transistor T 4 advantageously remains polarized in the forward direction. The emitter current i _{ET 3} generates across the second resistor R 2 to the voltage drop (I _C - I _C) × R. 2 The fourth diode D 4 is intended to compensate for the base-emitter voltage of the second transistor T 2 . As a result, the second transistor T 2 opens exactly when the collector current i _C falls below the reference value I _C. In addition, the compensation with the fourth diode enables the dimensioning R 2 R _M , and a very small value can be set for the resistor R 1 , without requiring a very large ratio R 2 : R 1 . The second transistor T 2 , together with the first resistor R 1, forms the first current source Q 1 according to FIG. 1. A change in the collector current i _C , under the condition i _C < I _C, causes a change in the opposite direction which is greater by R 2 : R 1 Current i _{Q 1} .

When the collector current i _C exceeds the reference value I _C , the fourth transistor T 4 is opened.

The base-emitter diode of the third transistor T 3 advantageously remains polarized in the forward direction because the potential at the base of the third transistor T 3 changes by the same amount as the potential at the emitter of the fourth transistor T 4 . The fourth transistor, together with the third resistor R 3, forms the second current source Q 2 according to FIG. 1.

A change in the collector current i _C , under the condition i _C < I _C, causes a change in the current i _{Q 2} that is larger in the same direction by R _M : R 3 .

Thus, the ratio between the current i _{Q 2} and the i _C collector current under the condition i _C <I _C by the gear ratio between the current i _Q1 and i _C collector current under the condition i _C <I _C matches, the dimensioning specification R _M : R 3 = R 2 : R 1 must be observed.

If the collector current i _C exceeds the reference value I _C , the collector current of the third transistor T 3 and thus the current through the fourth diode D 4 approaches zero. This can be prevented by connecting the fourth resistor R 4 not to the negative pole 2 of the operating voltage source but to the base of the second transistor T 2 , so that by mirroring the current I _{R 4} with the factor (R 2 : R 1 ) a minimum value for the current i _{Q 2 is} set.

If the fourth resistor R 4 is connected to the negative pole of the operating voltage source, it can be replaced by a constant current source. This in particular eliminates the dependency of the current I _{R 4} on the operating voltage. When the fourth resistor R 4 is connected to the base of the second transistor T 2 , it can be replaced by a constant current bipolar, which does not require a reference potential, or by two constant current sources, one of which is the base of the third transistor T 3 with the negative pole and the other connects the base of the second transistor T 2 to the positive pole of the operating voltage source.

The switching point of the third transistor T 3 was used as the basis for the reference value I _C. As the switching point of the third transistor, the correspondence has been defined its emitter current I _{ET 3} with the current I _{R 4.} With i _C = I _C, the current i _{Q 1} results from i _{Q 1} = (R 2 : R 1 ) × I _{R 4} . If the current i _{Q 2 is to be} as large as the current i _{Q 1} at i _C = I _C , the base-emitter voltage of the fourth transistor T 4 at i _{Q 2} = (R 2 : R 1 ) × I _{R 4} match the base-emitter voltage of the third transistor T 3 at I _{ET 3} = I _{R 4} .

This condition can be met well when the circuit is integrated if the area of the base-emitter junction of the fourth transistor is set in the ratio R 2 : R 1 to the area of the base-emitter junction of the third transistor. At the same time, the higher thermal load on the fourth transistor located in the load circuit can be taken into account.

With a discrete implementation of the circuit, the match i _{Q 1} = i _{Q 2} with i _C = I _{C can} hardly be achieved.

The thermal load on the fourth transistor T 4 is a particular disadvantage of the circuit according to FIG. 4, because it depends on the dependence of the base-emitter voltage of the transistor on the crystal _temperature for a shift in the characteristic curve i _{Q 2} = f (i _C ) Fig. 2 leads.

In addition, a pnp power transistor has particularly unfavorable ones Radio frequency properties.

FIG. 5 shows a circuit with a fifth transistor of the npn line type according to claim 6, which avoids the mentioned disadvantages of the circuit of FIG. 4.

The fifth transistor T 5 relieves the fourth transistor T 4 , and the third resistor R 3 is now to be dimensioned with higher resistance. A change in the collector current i _C causes a change in the current i _{Q 2} greater by (R _M : R 3 ) × (R 5 : R 6 ) under the condition i _C < I _C.

The following dimensioning rule is particularly useful at:

R 1 = R 6 ,
R 2 = R 3 = R 5 = R _M.

It is of course expedient to use two transistors of the same characteristic, preferably integrated on a common chip, for T 3 and T 4 .

It is also appropriate for the third, fourth and fifth Diode to use one transistor each, which is connected to the transistor, whose base-emitter voltage is to be compensated for integrated chip is.

Compilation of the reference symbols used

1 positive pole of the operating voltage source
2 negative pole of the operating voltage source
3 measuring device
4 establishment
A output of the power amplifier
D 1 - D 4 first to fourth diodes
E Power amplifier input
i electricity
i _C collector current
I _C reference value
I _Cmax maximum collector current
I _Cmin minimum collector current
I _CR idle value of the collector current i _C
i _E emitter current
i _L load current
I _Lmax maximum load current
i _Q current of a current source
i _{Q 1} current of the first current source Q 1
i _{Q 2} current of the second current source Q 2
I _{Q 1 max} maximum current of the first current source Q 1
I _{Q 1 R} Idle value of the current of the first current source when i _L = 0
I _R quiescent current
I _{R 4} current through resistor R 4
Q 1 first power source
Q 2 second power source
R 1 - R 6 first to sixth resistor
R _M measuring resistor
t time
T npn transistor
T 1 first transistor (npn)
T 2 second transistor (npn)
T 3 third transistor (pnp)
T 4 fourth transistor (pnp)
T 5 fifth transistor (npn)
U _BE base-emitter voltage
v _{off 1} open amplification of the first control device
v _{off 2} open amplification of the second control device

Claims (6)

1. Method for a power amplifier with low phase shift, in particular for a variable inductive load, with an npn transistor, the collector of which is connected via a current path to the positive pole of an operating voltage source, the base of which is connected to the input and the emitter of which is connected to the output of the power amplifier , with at least one component that makes the collector current of the npn transistor accessible directly or via the base-emitter voltage of the npn transistor for indirect evaluation, with a controllable current source that emit the npn transistor with the negative pole of the Connects operating voltage source, wherein the current source can be realized by a further npn transistor and an emitter resistor, with a differential amplifier or an equivalent arrangement for forming and amplifying the difference between the collector current of the npn transistor or a signal derived therefrom and a reference value, where when a pnp transistor can be used as a differential amplifier in the basic circuit, and with a connection between the output of the differential amplifier and the control input of the current source, so that the current source is turned on when the collector current falls below the reference value, characterized in that the differential amplifier mentioned at the outset , which has only one output, is replaced by a device ( 4 ) which has two outputs and drives the first current source (Q 1 ) mentioned at the outset in a known manner via the first output when the collector current (i _C ) of the npn Transistor (T) falls below a reference value (I _C ), while a second, controllable current source (Q 2 ), which is connected between the positive pole ( 1 ) of the operating voltage source and the output (A) of the power amplifier, is turned on via the second output , when the collector current (i _C) exceeds the same reference value (I _C), wherein between the Current (i _{Q 2} ) of the second current source and the amount of the reference value overshoot of the collector current (i _C ) the same or approximately the same, sufficiently large transmission ratio as between the current (i _{Q 1} ) of the first current source and the amount of the reference value undershoot of the collector current, and that the ratio between the maximum value (I _Cmax ) and the minimum value (I _Cmin ) of the collector current (i _C ) is kept small by a sufficiently large reference value (I _C ) ( Fig. 1, Fig. 2). 2. Circuit for a power amplifier with a low phase shift, in particular for a variable inductive load, with a first transistor of the npn line type, the collector of which via a current path with the positive pole of an operating voltage source, the base of which is connected to the input and the emitter of which is connected to the output of the Power amplifier is connected to a second transistor of the npn line type, the collector of which is connected to the output of the power amplifier and whose emitter is connected via a first resistor to the negative pole of the operating voltage source, to a third transistor of the pnp line type, the emitter of which is connected to the collector of the first transistor, and its collector is connected to the base of the second transistor and, via a second resistor, to the negative pole of the operating voltage source, characterized in that
that the component for evaluating the collector current (i _C ) is a resistor (R _M ),
that a fourth diode (D 4 ) is connected in series with the second resistor (R 2 ),
that the base of a fourth transistor (T 4 ) of the pnp line type is connected to the collector of the first transistor (T 1 ) , the collector of which is connected to the output (A) of the power amplifier,
that further between the positive pole ( 1 ) and the negative pole ( 2 ) of the operating voltage source, a series circuit comprising a third resistor (R 3 ), a first, second and third diode (D 1 , D 2 , D 3 ) and a fourth resistor (R 4 ) is arranged in the order mentioned, all three diodes (D 1 , D 2 , D 3 ) being poled in the direction of flow,
and that at the connection point between the first diode (D 1 ) and the second diode (D 2 ) the emitter of the fourth transistor (T 4 ) and at the connection point between the third diode (D 3 ) and the fourth resistor (R 4 ) the base of the third transistor (T 3 ) is connected ( Fig. 4). 3. Circuit for a power amplifier according to claim 2, characterized in that the fourth resistor (R 4 ) is not connected to the negative pole ( 2 ) of the operating voltage source, but to the base of the second transistor (T 2 ). 4. Circuit for a power amplifier according to claim 2, characterized in that the fourth resistor (R 4 ) is replaced by a constant current source. 5. Circuit for a power amplifier according to claim 3, characterized in that the fourth resistor (R 4 ) is replaced by a constant current two-pole or that instead of the fourth resistor two constant current sources are used, one of which is the base of the third transistor (T 3 ) with the negative pole ( 2 ) and the other connects the base of the second transistor (T 2 ) with the positive pole ( 1 ) of the operating voltage source. 6. Circuit for a power amplifier according to claim 2, 3, 4 or 5, characterized in that the collector of the fourth transistor (T 4 ) with the base of a fifth transistor (T 5 ) of the npn line type and via a fifth diode (D 5 ) and a fifth resistor (R 5 ) is connected to the output (A) of the power amplifier, that the emitter of the fifth transistor (T 5 ) is connected to the output (A) via a sixth resistor (R 6 ), and that the collector of the fifth transistor (T 5 ) is connected to the positive pole ( 1 ) of the operating voltage source.