DE3676426D1 - Verfahren zur bestimmung der zugriffsberechtigung mehrerer eindeutig identifizierbarer prozessoren zu einer gemeinsamen informationsquelle. - Google Patents

Verfahren zur bestimmung der zugriffsberechtigung mehrerer eindeutig identifizierbarer prozessoren zu einer gemeinsamen informationsquelle.

Info

Publication number
DE3676426D1
DE3676426D1 DE8686113663T DE3676426T DE3676426D1 DE 3676426 D1 DE3676426 D1 DE 3676426D1 DE 8686113663 T DE8686113663 T DE 8686113663T DE 3676426 T DE3676426 T DE 3676426T DE 3676426 D1 DE3676426 D1 DE 3676426D1
Authority
DE
Germany
Prior art keywords
identificable
processors
determining
several
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686113663T
Other languages
German (de)
English (en)
Inventor
Daniel Jonathan Auerbach
Tien Chi Chen
Wolfgang Jacob Paul
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3676426D1 publication Critical patent/DE3676426D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/374—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a self-select method with individual priority code comparator
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
DE8686113663T 1985-10-31 1986-10-03 Verfahren zur bestimmung der zugriffsberechtigung mehrerer eindeutig identifizierbarer prozessoren zu einer gemeinsamen informationsquelle. Expired - Lifetime DE3676426D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/794,354 US4794516A (en) 1985-10-31 1985-10-31 Method and apparatus for communicating data between a host and a plurality of parallel processors

Publications (1)

Publication Number Publication Date
DE3676426D1 true DE3676426D1 (de) 1991-02-07

Family

ID=25162407

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686113663T Expired - Lifetime DE3676426D1 (de) 1985-10-31 1986-10-03 Verfahren zur bestimmung der zugriffsberechtigung mehrerer eindeutig identifizierbarer prozessoren zu einer gemeinsamen informationsquelle.

Country Status (4)

Country Link
US (1) US4794516A (enExample)
EP (1) EP0220536B1 (enExample)
JP (1) JPS62107363A (enExample)
DE (1) DE3676426D1 (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE89940T1 (de) * 1986-04-02 1993-06-15 Siemens Ag Verfahren zum ansteuern eines gemeinsamen speichers eines aus einzelnen mikroprozessorsystemen bestehenden mehrprozessorsystems.
US5155854A (en) * 1989-02-03 1992-10-13 Digital Equipment Corporation System for arbitrating communication requests using multi-pass control unit based on availability of system resources
US5499356A (en) * 1989-12-29 1996-03-12 Cray Research, Inc. Method and apparatus for a multiprocessor resource lockout instruction
US5212796A (en) * 1990-01-02 1993-05-18 Motorola, Inc. System with modules using priority numbers related to interrupt vectors for bit-serial-arbitration on independent arbitration bus while CPU executing instructions
WO1991020039A1 (en) * 1990-06-11 1991-12-26 Supercomputer Systems Limited Partnership Method and apparatus for a load and flag instruction
US5132967A (en) * 1990-10-29 1992-07-21 International Business Machines Corporation Single competitor arbitration scheme for common bus
US5379438A (en) * 1990-12-14 1995-01-03 Xerox Corporation Transferring a processing unit's data between substrates in a parallel processor
EP0520835A2 (en) * 1991-06-28 1992-12-30 Digital Equipment Corporation Scheme for interlocking devices in a computer system
US5191656A (en) * 1991-08-29 1993-03-02 Digital Equipment Corporation Method and apparatus for shared use of a multiplexed address/data signal bus by multiple bus masters
US5265212A (en) * 1992-04-01 1993-11-23 Digital Equipment Corporation Sharing of bus access among multiple state machines with minimal wait time and prioritization of like cycle types
DE69327825T2 (de) * 1992-08-10 2000-10-12 Lucent Technologies Inc., Murray Hill Funkübertragungssystem und Funkbasisstation zur Verwendung in einem derartigen System
DE4422418B4 (de) * 1994-03-25 2008-03-27 Iav Gmbh Ingenieurgesellschaft Auto Und Verkehr Verfahren zur elektronischen Erhebung von Straßenbenutzungsgebühren und zur Kontrolle deren Erhebung bei Straßenfahrzeugen
DE19528599C2 (de) * 1995-08-03 1999-05-27 Siemens Ag Verfahren zur Zugriffssteuerung von einer Datenstation auf mobile Datenträger
US9563594B2 (en) 2014-05-30 2017-02-07 International Business Machines Corporation Intercomponent data communication between multiple time zones
US9582442B2 (en) * 2014-05-30 2017-02-28 International Business Machines Corporation Intercomponent data communication between different processors
US11544214B2 (en) * 2015-02-02 2023-01-03 Optimum Semiconductor Technologies, Inc. Monolithic vector processor configured to operate on variable length vectors using a vector length register
US10275379B2 (en) 2017-02-06 2019-04-30 International Business Machines Corporation Managing starvation in a distributed arbitration scheme

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB904334A (en) * 1959-02-04 1962-08-29 Int Computers & Tabulators Ltd Improvements in or relating to data handling equipment
DE2210426C2 (de) * 1972-03-03 1973-11-08 Nixdorf Computer Ag, 4790 Paderborn Verfahren zur vorranggesteuerten Auswahl einer von mehreren Funktions einheiten zur Anschaltung an eine ihnen gemeinsam zugeordnete Einrichtung in Datenverarbeitungsanlagen und Schaltung zur Durchführung des Verfahrens
IT971304B (it) * 1972-11-29 1974-04-30 Honeywell Inf Systems Sistema di accesso a priorita variabile dinamicamente
US3959775A (en) * 1974-08-05 1976-05-25 Gte Automatic Electric Laboratories Incorporated Multiprocessing system implemented with microprocessors
IT1129371B (it) * 1980-11-06 1986-06-04 Cselt Centro Studi Lab Telecom Commutatore di messaggi a struttura distribuita su canale ad accesso casuale per colloquio a messaggi tra unita elaborative
US4463445A (en) * 1982-01-07 1984-07-31 Bell Telephone Laboratories, Incorporated Circuitry for allocating access to a demand-shared bus
US4458314A (en) * 1982-01-07 1984-07-03 Bell Telephone Laboratories, Incorporated Circuitry for allocating access to a demand shared bus
JPS58225442A (ja) * 1982-06-25 1983-12-27 Toshiba Corp 優先順位制御回路

Also Published As

Publication number Publication date
EP0220536A3 (en) 1987-08-05
JPH033257B2 (enExample) 1991-01-18
EP0220536A2 (en) 1987-05-06
EP0220536B1 (en) 1991-01-02
JPS62107363A (ja) 1987-05-18
US4794516A (en) 1988-12-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee