DE3425636A1 - Method for activating a raster recording device - Google Patents

Abstract

In a raster recording device, the recording elements of which must be activated in a certain temporal and data-bit sequence and which has an image data memory in which the raster dot information for a graphical display to be recorded are stored, a FIFO memory (first-in-first-out memory) is arranged between the image data memory and the recording device. An output clock corresponding to the operating rate of the recording device causes the data to be output out of the FIFO memory at the correct time and a signal specifying the empty state of the FIFO memory causes the processor controlling the device to interrupt a current program and to transmit new data words from the image data memory to the FIFO memory. A signal indicating the full state of the FIFO memory causes the processor to resume the interrupted program run.

Description

Method for controlling a raster recording device

The invention relates to a method in the first part of the claim 1 specified type for controlling a raster recording device.

Fast raster recording devices for outputting graphical Representations such as B. alpha / numeric characters, ideographic representations, pictorial representations have an image data memory in which the Information is stored by data words. The data words are used for control of the recording elements of the raster recording device, the bivalent Bits of the data words indicate whether for recording at the respective controlled position to depict a grid point (first priority) or no grid point (second priority) is.

To such a high-speed raster recording device to operate, it is necessary to change the temporal output sequence of the data to the physical Adapt the circumstances and control conditions of the recording elements to them z. B. in the form of a continuous data stream to the recording elements. In order to achieve this goal, a DMA module (Direct Memory Access module) is often used. used, which has direct access to the data from the image data memory in the from the required time sequence for the recording elements and the recording elements feeds.

The use of a DMA block with the associated peripherals but represents an expensive solution. In addition, for each from the image data memory The data word to be read out is the ten lines of the processor system controlling the device must be made available to the DMA chip, so that the processor considerable Time is lost for processing other tasks.

Another known possibility, the image data from the image data memory in appropriate order to transfer to the recording elements consists in that the processor controlling the device, the reading out and the transfer in time adapted form takes over. But this has the consequence that the between the transfer of the individual data words remaining time of the faster processor for processing other tasks are no longer sufficient, so that the processor for this one purpose is completely busy.

The invention is based on the object of a simple and inexpensive To create a solution in which the processor has time to process further tasks remain.

According to the invention, this object is achieved by the characterizing features of the patent claim 1 specified features solved.

The advantages of the invention are in particular that instead of of an expensive DMA module, only a simple and inexpensive memory module is used but the processor can still perform other tasks because it cannot is constantly required for reading out the data words from the image data memory.

According to a further embodiment, the data words are transmitted after addressing the respective memory location in the image data memory by the Processor directly into the FIFO memory and not the usual one Paths through the processor. This results in a further considerable time saving, which in turn is available to the processor to carry out other tasks.

Further advantages of the invention emerge from the subclaims and the exemplary embodiment described below with reference to a figure.

In the figure is the simplified block diagram of an optical High-speed printer shown, which has a raster recording device t. The raster recording device 1 consists in a manner known per se from a xerographic recording device 2 provided with an optical recording element 3 having recording head 4 cooperates. The recording head 4 has across the entire width of a recording medium a number of Recording elements 3 with which a line of raster points can be recorded is. Furthermore, the associated circuit arrangement is supplied for implementation Signals (bits) in control variables and their connection to the respective recording element 3 contained in the block designated as recording head 4. By shifting of a recording medium in a direction perpendicular to the recording elements 3, dot grid lines can be arranged one below the other and thus - with the appropriate control - record any graphic representations.

The optical high-speed printer is controlled by a processor 5, the various program routines contained in a program memory 6 Able to realize work processes. These workflows include B. the Acceptance of input data from a data source (not shown) on a Input 7 are delivered and to be output with the raster recording device 1 indicate graphical representations (alpha / numeric characters, ideograms, images). These data are generated by the processor 5 with the aid of a character generator (the component of the program memory 6) or other suitable devices in data words implemented, the bits of which, when the recording elements 3 of the recording head 4, the recording elements to be excited and not to be excited, respectively 3 specify. That is, the data words correspond to the drive requirements of the recording elements 3 and are adapted from the processor 5 via data lines 8 in an image data memory 9 stored.

In order to carry out this storage, the memory locations to be used are addressed one after the other with the help of an address register 10 provided in the processor 5, where the multi-digit binary address has a binary 0 "in its highest position, so only the remaining positions of the address lines 11 to the image data memory 9 can be used to address the memory locations.

To the information now contained in the image data memory 9 from of the raster recording device 1 on a recording medium for display to bring the information stored word by word in a bit serial Data stream are output to the recording head 4. The feed speed must be of the bits correspond to the possible processing speed of the recording head 4 of which each bit supplied is assigned to the next following recording element 3 is assigned in the grid line. A FIFO memory (first-in-first-out memory) is required for this task. 12 and a shift register 13 acting as a parallel / series converter are provided.

The FIFO memory 12 is connected to the image data memory 9 and the processor 5 via the address lines 11, data lines 8 and control signal lines 14 (for supplying the control signals required for the operation of the modules) tied together.

The FIFO memory 12 also has two flag registers 15, 16, of which a flag register 15 is set with a signal when the FIFO memory full and the second flag register 16 is set with a signal when the FIFO memory 12 is empty. If the marker register 16 indicates that the FIFO memory 12 is empty, so causes a corresponding signal to the processor 5 that the processor 5 its interrupts the current activity and the transmission of data words from the Image data memory 9 in FIFO memory 12 starts. After triggering the necessary The processor begins control signals and transmission via the control signal lines 5 the successive addressing of the memory locations with the help of its address register 10 the data words to be transmitted in the image data memory 9, where the the most significant bit of the respective address now has a binary "1". By this binary "1" is activated the FIFO memory 12 so that it can be used for recording and Storage of the data read out from the image data memory 9 on the data lines 8 Data words is ready. The read out data words are thus taken directly from the image data memory 9 transferred to the FFFO memory 12 without the usual route via the processor 5 is taken.

If the processor 5 has this many storage locations in the image data memory 9 addressed that the FIFO memory 12 is filled with data words, this will be the Flag register 15 indicating the full state is set. The corresponding signal on the processor 5 causes the addressing and transmission process to be aborted and the processor 5 in its task which was interrupted before the start of the transmission continues.

The empty shift register 13 emits a read signal via lines 17 to the FIFO memory 12, whereupon a data word via line 18 in parallel into the Shift register 13 is transferred.

The shift register 13 has the number of digits of a data word, so that the shift register 13 is full when a data word is transferred. To the Shift register 13 is an output clock from a clock generator, not shown in detail via input 19, with which the content is sent bit-serially to the recording head 4 of the raster recording device 1 is output. The clock frequency corresponds to the conditions specified by the raster recording device, in particular the possible control speed of the recording elements 3. As soon as the data word is shifted out of the shift register 13 bit serially, arises on the line 17 again a read signal, so that the next data word in the shift register 13 is transmitted in parallel.

Since the clock frequency applied to the shift register 13 is significantly lower is than the system clock of the processor 5, it follows that after the restoring process from the image data memory 9 in the FIFO memory 12 for the processor 5 a longer period of time is available for other work until the FIFO memory 12 is on the way via the shift register t3 ieeP and a new transmission process must be carried out from the image data memory 9 into the FIFO memory 12. Simultaneously is in this way a bit-serial continuous data stream to the recording head 4 ensured.

Unless the recording head of the raster recording device is not continuous serial data stream but z. B. the data of a data word take over in parallel and a corresponding number of recording elements with it can control, can - without deviating from the inventive concept - on a shift register 13 can be waived. Instead of a serial data stream, there is also a group-wise Transmission of individual data bits is conceivable if the raster recording device this requires.

Claims (4)

Claims: 1. Method for controlling a raster recording device with one or more recording elements, in which the in an image data memory stored, the raster point information for a graphic to be recorded Representation containing data words after addressing the memory locations by a Processor output to the raster recorder, each Bit of a data word, depending on its value, the activation or non-activation of a recording element has the effect that it is not shown that the data words from the image data memory (9) into a FIFO memory (12) (first-in-first-out memory) stored and in accordance with an output cycle to the raster recording device (1) are output, with an indicating the empty state of the FIFO memory (12) first signal the processor (5) to interrupt the program run and transfer of data words from the image data memory (9) to the FIFO memory (12) and a second signal indicating the full state of the FIFO memory the termination the data word transfer and resumption of the interrupted program run. 2. The method according to claim 1, d a d u r c h g e -k e n n z e i c h n e t that in each case a defined bit is sent to the image data memory by the processor (5) (9) from given memory location addresses to the FIFO memory (12) fed which is determined according to the value of the bit for inclusion or non-inclusion of the data words read out under the memory location address is enabled, and that transfer the data word directly from the image data memory (9) to the FIFO memory (12) will. 3. The method according to claim 1 or 2, d a d u r c h g e -k e n n z e i c h n e t that to create one of the recording elements (3) continuously feedable data stream, the data words output from the FIFO memory (12) a parallel / serial converter (13) and bit-serial according to a Output clock to the raster recording device (1) and that the transmission of a data word from the FIFO memory (12) to the parallel / serial converter (13) is triggered by a signal indicating its empty state. 4. The method according to claim 3, d a d u r c h g e k e n n -z e i c h n e t that the parallel / serial converter (13) is a shift register that can be set in parallel is provided.