DE3382250D1 - Mechanismus zur berechnung der naechsten adresse vor ihrer durchfuehrung. - Google Patents

Mechanismus zur berechnung der naechsten adresse vor ihrer durchfuehrung.

Info

Publication number
DE3382250D1
DE3382250D1 DE8383902713T DE3382250T DE3382250D1 DE 3382250 D1 DE3382250 D1 DE 3382250D1 DE 8383902713 T DE8383902713 T DE 8383902713T DE 3382250 T DE3382250 T DE 3382250T DE 3382250 D1 DE3382250 D1 DE 3382250D1
Authority
DE
Germany
Prior art keywords
calculating
next address
address before
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8383902713T
Other languages
English (en)
Inventor
Roger Ditzel
Hubert Mclellan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Application granted granted Critical
Publication of DE3382250D1 publication Critical patent/DE3382250D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30054—Unconditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE8383902713T 1982-08-23 1983-07-22 Mechanismus zur berechnung der naechsten adresse vor ihrer durchfuehrung. Expired - Fee Related DE3382250D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US41043082A 1982-08-23 1982-08-23
PCT/US1983/001129 WO1984000833A1 (en) 1982-08-23 1983-07-22 Pre-execution next address calculating mechanism

Publications (1)

Publication Number Publication Date
DE3382250D1 true DE3382250D1 (de) 1991-05-16

Family

ID=23624698

Family Applications (2)

Application Number Title Priority Date Filing Date
DE3382805T Expired - Fee Related DE3382805T2 (de) 1982-08-23 1983-07-22 Rechner mit dynamischem Aufbau eines Befehlzusatzfeldes zur Speicherung der folgenden Befehlsadresse.
DE8383902713T Expired - Fee Related DE3382250D1 (de) 1982-08-23 1983-07-22 Mechanismus zur berechnung der naechsten adresse vor ihrer durchfuehrung.

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE3382805T Expired - Fee Related DE3382805T2 (de) 1982-08-23 1983-07-22 Rechner mit dynamischem Aufbau eines Befehlzusatzfeldes zur Speicherung der folgenden Befehlsadresse.

Country Status (6)

Country Link
EP (2) EP0116600B1 (de)
JP (1) JPS59501426A (de)
CA (1) CA1193738A (de)
DE (2) DE3382805T2 (de)
GB (1) GB2126384B (de)
WO (1) WO1984000833A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0190484A3 (de) * 1985-01-28 1988-09-21 Data General Corporation Digitalrechner mit erhöhter Geschwindigkeit und Verfahren zur Geschwindigkeitserhöhung
CA1250667A (en) * 1985-04-15 1989-02-28 Larry D. Larsen Branch control in a three phase pipelined signal processor
CA1254661A (en) * 1985-06-28 1989-05-23 Allen J. Baum Method and means for instruction combination for code compression
US5101341A (en) * 1988-08-25 1992-03-31 Edgcore Technology, Inc. Pipelined system for reducing instruction access time by accumulating predecoded instruction bits a FIFO
US5131086A (en) * 1988-08-25 1992-07-14 Edgcore Technology, Inc. Method and system for executing pipelined three operand construct

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL262931A (de) * 1960-03-29
US3764988A (en) * 1971-03-01 1973-10-09 Hitachi Ltd Instruction processing device using advanced control system
FR2226079A5 (de) * 1973-04-13 1974-11-08 Honeywell Bull Soc Ind
US3900835A (en) * 1973-09-24 1975-08-19 Digital Equipment Corp Branching circuit for microprogram controlled central processor unit
US3961313A (en) * 1974-12-04 1976-06-01 International Business Machines Corporation Computer control apparatus
US4210960A (en) * 1977-09-02 1980-07-01 Sperry Corporation Digital computer with overlapped operation utilizing conditional control to minimize time losses
US4200927A (en) * 1978-01-03 1980-04-29 International Business Machines Corporation Multi-instruction stream branch processing mechanism
US4298927A (en) * 1978-10-23 1981-11-03 International Business Machines Corporation Computer instruction prefetch circuit
US4323967A (en) * 1980-04-15 1982-04-06 Honeywell Information Systems Inc. Local bus interface for controlling information transfers between units in a central subsystem
US4371928A (en) * 1980-04-15 1983-02-01 Honeywell Information Systems Inc. Interface for controlling information transfers between main data processing systems units and a central subsystem

Also Published As

Publication number Publication date
JPH0544049B2 (de) 1993-07-05
EP0116600A1 (de) 1984-08-29
EP0411679A2 (de) 1991-02-06
DE3382805T2 (de) 1996-09-26
EP0411679B1 (de) 1996-05-01
GB2126384A (en) 1984-03-21
GB2126384B (en) 1986-03-19
JPS59501426A (ja) 1984-08-09
EP0411679A3 (en) 1991-07-10
EP0116600A4 (de) 1987-08-12
CA1193738A (en) 1985-09-17
GB8322134D0 (en) 1983-09-21
WO1984000833A1 (en) 1984-03-01
DE3382805D1 (de) 1996-06-05
EP0116600B1 (de) 1991-04-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: BLUMBACH, KRAMER & PARTNER, 65193 WIESBADEN

8339 Ceased/non-payment of the annual fee