DE3339194A1 - SIGNAL SCAN CIRCUIT WITH REDUCED OFFSET ERROR AND LEVEL SHIFT CIRCUIT FOR AN AUTOMATIC PIPE PRELOAD SCAN SYSTEM - Google Patents

Description

RCA 77495 Sch / Vu

USSN 437827 dated 10/29/82

USSN 437830 dated 10/29/82

RCA Corporation, New York, N.Y. (V.St.A.)

Signal sampling circuit with reduced offset error and level shifting circuit for an automatic Kinescope bias scanning system

The invention relates to an arrangement which is particularly suitable for scanning a characteristic value of an electrical Signal of low level in such a way that distortion of an output sample value due to sample offset errors can be reduced significantly. The invention is also suitable for a system for the automatic control of the Bias of a picture tube in a television receiver.

In signal processing systems, such as a television receiver, there is a need to sample information contained in the signals processed by the system are included. Often it is necessary to add significant gain to the scanning process in order to provide a Receive information sample at a level large enough to be used by circuits used for processing the information samples are determined to be usable for processing. This requirement is

for example, on hand in an automatic kinescope bias control system (hereinafter also referred to as AKB system) for the automatic setting of the correct Black current values for each electron beam system of a color picture tube of a receiver. The effect of this Adjustment consists in the fact that pictures reproduced by the picture tube by changing operating parameters the picture tube (for example as a result of aging or temperature effects) are not adversely affected.

An AKB system typically operates during the image blanking intervals that each electron beam system has the The picture tube carries a small blanking current representing a black picture at a reference voltage which is a Measure for the black screen signal information. This stream is used by the AKB system to generate a signal processed, which is a measure of the currents flowing during the blanking interval and for maintenance a desired black current level is used.

In such a system, it is often necessary to sample the variable amplitude of a small pulse that is few Millivolt peak-to-peak amplitude to derive a control signal that biases the kinescope through a Can automatically regulate a range of several volts. One system of this type is shown, for example, in U.S. Patent 4,331,981 (Inventor R. P. Parker).

The need to amplify low level signals in the scanning process requires that in the scanning process occurring offset errors are small, since large offset errors can interfere with or falsify the information sample obtained. Furthermore, a linear mode of operation is the Sampling circuit desirable to avoid distortion of the sample obtained. These demands will be accomplished by a high gain signal sampling circuit in accordance with the principles of the invention.

In one type of AKB system, control circuits react to a periodically derived pulse signal, its size represents the cathode black current value. The derived Signal then, when the black power level is correct, has a non-zero value, and when the black power level is too high or too low, it has different values Values (e.g. more or less positive). The derived signal is processed by the control circuits, which contain clamping and sampling circuits for generating a correction signal for the kinescope bias, which increases or decreases in size and the picture tube to maintain a correct Black current level is supplied. The clamp circuit includes a clamping capacitor to form a reference state for the signal information to be scanned. This reference state is set by supplying a reference voltage to the clamping capacitor, which occurs during the clamping interval is coupled to the sampling circuit.

In the AKB system described here, the signal representing the black current is derived at a sensing point, which shows voltage changes during the video signal frame intervals when the AKB system is not working, which in Relate to changes in the amplitude of the video signal.

The size of the clamp capacitor at the input of the AKB signal processing system generated reference voltage is chosen so that the normally expected size of the Video signal during the active frame interval, and especially the size of video signal exaggeration components running in the white direction, the intended mode of operation of the input circuits of the AKB signal processing circuit do not bother.

It is taken into account here that in a system of the type described, the level of the sampling amplifier des The input signals supplied to the AKB system should be compatible with the input requirements of the sampling amplifier.

-ιοί te to which the requirement for a good dynamic range is provided. It is also taken into account that in an AKB system which has a charge storage element at the input such as a clamp capacitor used in front of the sense amplifier, the sense capacitor changes during the frame intervals may not discharge significantly. This latter requirement is particularly important in an AKB system, which samples small signal amplitude changes (for example on the order of a few millivolts). It is important that such a system ensure that the clamping circuit is reliably accurate Reference for the small signal amplitude changes that are sampled within a short time interval will deliver. These objects are achieved by a circuit arrangement according to the invention.

The signal sampling circuit according to the invention includes a Bias circuit and a signal utilization circuit and a first and a second amplifier, their inputs are coupled to the bias circuit and each have outputs. The output of the first amplifier and a reference voltage source are optionally used during a reference interval preceding the sampling interval coupled to the bias circuit to provide a reference condition for the bias circuit and a reference thereto in Establish related reference bias condition for the first and second amplifiers. The exit of the second amplifier is selectively or selectively coupled to the signal utilization circuit during the sampling interval. The first and second amplifiers deliver essentially the same thing at the end of the reference interval Output signal.

According to a feature of the invention, the first and second amplifiers correspond to transconductance amplifiers.

According to a further feature of the invention, the scanning

circuit assigned to a system for automatic control of the kinescope bias voltage in a television receiver, wherein the sampling circuit processes small signals representative of the kinescope bias. 5

According to a further feature of the invention, the Signals from the bias circuit dem Sense amplifiers are supplied through a circuit formed by a level shift circuit so as to the signals to be sampled correspond to the input requirements of the sampling amplifier. The level shift circuit is blocked at times that differ from the operating intervals of the AKB system, so that the Bias circuit is decoupled and therefore can not be significantly discharged.

In the accompanying drawings show:

Figure 1 shows part of a color television receiver incorporating an automatic kinescope bias control system including a signal sampling circuit and a level shift circuit according to the invention;

FIG. 2 shows waveforms for explaining the mode of operation of the circuit according to FIG. 1;

Fig. 3 details the operation of the level shift circuit according to Fig. 1 related circuit and

FIG. 4 shows circuit details of the signal sampling circuit according to FIG. 1.

In the circuit shown in Fig. 1, television signal processing circuits provide 10 separate luminance components (Y) and color components (C) of a color television signal mixture to a luminance and color signal processing circuit 12, which in turn has gain control circuits for the luminance and color signals, input

Control circuits for DC voltage levels (for example with keyed black level clamping circuits), color demodulators for generating color difference signals r-y, g-y and b-y and matrix amplifier for matrixing these color difference signals with the processed luminance signals into low-level color image signals r, g and b. These signals are amplified and otherwise processed by circuitry within the video output signal processing circuitry 14a, 14b and 14c, respectively, which amplified high-level color image signals R, G and B to the respective intensity control electrodes (cathodes) 16a, 16b and 16c of a color picture tube 15, respectively. The circuits 14a, 14b and 14c also perform those related to FIG automatic bias control for the picture tube (AKB) necessary functions, as will be explained. The picture tube 15 is a self-converging tube with an inline beam system and a jointly controlled control grid 18 for each of the three beam systems with cathodes 16a, 16b and 16c.

Since the output signal processing circuits 14a, 14b and 14c are the same in this embodiment, the following description of the operation of circuit 14a applies equally for circuits 14b and 14c.

The signal processing circuit 14a includes a kinescope driver stage with an input transistor 20, which works as an amplifier in the basic emitter circuit and that of of the circuit 12 via an input resistor 21 Video signal r is fed, furthermore a high-voltage output transistor 22, which acts as an amplifier in basic basic circuit operates and together with a transistor 20 forms a video driver cascode amplifier. That to control the high level video signal R suitable for the kinescope cathode 16a is produced at a load resistor 24 im Collector output circuit of the transistor 22. A resistor 25 forms a direct current negative feedback for the driver

Amplifier 20.22. The signal gain of this cascode amplifier 20, 22 is mainly due to the ratio of the negative feedback resistor 25 to the input resistor 21 is determined.

A sensing resistor galvanically connected in series between the collector-emitter paths of the transistors 20 and 22 30 is used to derive a voltage at a sensing node A relatively low voltage, which is a measure of is the level of the kinescope black current generated during the blanking interval of the picture tube flows. Resistor 13 works with the receiver's AKB system, as will be explained.

A timing signal generator 40, which contains logic control circuits for the combination and sequence as well as level shifting circuits, generates timing signals V, V _g , V _c , V based on periodic horizontal synchronous frequency signals H and periodic vertical synchronous frequency signals V, both of which are derived from the deflection circuits of the receiver _p and V " _G , which control the AKB functions during periodic AKB intervals. An AKB interval begins shortly after the end of the vertical retrace interval within the vertical blanking interval and comprises several horizontal line intervals which are also within the vertical blanking interval and during which there is no video signal image information. These timing signals are illustrated by the waveforms in FIG.

Consider for the moment Fig. 2: The timing signal V-., Which is used as a video blanking signal, includes a positive pulse generated soon after the end of the vertical retrace interval at time T. is specified for signal form V. The blanking signal V- is present for the duration of the AKB interval and is a blanking control input terminal of the luminance / color

Signal processing circuit 12 is supplied / so that the output signals r, g and b thereof have a DC reference voltage level which applies to a black picture, corresponding to the absence of video signals.
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This can be achieved by reducing the signal gain of the circuit 12 to practically zero via the gain control circuits of the signal processing circuit 12 under the control of the signal V _n and by changing the DC voltage level in the video signal processing path via the DC level control circuits of the signal processing circuit 12 in order to have a reference level at its signal outputs. that represents a black image. The timing signal V _G , which is used as the positive grid drive pulse, comprises three horizontal line intervals within the vertical blanking interval. The time control signal V "is used to control the operation of the clamping circuit, which is used for the signal scanning function of the AKB system. The timing signal V, which is used as the scan control signal, occurs after the V- signal and is used to timing the operation of a sample and hold circuit which generates a DC bias control signal to control the cathode black current level of the kinescope. The signal V "comprises a sampling interval, the beginning of which is slightly delayed compared to the end of the clamping interval encompassed by the signal Vp and which ends essentially simultaneously with the AKB interval. A negatively directed auxiliary pulse V _p coincides with the sampling interval. The delays T _{ß of} the timing of the signals, as shown in Fig. 2, are on the order of 200 ns.

Let us now return to FIG. 1. During the AKB interval, a positive pulse V _Q (for example of the order of +10 V) biases the grid 18 of the picture tube in the forward direction, so that the electron beam system

with the cathode 16a and the grid 18 conducts more strongly. At times that do not coincide with the AKB intervals, the signal V _G results in the normal, less positive bias voltage for the grid 18. As a result of the positive grid pulse V ", an in-phase positive current pulse occurs at the cathode 16a during the grid pulse interval. The amplitude of the resulting cathode output current pulse is proportional to the level of the flowing cathode black current (which is typically a few microamps).

The induced positive cathode output pulse appears at the collector of transistor 22 and is across the resistor 25 coupled to the base input of transistor 20, so that the current carried by this increases proportionally, as long as the cathode pulse is present. As a result of the im The higher current flowing in transistor 20 creates a voltage in the form of a negative-going voltage across the sensing resistor 30 Voltage change that appears at sensing node A and is proportional to the size of the cathode output pulse representing Schwarzstromes is. The size of this "voltage disturbance" at node A is determined by the product of the value of the resistor 30 with the size of the "disturbance current" flowing through the resistor 30 is determined.

The voltage change at node A is coupled via a small resistor 31 to a node B, at which a voltage change V ₁ occurs which practically corresponds to the voltage change at node A. The node B is coupled to a signal processing circuit 50 for the bias control voltage.

Circuit 50 performs signal clamping and sensing functions. The clamping function takes place during a clamping interval within each AKB interval with the help of a feedback clamping circuit, which has an input AC coupling capacitor 51, a level shift circuit 55, an amplifier 52, a keyed operation trans-

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conductance amplifier (OTA) 53, a filter capacitor 54 and a keyed buffer amplifier (e.g. with an emitter follower stage) which acts as an electronic switch. The scanning function takes place during of a sampling interval that follows the clamping interval during each AKB interval, namely one is used for this purpose Circuit comprising level shift circuit 55, amplifier 52, a keyed operational transconductance amplifier (OTA) 57 and an average value charge storage capacitor 58 contains. The level shift circuit 55 and amplifier 52 operate both during clamping and also during the sampling interval.

A correction voltage for the kinescope bias voltage is produced at the capacitor 58, which voltage is generated via a buffer amplifier 59 low output impedance and a resistor circuit 60, 62, 64 fed to the kinescope driver at the base of transistor 20 serving as the bias control input will. The correction voltage generated across the capacitor 58 is used to automatically maintain a desired correct level for the black current line of the picture tube. The bias voltage correction voltage arising across the storage capacitor 58 depends on both the voltage V-am Circuit node B during the clamping interval as well as from one at node B during "the subsequent one Voltage change V2 from the sampling interval, as will be explained in detail in connection with the signal forms shown in FIG.

During the reference interval for clamp adjustment, both OTA 53 and switch 56 become conductive _{under the control of clamp control signal V c.} In contrast, the OTA 57 then does not conduct, so that the charge on the storage capacitor 58 remains unaffected during the clamping interval. As a result of the feedback during the clamping interval, the negative connection (-) of the capacitor 51 is related to a reference voltage V _R (i.e.

clamps), which depends on a fixed reference voltage V _REF , which in turn is fed to an input of the amplifier 52. At this time, the voltage V ₃ across the input capacitor 51 depends on the level of the voltage change V _{- occurring at circuit node B.} and from the reference voltage V ₁ determined by the feedback. During the subsequent sampling interval, when the voltage change V ₂ occurs at the node B, the OTA 53 and the switch 56 are blocked, and the OTA 57 becomes conductive _{as a result of the sampling control signal V g.} The magnitude of the voltage change V "is a measure of the magnitude of the black current level of the picture tube and is scanned by the amplifier 52 and the OTA 57, so that a corresponding voltage is produced on the storage capacitor 58.

Let us now consider the operation of the level shift circuit 55.

It should first be noted that a nominal DC voltage (V- ,,) of approximately +8.8 V for black level states occurs at the nodes during the AKB interval, unless the voltage change V _{2 is} generated during the AKB sampling intervals (as is still the case will be discussed). This voltage level also occurs during active picture intervals when the video signal information processed by the driver amplifier 20, 22 corresponds to the reproduction of a black picture. The voltage at nodes A and B becomes less positive when the driver amplifier 20, 22 conducts more strongly as a result of video signals which increasingly represent white image information. A highly exaggerated video signal contains transitional exaggeration components running in white direction which cause corresponding negatively directed transitional exaggeration components of considerable amplitude at nodes A and B during the image intervals. Such negatively directed transition oscillations are coupled to the AKB input clamping capacitor 51 during the image intervals

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and can interfere with the reference voltage at the negative Connection (-) of the clamping capacitor 51 have an effect if no compensation is provided, which will be explained below.

The input of the AKB signal processing circuit is with denotes a node C to which the negative terminal of the clamping capacitor 51 is coupled. The input voltage at node C is essentially equal to the reference voltage V "of +6.0 V except during the sampling

Interval where the input voltage changes slightly (by a few Millivolts) changes if the picture tube does not have the correct bias.

The reference voltage at the capacitor 51 should not be significantly disturbed from one AKB interval to the other. However, this reference voltage is undesirably greatly changed if a large, negatively directed, excessive transient oscillation in the frame interval is coupled to the negative terminal of the clamping capacitor 51, in particular if the circuit containing the circuit 55 and the amplifier 52 is designed as an integrated circuit. In such a case, a sufficiently strong negative transition oscillation can result in the input node C being brought to a negative voltage (i.e. below ground potential) if the negative overshoot is large enough to cause the semiconductor transition from substrate to ground at node C in Bias forward direction. A diode Dg, which represents this semiconductor junction between substrate and ground, is forward biased and conducts when the negative overshoot exceeds the positive reference voltage V _D at the negative terminal of the capacitor 51 by about 0.7 V or more.

In this example, the reference voltage V _R (+6.0 V) is selected in such a way that this is the case with the magnitudes of negatively directed transition oscillations that are normally to be expected during the image.

Prevent intervals. Otherwise you would have a passage before voltage of the substxate junction, then the voltage at input node C would be clamped to -0.7 V, and the voltage on the negative terminal of the clamping capacitor 51 would quickly discharge to a wrong one Level that would impair the AKB clamping function and would make reconstruction from subsequent clamp levels difficult. In practice the disturbed one would wrong reference level depending on the type of video information signal as well as its excess content and duration be present for a relatively long time. As a result, the grayscale image content (i.e. the gray values of the Image between light and dark) visibly impaired.

The voltage at the negative terminal of the capacitor 51 is a relatively constant DC voltage level of +6.0 V, which only changes by a few millivolts if the black current value of the picture tube is incorrect. This tension is like that large to be fed directly to the signal input of amplifier 52 (at the base of a transistor 80).

Accordingly, the level shift circuit shifts with the emitter follower transistors 70, 71, 73 and one Diode 72 changes the DC voltage level of the voltage produced at the negative terminal of the capacitor 51 +2.8 V downwards, so that a DC voltage of approximately +3.2 V is produced at the signal input of the amplifier 52. These Voltage is better suited to make amplifier 52 operate in a good dynamic range. To the circuit 55 still belong to keyed current source transistors 74, 75 and 76.

The amplifier 52 includes transistors 80 and 82 in differential connection with corresponding load resistors 84 and 86, which are connected to an operating voltage source (for example +11 V) are connected, and with current source transistors 88 and 89. The base of transistor 82 becomes a fixed

Reference voltage V _REp (+3.2 V) is supplied, and the signals to be sampled with respect to the clamping reference level are supplied to the base of a signal input transistor 80 via a resistor 73. The base voltages of transistors 80 and 82 are equal (that is, symmetrical) when the kinescope black current level is correct, and then transistors 80 and 82 conduct equal output currents, and their differential output resistors 84 and 86 produce equal output voltages. The differential output voltages are fed to both OTA ¹ s 53 and 57. The difference in input and output voltages of amplifier 52 are unbalanced by a few millivolts if the voltage at the negative terminal of capacitor 51 changes by a few millivolts if the kinescope bias is incorrect.

This circuit requires a good dynamic operating range of the amplifier 52 that at the base inputs of the transistors 80 and 82 the prescribed voltages (+3.2 V in this case) when the kinescope bias is correct. The level shift circuit 55 ensures that the voltage developed on the negative terminal of capacitor 51 meets the signal input requirements of amplifier 52 as necessary for a good dynamic range of this amplifier.

In the embodiment described, the DC voltage level shift effected by the circuit 55 is also included Using offset voltages carried out just about Semiconductor barriers arise. The DC voltage level shift is based on the essentially fixed offset voltages (+0.7 V) applied to the base-emitter barrier layers of the transistors 70, 71 and 73 arise, and the offset voltage across the diode 72, so that between the base of the transistor 70 and the base of the amplifier transistor 80 have an offset voltage of +2.8 V arises. Resistors are not used in the offset voltage path of the circuit 55 for deriving an offset voltage

used because with the insertion of resistors in the Level shift path with transistors 70 through 73 provides the desired noise insensitive operation of the level shift circuit 55 would be affected, as will be explained. The circuit 55 has because of the emitter follower circuit an AC voltage gain of about 1 and; a current gain sufficient to cover the base drive current for the amplifier transistor 80 to be supplied. It should be noted at this point that the base current of the Transistor 70 is extremely low (on the order of 250 nanoamps), causing a significant discharge the voltage at the negative terminal of capacitor 51 during the clamp and sample intervals when the circuit 55 leads, is avoided. For this purpose, the transistors 70 and 71 are Darlington amplifiers with high Input impedance switched.

The amplifier 52 becomes conductive during the AKB clamping and sampling intervals when the current source transistors 89 and 89 conduct in _{response to a key signal V R2.} During all other times when the current source transistors 88, 89 are blocked as a result of the key signal ν ,, «, the amplifier 52 is non-conductive. In the same way, the level shift circuit 55 is conductive during the AKB clamping and sampling intervals and is non-conductive at all other times when a key signal V _{1 is} fed to a current source transistor 74 and the key signal V _{K2 is} fed to the current source transistor 75, 76. The key signals V ". and V "2 have the same polarity and coincide in time, but they differ in amplitude because of the different biasing requirements of transistors 75, 76, and 89 with respect to transistor 74.

The level shift circuit 55 shows a high level of insensitivity to switching overshoots which arise when the circuit 55 becomes conductive and non-conductive in _{response to the key signals V Kl} and V _{0, and it records}

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is also characterized by a good insensitivity to noise and horizontal deflection frequency disturbances which can occur when the circuit 55 conducts current. Such random transient voltages, noise and interference can be coupled across transistors 74, 75 and 76 when they are conducting and can cause problems because of the small signal changes (only a few millivolts) processed by circuit 55 and amplifier 52. However, such random signals are advantageously handled without significant amplification by the circuit 55 _r because the collector outputs of the current source transistors 74, 75 and 76 low impedances corresponding to the low emitter impedances of the transistors trigger 70 and 73 and the low impedance of the diode 72nd Any such random signals which are coupled to the amplifier 52 via the current source transistors 88 and 89 appear in the differential output circuit of the amplifier 52 as common-mode components and are made to disappear as a result of the common-mode rejection at the differential input of the transconductance amplifiers 53 and 57.

It has already been stated that the level shift circuit 55 conducts and applies power during the AKB intervals no electricity at all other times. For this latter State there are several advantages, as will be explained.

If the circuit 52 conducts no current, then the negative connection of the capacitor 51 is disconnected from the line, so that it has practically no discharge path (at this time the switch 56 is non-conductive) because it is only activated during the clamping intervals as a function of the signal V. _c leitat). This is important because if the circuit 55 remained conductive from one AKB interval to the next, a discharge of more than 30 mV could occur via the negative connection of the capacitor 51. Such a discharge size is in this system of

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Significance and could impair the effectiveness of the clamping function by which the reference voltage at the negative terminal of the capacitor 51 is set. This means that the clamping interval is very short (three horizontal line intervals), the value of the clamping capacitor 51 is quite large (0.12] xF), and the reference voltage which is set for the capacitor 51 must be exactly within a fraction of one millivolt.

The voltage changes at the input node C are only a few millivolts during the AKB intervals if the The kinescope bias is incorrect and these small changes must be transmitted to amplifier 52 reliably will. When the circuit 55 becomes non-conductive, the only discharge current for the capacitor 51 is through the negligibly small collector-base leakage current of transistor 70 is formed. This leakage current is several Orders of magnitude lower than the small base current that is present when transistor 70 is conductive. The switch 56 can be derived from the US patent application Ser. No. 437,828 (Title "Switching Network with Suppressed Switching Transients ", October 29, 1982).

The amplifier 52 is also activated during intervals other than the AKB non-conductive, eliminating a path for random signals that would otherwise be the bias control voltage which occurs at the output storage capacitor 58. This also ensures that that the level shift path with the transistors 70-73 remains non-conductive. The switches are similar 56 and the OTA's 53 and 57 non-conductive during other than the AKB intervals. Because the circuit elements 55, 52, 53, 56 and 57 not conducting during intervals other than the AKB intervals will advantageously Energy consumption and heat generation are reduced, since the AKB system only takes a few horizontal lines each Field scan (comprising 256 horizontal scanning lines)

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have to work. The reduction in circuit heating also reduces the likelihood of thermal runaway of the operating parameters of the circuit elements significant, and this is very important to a small signal processing system to ensure a predictable signal processing.

The discharge of the output storage capacitor 58 during picture intervals when the AKB control system is not active, is acceptably low because of the high input impedance of buffer amplifier 59 and its correspondingly small input current (about 175 nanoamps). In addition, the output capacitor 58 is relatively large (10 µF) so that any Discharge through the input current of the buffer amplifier 59 is negligible. The value of the input clamping capacitor 51 should be sufficiently small (i.e. in the order of 0.12 μΡ) so that voltage changes, which is a measure of the black current level of the picture tube can be coupled to circuits 55 and 52 without significant attenuation.

FIG. 3 shows a circuit suitable for generating the key signals V .. and V "2 for the system illustrated in FIG. 1. A transistor 100 is supplied with an input timing control _{signal V n} 'and an inverted signal V _n for controlling the conduction state of a transistor 101. The key signals V _K1 and V _K2 are derived from the emitter circuit of the transistor 101, which contain a resistor 102 and a diode 104, as can be seen from the drawing. Positively directed key signals V «.. and V _R2 arise during the AKB intervals due to the negatively directed timing signal V '.

The signal gain in the open loop sampling process is very high and is given by the product of the voltage gain of the input amplifier (about 40) and the transconductance gain ¹ (g _m ) of the

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1 OTA 57 (about 0.1 mS) and the impedance at the output of the OTA 57 (about IMegohm). A very high sampling amplification is necessary because the voltage changes V ₁ and V ^ #, which are a measure of the black current level of the picture tube, are very small (on the order of a few millivolts).

Since these representative signals processed by the circuit 50 are very small, it must be ensured that the offset errors in signal clamping and -Sampling by circuit 50 can be kept small because otherwise the bias correction control voltage, which arises at the storage capacitor 58 is disturbed. This is done by the circuitry of the operational transconductance amplifier shown 53 and 57 reached.

The OTA's 53 and 57, which of the clamping or scanning function are assigned, convert input voltage changes into Output current changes by. Both are preferably the same (that is, matched to one another). As has already been said, will the input signals of both OTA's 53 and 57 are taken from the output of the amplifier 52 together.

The feedback effect occurring during the clamping intervals has the consequence that the inputs of the amplifier 52 assume a symmetrical state before the end of the clamping reference interval, so that the voltage at the inverting input of the amplifier 52 is made practically equal to the reference voltage V _REF at the non-inverting input of the amplifier 52 . This differential input voltage to amplifier 52 is essentially zero so that amplifier 52 is biased for symmetrical linear operation. This state corresponds to the reference state for the subsequent scanning process.
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The amplifier 52 provides an output voltage of practically zero because of the symmetrical input bias. It

it should be noted that the input bias voltage for the OTA 53 is derived from the output voltage (O) of the amplifier 52 will. Therefore the output current of the OTA 53 is practically 0, and this means that the OTA 53 is designed for linear operation, in accordance with the bias of amplifier 52, is properly biased.

It should be noted that the input bias to OTA 57 is also derived from the output of amplifier 52. Since the OTA ¹ s of their operating characteristics are well matched with respect to each other 53 and 57, the OTA 57 is also properly biased for linear operation in the same manner as the OTA 53rd Thus, at the end of the clamping interval, immediately before the sampling interval, both OTAs 53 and 57 are biased so that they have virtually identical output currents of practically zero. The input circuits of buffer amplifier 59 and switch 56 are also preferably closely matched to one another.

In this system, the voltage V ₃ on input capacitor 51 and the voltage applied to the inverting input of amplifier 52 do not change when the voltage changes V ₁ and V- are the same, and thus represent a correct black current level for the kinescope.

In this case, the balanced input bias of amplifier 52 remains as it was during the clamp interval has been set, unchanged during the sampling interval, so that the output current of practically 0 of the OTA 57 remains unchanged and the control voltage across the storage capacitor 58 also remains unchanged remain. The described arrangement with the adapted OTA's 53 and 57, the probability of the Occurrence of an offset error during the scanning process compared to the clamping process is reduced because the output currents of the OTA's 53 and 57 are matched to one another during the Kiemmund sampling intervals. This will also the likelihood of a disruption of the output voltage

voltage across the capacitor 58 is significantly reduced. If the OTA 53 and the OTA 57 were different, then the Output current of the OTA 57 during the sampling interval even with correct picture tube bias' a value other than Assume 0 even if the output current of the OTA 53 is substantially at the end of the previous clamping reference interval 0 is. Such an output current different from 0 of the OTA 57 would result in the voltage on the output storage capacitor changing, and this is undesirable, because the voltage on capacitor 58 should not change with the correct kinescope bias.

Is the black current level of the picture tube too high or too high? low, then those applied to the input capacitor 51 cause Voltages an unbalance at the inputs of the amplifier 52, so that the storage capacitor 58 over the OTA 57 is charged or discharged during the scanning process, according to a correct kinescope bias maintain the desired black power level.

The capacitor 54 stabilizes the clamp feedback loop of voltage 50 against vibrations and also retains a residual voltage charge from the previous clamping interval. As a result of this property, the balanced input state of amplifier 52 can be made faster by the feedback effect be made because the change the charge on the input capacitor 51 through the switch 57 required time becomes smaller.

The transconductance amplifier of the sampling OTA 57 is preferred significantly less than the voltage gain of amplifier 52, so the signal gain of the forward running scan path with the voltage amplifier 52 and the OTA 57 preferably mainly through the Gain of the voltage amplifier 52 is determined. Since the OTA's 53 and 57 are preferably matched to one another, they have practically the same gain. Relatively smaller

Reinforcements for the OTA ¹ s 53 and 57 are desirable for low-keeping effect of any differences in the operating characteristics of the OTA's 53 and 57th

The scan path preferably includes a transconductance amplifier (OTA 57) instead of a voltage amplifier, so that you can get a reliably accurate control voltage over the Output storage capacitor 58 receives and thus the probability of static system errors (in the idle state the AKB control loop) is reduced. The OTA 57 is charging and gradually discharges capacitor 58 as a result of source and sink current to and from capacitor 58 corresponding step-by-step changes in the input voltage of the OTA 57.

The feedback switch 56, if it does not conduct during the sampling interval, ensures that the Capacitor 54 discharges very little during the sampling interval. In the blocked state, the switch 56 also decouples the feedback path from input capacitor 51 and from the input of amplifier 52 so that interactions between the clamp and sample signal paths can be avoided during the sample interval.

The keyed buffer amplifier 56 is a voltage amplifier with gain 1 with high input impedance and low output impedance, which is a reasonable one high current (up to about 10 inA) to input capacitor 51 (0.12 μΡ) during the clamp reference interval can deliver. This charging current property is necessary so that the terminal reference voltage on the capacitor 51 before The end of the clamping interval is set. The keyed circuit 56 may be of the type disclosed in U.S. Patent Application Ser. No. 437,828 (entitled "Switching Network with Suppressed Switching Transients", October 29, 1982) Be kind.

There now follows a more detailed description of the small-mouth sensing operation of circuit 50 with reference to FIGS Fig. 2 shown waveforms.

The auxiliary signal V _p is fed to the circuit node B in FIG. 1 via a diode 35 and a voltage transmission impedance circuit with resistors 32 and 34 (which can have values of 220 and 270 kOhm, for example). The signal V _p always has a positive DC voltage level of approximately +8.0 V, except during the AKB sampling interval, in order to keep the diode 35 conductive, so that a normal DC bias voltage occurs at node B. When the positive DC component of signal Vp is present, the junction of resistors 32 and 34 is clamped to a voltage equal to the positive DC component of signal V minus the voltage drop of a diode 35. The signal Vp represents a negatively directed pulse component with a less positive fixed amplitude during the AKB sampling interval. The diode 35 is blocked in response to the negative pulse Vp, so that the connection point of the resistors 32 and 34 is no longer clamped. Resistor 31 only insignificantly attenuates the voltage change occurring at node A compared to the corresponding voltage change (V ₁ ) occurring at node B, because resistor 31 (of the order of 200 ohms) has a relatively small value compared to resistors 32 and 34 .

Before the clamping interval, but during the AKB interval, the previously existing nominal direct voltage (DC) at node B charges the positive terminal of capacitor 51. During the clamp interval when the grid drive pulse V _{r is} generated, the voltage at node A decreases as a result of the pulse _{V Q} by an amount representative of the black current level. This has the consequence that the voltage at node B drops to a level that im

is essentially equal to V _DC - V. During the clamping interval, the timing _{signal V c} also causes the clamping switch 56 to be closed, so that the inverting signal input (-) of the amplifier 52 is coupled to its input via the amplifier 53 and the switch 56 and thereby becomes a voltage follower amplifier. As a result, the fixed DC reference voltage V _REF (e.g. +6 V) applied to the non-inverting input (+) of amplifier 52 is fed back to the inverting signal input of amplifier 52 by the feedback effect, so that the aforementioned symmetrical input bias condition is established. As has also already been indicated, during the clamping interval, the voltage V ₃ on the capacitor 51 depends on a reference setting voltage which is related to the voltage V " _EF on the negative terminal of the capacitor 51 and a voltage on the positive terminal of the capacitor 51, which in turn is the The difference between the previously mentioned nominal _{direct voltage level (V DC} ) at node B and the voltage change V ₁ that occurs during the clamping interval at node B corresponds to. In this way, the voltage V- across capacitor 51 during the clamp reference interval depends on the level of voltage change V ₁ representing the black current, which may vary.

The voltage V ₃ can be expressed by (V _DC - V ₁ ) ~

During the immediately following sampling interval the positive grid _{drive pulse V r is} not present, so that the voltage at node B increases in the positive direction to the previously existing nominal DC voltage level V ₀ ^ which was present before the clamping interval. At the same time the negative pulse V_ occurs and biases the diode 35 in the reverse direction and influences (by a momentary change) the normal voltage transmission and coupling effect of the resistors 32 and 34, so that the voltage at node B is reduced _{by an amount V 2} as Fig. 2 illustrates. Be at the same time

33391

the clamp switch 56 and the OTA 53 are non-conductive, and the OTA 57 carries current _{as a result of the signal V g.}

The voltage applied to the inverting signal input (-) of amplifier 52 is thus during the sampling interval equal to the difference between the voltage at node B and the voltage V-. at input capacitor 51. The voltage fed to the amplifier 52 depends on the magnitude of the voltage change V., which is associated with changes of the kinescope black power level.

The voltage at the output of the storage capacitor 58 remains unchanged during the sampling interval if the magnitude of the voltage change V ₁ occurring during the clamping interval is the same as the voltage change V ₂ occurring during the sampling interval, which indicates the correct black current level of the picture tube. This is the case because during the sampling interval the voltage change V ₁ at node B takes place in the positive direction (as seen from the clamping setting reference level) when the grid control pulse disappears, and the voltage change V ₂ results in a simultaneous negative voltage change at node B. If the picture tube has the correct bias voltage, then the positively directed voltage change V- is the same as the negatively directed voltage change V "and these two voltage changes cancel each other out during the sampling interval, so that the voltage at node B remains unchanged.

If the magnitude of the voltage change V _{1 is} smaller than the magnitude of the voltage change V ^, then the amplifier 52 charges the storage capacitor 58 proportionally via the OTA 57 in a direction in which the black current flowing in the cathode becomes larger. Conversely, the amplifier 52 proportionally discharges the storage capacitor 58 via the OTA 57 in order to reduce the black current carried by the cathode when the voltage change V ₁

-32- is greater than the voltage change V ₂ .

As can be seen in more detail from the waveforms shown in FIG. 2, it is assumed / that the amplitude "A" of the voltage change V _{1 should be} approximately 3 mV if the cathode black current level is correct and extends over a range of a few millivolts ( ^ Δ) changes when the cathode black current level increases or decreases compared to the correct value with changes in the operating characteristics of the picture tube. Thus, the clamping interval setting reference voltage on the capacitor V ₃ changes with changes in the magnitude of the voltage V ₁ as the cathode black current level changes. The voltage change V ₂ at node B has an amplitude "A" of about 3 mV and thus corresponds to the amplitude "A" of the voltage change Vj when the black current level is correct.

As shown by waveform V _{COR in Fig. 2, corresponding to a correct kinescope bias} condition, the voltage at the inverting input of amplifier 52 remains unchanged during the sample interval when voltages V ₁ and V _{2 are} both amplitude "A". The waveform V "shows, however, that the input voltage of the amplifier 52 increases by an amount Δ when the voltage change V _{1 has} the amplitude" A + Δ ", corresponding to a high Schwärζstrompegel. In this case, the amplifier 52 discharges the output storage capacitor 58 through the OTA 57 so that the bias control voltage applied to the base of the transistor 20 causes the collector voltage of the transistor 22 to increase so that the cathode black current decreases towards the correct value.

Conversely, and as indicated by waveform V, the input voltage of amplifier 52 decreases by a value Δ during the sampling interval when the voltage change V _{1 has} an amplitude "A-Δ", corresponding to a low black current level. In this case, the loading

stronger 52 the output storage capacitor 58 via the OTA 57, so that the collector voltage of the transistor 22 decreases and the cathode black current towards the correct value increases. In both cases, multiple sampling intervals may be necessary to get the correct black power level to adjust.

The combined pulse scanning technique described is described in greater detail in US patent application Ser. No. 434,314 of October 14, 1982 (title "Signal Processing Network For an Automatic Kinescope Bias Control System", inventor RP Parker). This application also contains additional explanations with regard to the circuit, also with regard to the auxiliary control signal V _p

and the timing signal generator 40.

Fig. 4 shows circuit details of the operational transconductance amplifiers 53 and 57. The OTA 53 includes transistors 90 and 91, each on from the amplifier 52 via connections T. and T ~ supplied signals react, and a keyed Current source transistor 92. The differential collector output currents of transistors 90 and 91 are determined using a push-pull / single-ended converter circuit with transistors 93 and 94 converted into an unbalanced output current, at a terminal T-. appears. The OTA 57 includes transistors 100 and 101, which are also on from Amplifier 52 via connections T and T "supplied signals respond, as well as a gated current source transistor 102. The differential collector output signals of the transistors 100 and 101 are converted into an unbalanced-earth with the help of a push-pull / single-ended converter with transistors 103 to 105 Output current converted at terminal T.

Claims (18)

ΡΑΐΚΝ-Τ-ΑΝWALTE "" "ο O O Q DR. DIETER V. BEZOLD O 0 0 ϋ DIPL. ING. PETER SCHÜTZ DIPL. ING. ¹ WOLFGANG HEUSLER MAiUA-THERESlA-STRASSE 22 POST BOX 86 02 60 D-8OOO MUNICH 86 RCA 77495 Sch / Vu USSN 437827 dated 10/29/82 USSN 437830 dated 10/29/82 RCA Corporation, New York, N.Y. (V.St.A.) .Patent claims Qp signal sampling circuit which operates during a reference interval and a subsequent signal sampling interval, characterized by a reference voltage source (V _REF ), a bias voltage source (51), a signal groove circuit (58), a first amplifier (53) having an input coupled to the bias source, a second amplifier (57) having an input connected to the bias voltage source, a first switch arrangement (40, V ^) for optional Coupling of the output of the first amplifier and the Zugsspannungsquelle to the bias source during the reference interval to set a reference state for the bias circuit, and a second switch arrangement (40, V ") for optional Coupling of the output of the second amplifier to the signal utilization circuit during the sampling interval, wherein the first and second amplifiers provide substantially the same output signal at the end of the reference interval. 2) Circuit according to claim 1, characterized in that the signal utilization circuit (58) has an output capacitance and in that the bias circuit (51) comprises an input capacitance. 3) Circuit according to claim 1, characterized in that the bias circuit (51) has an input signal coupling capacitance having. 4) Circuit according to claim 1, characterized in that the first and the second amplifier (53,57) transconductance amplifier which deliver output currents under control of input voltages. 5) circuit according to claim 1, characterized in that that the first and the second amplifier (53,57) are matched to one another and have practically the same operating characteristics to have. 6) Circuit according to claim 1, characterized in that that an input amplifier (52) is provided for coupling the bias circuit to the inputs of the first and second amplifier, which has a signal input (base of transistor 80) to the bias circuit, with a reference input (+) to the reference voltage source (V ^ gp) ^unc ^ is connected with an output in common to the inputs of the first and second amplifier and that the reference state the bias circuit input and output sets reference bias conditions for the input amplifier. 7) Circuit according to claim 6, characterized in that that the input amplifier (52) has a greater gain than the individual gains of the first and second amplifier having. 8) Circuit according to claim 6, characterized in that the bias circuit (51) has a capacitance AC coupling of the input signal to the input amplifier having. 9) Circuit according to claim 6, characterized in that that the output of the input amplifier (52) is a differential output circuit (80,81), which are commonly connected to the inputs of the first and second amplifier is. 10) Circuit according to claim 1, characterized in that the first amplifier (53) during the reference interval becomes conductive and non-conductive during the sampling interval and that the second amplifier (57) becomes non-conductive during the reference interval and during the sampling interval is made conductive. 11) circuit according to claim 1, characterized in that that the bias circuit has an input capacitance (51), that a buffer circuit (56) with a high resistance Input to the output of the first amplifier and a low-resistance output to the input capacitance is coupled to the power supply to the input capacitance during the reference interval and that a low-pass filter (54) is inserted between the output of the first amplifier and the input of the buffer circuit. 12) signal sampling circuit according to claim 1 in combination with a system for the automatic regulation of the black image stream, which in a signal processing system associated image display device flows, thereby characterized in that the signal processing system operates during the video image black intervals Contains circuitry for deriving a signal which is a measure of the size of the black image current and which processes during a control interval comprising a reference interval and a subsequent sampling interval will, that the derived signal is also fed to the bias circuit (51), that the signal utilization circuit (58) is connected to the signal processing system coupled output capacitance, and that the second switch arrangement (40, ν _ς ) selectively couples the output of the second amplifier to the output capacitance during the sampling interval in order to generate a bias control voltage on the output capacitance corresponding to the size of the derived signal, such that a desired black current level is maintained. 13) signal sampling circuit according to claim 1 in combination with a system for the automatic regulation of the level of the black image current which is passed through an image display device flows in a video signal channel of a video information reproducing system, the control system during Control intervals works within picture blanking intervals, characterized in that that in the system the bias circuit (31) with a Means (30) is coupled for deriving an output signal which is a measure of the size of the black image current is that a third amplifier (52) is provided with a signal input, which at its output a Bias control signal for the image display device to maintain a desired black current level provides that a level shift circuit (55) for coupling the bias circuit (51) to the signal input
of the third amplifier (52) is provided to match the signal input with the input biasing requirements of the To make third amplifier compatible, and that a third switch arrangement (40, V_) is provided which the
Level shift circuit during the control intervals
makes conductive and then suppresses input currents of the level shift circuit during other than the control interval-Ie. 14) Circuit according to claim 13, characterized in that the one measure for the size of the black screen current
representative signal generating circuit (30) is coupled to the video channel and that the output of the circuit deriving this signal signal fluctuations corresponding to fluctuations in the video signal amplitude during the video signal frame intervals and that the reference state for the
Bias circuit is chosen so that it is related to normally expected maximum amplitude transitions that the video signal will have during the frame intervals. 15) Circuit according to claim 13, characterized in that the level shift circuit (55) during the other Intervals is made non-conductive. 16) Circuit according to claim 13, characterized in that the bias circuit (51) has an AC voltage coupling capacitor for coupling the signal representing the size of the black image current to the third amplifier (52) via the level shift circuit (55) and that the capacitor with a first Connection
(+) is coupled to the output of the signal generating circuit with a second connection (-) to the level shift circuit, and that the reference state is set at the second connection of the capacitor. —Ο— 1 17) Circuit according to claim 13, characterized in that that the third amplifier (52) comprises a differential input amplifier (80, 82) with differential outputs and simultaneously with the level shift circuit during the other 5 ren intervals is made non-conductive. 18) Circuit according to claim 13, characterized in that that the level shift circuit (55) has a signal coupling path (70,71,72) from the bias circuit to the third 10 forms amplifier which is formed by a semiconductor circuit.