DE3321450A1 - TIMER-CONTROLLED SYSTEM OF MULTIPLE AUDIO COMPONENTS - Google Patents

Description

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GRÜNECKER. KINKELDEY. STOCKMAIR & PARTNER

PATENT LAWYERS

N PATENT ATT0 <* «VS

A. GRÜNECKER. IM.M DR H. KINKELOEV. CM.- »DR W STOCKMAlR. ο * - * DR K. SCHUMANN, cm .- * P. H. JAKOB. m. «s DR. G BEZOLO. olo «·« W. MEISTER, «.« «ι H HILGERS. »Ι, οα DR H. MEYER-PLATH. ο ·

PIONEER ELECTRONIC CORPORATION No. 4-1, Meguro 1-chome Meguro-ku

Tokyo, Japan

BOOO MUNICH 23 MAXIMKJANSTRASSe 43

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Timer-controlled system made up of several audio components

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Time-controlled system made up of several audio components

description

The invention relates to a control system for audio components, and more particularly to operating on a time base control unit for an audio component system consisting of a plurality of individual components or parts.

Such audio components can be, for example, tuners, amplifiers, cassette recorders or similar components act nents.

Timer for switching on and off of audio components are widely employed "Recently, such a timer also be applied to mobile audio component systemic ^m ® ⁿ to the function of such systems control su" Moreover, lately Tuners have been announced that are equipped with timers »

However, these systems are limited to that, now? the function of the tuner to control? they cannot be adapted in such a way that the function of other components in the system, such as a cassette deck, can be controlled.

A major disadvantage of such a system is that although a certain component is associated with the timer can be controlled, but the other components of the system will still be energized and kept operating, though their audio output signals are no longer passed on »This is why the energy consumption of such systems is much higher

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Another disadvantage is that while a tuner is in operation, a tape playback device is used Can advance the tape cassette. So when the user turns on the tape player, that is In general, the tape does not start at the desired start.

Finally, it is also disadvantageous that all components with the exception of the tuner have an audio blocking circuit must be provided. However, such a circuit is expensive, and so is that for realizing the concept The necessary wiring between the components is complex and correspondingly expensive.

It is therefore an object of the present invention to provide a control system for audio components that is implemented by a single timer is controlled; furthermore it should be guaranteed that at any given point in time only one component is in operation at a time.

This is achieved according to the invention by a system of several audio components in which the various Components of the system are arranged in a predetermined priority order. When a component is in operation is set, the components of the system that have a lower priority, no energy, so no electricity, received. When a timer generates an output pulse, all components in that audio system become reset so that the user can then choose which of the components he wants to put into operation.

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The invention is described below on the basis of exemplary embodiments with reference to the enclosed, scheraafci-

cal drawings explained in more detail. It show 5

Fig. 1 is a block diagram of an audio system according to the present invention .

Figure 2 is a circuit diagram of the parts of the system of Figure 1 that make up the timer control system

included according to the invention, and

Fig. 3 is a diagram similar to Fig. 2, but showing an alternative embodiment of the invention.

FIG. 1 shows a block diagram of a system comprising a plurality of audio components which is constructed in accordance with the basic principle of the present invention. This system of several audio components contains components or = components 1, 2, ... m, m + 1. The audio output signal from each component is applied to an output signal bus B which uses what is known as a "wired OR" technique. The signal on the output signal bus B is amplified by an output amplifier D and then sent to a loudspeaker Ξ.

Each component of this system is assigned a specific position in a priority order. With the present For example, it should be assumed that the priority order from component 1 to component nn-1 decreases. This means that in the system according to FIG. 1, component 1 has the highest priority and the component m + 1 is the lowest priority of the components shown to have.

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Each component is provided with a control circuit. When the corresponding component is switched on by the user, the control circuit of the corresponding component blocks a signal A ₁ , ..., A, A ₊ -, which blocks the flow of energy to the following components in the order of priority. For example, if component 1 with the highest priority is switched on, signal A ₁ interrupts the power supply to component 2, ... A _m ,

A timer T is included in the control circuit of the component m. The output from the timer T becomes each via a line C to reset inputs of the control circuits of each component 1, ... m, m + 1. This signal on line C is used to switch all components in turn off the system so that the operator can selectively turn on any component.

The system of FIG. 1 will be discussed in detail with reference to FIG. 2 which shows a detailed circuit diagram of the control circuits and associated portions of the system of FIG. In Fig. 1 , the same reference numerals are used to identify components corresponding to Fig. 1. It should also be assumed that component 1, which has the highest priority in this system, is a tape deck, that is to say a magnetic tape cassette device. This magnet

O ₀ tape cassette device includes a motor M for transporting the magnetic tape, a magnetic head H, an amplifier circuit 0P1 and related components.

Assuming that all control circuits of all components Qt. have been reset, a differential or Difforonz circuit, which consists of a resistor R .., diodes D ₁ and D "and a capacitor C ₁ , transmits a pulse via a diode D ₃ to the base of the transistor Q ₁ ,

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when a switch S _{1 is operated} for the energy supply. As a result, the transistor Q _{1 is} switched on, or conductive, so that the coil or winding L _{1 of} a relay ■ '

is operated. The contact of the relay is switched from the normally closed position to the normally open position. The normally closed position is shown in Fig. 2 by the reference character NC (= normally closed) or NO (= normally opened) in "The applied supply voltage _Vcc then to the motor M, the amplifier OP ₁ and of the resistors R ₂ and R _{4 are applied} to the base of transistor Q ₁ . In this way, the transistor Q., the switched-on state of the relay. The output from the amplifier

OP ₁ can then be passed on to output signal line B _{through diode D 5.}

On the other hand, if the power switch S ₁ remains in the off state, the relay also remains off, see above

that the contact of the relay, the supply voltage V _cc through the normally closed contact on the line A _- gives.

The control circuit of the second component 2 contains a flip-flop FF ₁ , the trigger input T of which via a control '

or locking switch S _{10 is} connected to the line A ₁ , which supplies the component 2 with energy, ie current, only in the event that the first component 1 is not switched on. The reset input R of the flip-flop FF ₁ is also connected to the line A ₁ . An input of an AND

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Member G ₁ is connected to the output Q of the flip-flop FF ₁ and its second input to the line A ₁ . The output Q of the flip-flop FF ₁ is connected to the base of a transistor Q ₁₀ , the collector of which receives the signal on the line A ₁ and the emitter of which is connected so that it supplies energy to _{an amplifier OP 2 = the output}

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output of the amplifier OP- is connected to the output signal line B _{via a diode D 10.}

When component 1 is switched on, no energy supply potential is applied to line A ₁ . Thus, the actuation of the switch S ₁₀ in this state does not trigger the flip-flop FF ₁ . Through this

IQ , the output signal from the output Q of the flip-flop FF ₁ remains at a low level, so that the transistor Q _{10 is kept} in the switched-off state and no current is supplied to _{the amplifier OP 2.} The output signal of the AND gate G ₁ also has a low level, so that

jK the operation of the components with lower priority in the system is locked.

On the other hand, when the component 1 is switched on, the line A _{1 is} on the supply voltage V -, -. In this case

2Q causes the actuation of the switch S ₁₀ that the flip-flop FF ₁ changes the respective states, so that the transistor Q _{10 is} switched on and the amplifier OP ₂ supplies current. At this point in time there is a signal with a low level at the output Q of the flip-flop FF _{1, so that the output}

2g signal of the AND gate G ₁ also has a low level. This means that the components that have a lower priority than component 2 cannot be put into operation. If both components 1 and 2 are still not switched on, the cause the positive voltage

OQ on the line A ₁ and the high output signal from the output Q of the flip-flop FF ₁ that the output signal of the AND gate G _{1 has} a high level. This enables a selected component with a lower priority to be switched on.

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The control circuit of the component m, which contains the timer T, has a flip-flop FF ″, the trigger input of which T via a control switch S20 mil: the SUhum. line A. connected is. If the output Q of the m-1

Flip-flops FF _{3 is} at a high level “he closes the contact S ₀₁ . The contact S ₀ -. is closed when the signal on the A line. is activated. All contacts S ₂₁ , S ₂₂ and S ₂₃ are opened when the timer T expires and a switch Sj _& closes, whereby a positive signal is applied to the line C. The upper contacts of the switches S ₀₁ and S ₀₀ are applied to the base of the transistor Q ₂₀ , the collector of which is connected to the supply voltage V and the emitter of which is connected so that it /

that an amplifier OP ₃ supplies power. As in the cases described above, the output signal of the amplifier OP _{3 is} fed to the output signal line B via a diode D _30. The signal at the upper contacts of switches S ₀₁ and S ₀₀ is applied to an input of an AND element G ₂ via an inverter I ₁ . The other input signal for the AND element G ₃ is fed through the line A ^ _1. The output signal of the AND element G ₃ is the control signal

If none of the components of a higher priority or order is switched on, the line A _m _ <| is located at a high level. If the switch S _{30 is} closed in this case, the flip-flop FF _{3 changes} its state so that a signal with a high level appears at its output Q and the switch S _{31 is} closed? as a result, the amplifier OP ₃ is supplied with energy via the transistor Q _30.

A low level signal is then applied from the output of the inverter I ₁ to the AND gate G ₂ , whereby the control signal A is brought to a low level.

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When the component m is not turned on, a high level signal is passed through the inverter I to the AND gate Gp is applied, bringing the control signal A high.

When the switch S ₂ ^ is closed by the timer T, all control circuits of all components 1 to m + 1 are reset. In the case of component 1, this takes place in that a pulse is applied to the base of a transistor Q- via a differentiator circuit consisting of resistors Rc / Rg / a capacitor C ₂ and a diode D _7. This interrupts the base driver voltage for transistor Q ~, blocks the flow of current through winding L- of the relay and brings the relay contact into the normally closed position (NC). In the second component 2, the flip-flop FF _{1 is} reset. In component m, switches S ₃₁ , S ₃₂ and S _{33 are} opened.

An alternative embodiment of a system according to the invention is shown in the form of a diagram in FIG. In this embodiment, the reset line signal C is only applied to the first component 1. This can by actuating the timer T only the first component 1, which has been assigned the highest priority, is switched off will. After component 1 has been reset, the other components can, as required be operated with a lower priority.

The system according to the present invention therefore makes it possible to operate each component as required without having to apply power to the unselected components. By assigning priorities

3b for the various components of the system can therefore be found save the energy that was required with the systems used up to now

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was wasted. You can also do without. Problems adding additional components to the system without the need for complex and costly changes to the wiring.

Claims (3)

α * β ο α ο ο P 18091 Timer-controlled system consisting of several audio components Patent claims 1.1 system with several audio components, characterized in that each audio component is assigned a position of a predetermined priority order, and that each audio component is assigned one Traffic jam circuit is assigned, with the control circuits are cascaded in the order of priority and each control circuit has means, dis a signal for blocking the operation of the audio = · Has lower priority components if the respective audio component is operated, and that in eiaer a timer (T) for resetting each control circuit is arranged in the control circuits, 2o system according to claim 1, characterized in that the timer (T) is coupled so that it all control -'- * resets circuits in the system. 3. System according to claim 1, characterized in that the timer (T) is coupled so that it only controls the control circuit resets which of the various audio components has the highest priority » 4o system according to claim 1, characterized in that the audio outputs of all components are coupled to a single output signal line.