DE3314300A1 - Circuit arrangement for driving power MOS FET push-pull output stages - Google Patents
Circuit arrangement for driving power MOS FET push-pull output stagesInfo
- Publication number
- DE3314300A1 DE3314300A1 DE19833314300 DE3314300A DE3314300A1 DE 3314300 A1 DE3314300 A1 DE 3314300A1 DE 19833314300 DE19833314300 DE 19833314300 DE 3314300 A DE3314300 A DE 3314300A DE 3314300 A1 DE3314300 A1 DE 3314300A1
- Authority
- DE
- Germany
- Prior art keywords
- push
- circuit arrangement
- power mos
- pull
- output stages
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
- H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
- H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/78—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled
- H03K17/785—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled controlling field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
- H03K19/01714—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by bootstrapping, i.e. by positive feed-back
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P2201/00—Indexing scheme relating to controlling arrangements characterised by the converter used
- H02P2201/05—Capacitive half bridge, i.e. resonant inverter having two capacitors and two switches
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Inverter Devices (AREA)
- Electronic Switches (AREA)
Abstract
Description
Schaltungsanordnung zur Ansteuerung von Leistungs-MOS-FET-Gegentaktendstufen Die Erfindung betrifft eine Schaltungsanordnung zur Ansteuerung des potential mäßig hochliegenden Transistors in Leistungs-MOS-FET-Gegentaktendstufen mit einem Optokoppler und zwei Transistoren in Gegentakt-Emitterschaltung.Circuit arrangement for controlling power MOS-FET push-pull output stages The invention relates to a circuit arrangement for controlling the potential moderately high-level transistor in power MOS-FET push-pull output stages with an optocoupler and two transistors in push-pull emitter circuit.
Bei derartigen Schaltungsanordnungen, die beispielsweise zum Betrieb für frequenzgeführte Umrichter für Drehstrommotoren am gleichgerichteten 220 V-Netz vorgesehen sind, besteht die Schwierigkeit, daß die Opto-Koppler eine Schaltverzögerung verursachen. Da Optokoppler auch mit Basisableitwiderstand und Antisättigungsdiode keine kürzere Schaltverzögerung als ein bis zwei ps erreichen, können während dieser Zeit Querstromspitzen in der Gegentaktendstufe auftreten, die die Schaltverluste wesentlich erhöhen und unter Umständen zu einer Zerstörung der Transistoren führen.In such circuit arrangements, for example for operation for frequency-controlled converters for three-phase motors on rectified 220 V mains are provided, there is the problem that the opto-coupler has a switching delay cause. Since optocouplers also have a base leakage resistor and an anti-saturation diode no switching delay shorter than one to two ps can be achieved during this Time cross-current peaks occur in the push-pull output stage, which reduce the switching losses increase significantly and possibly lead to the destruction of the transistors.
Dieses Problem läßt sich zwar mit einem Zündübertrager und aufwendiger Ansteuerung der mit zwei Optokopplern im Gegentakt und anschließenden Schmitt-Träger lösen, jedoch sind diese Schaltungen relativ aufwendig.This problem can be solved with an ignition transformer and more complex Control of the two optocouplers in push-pull and the subsequent Schmitt carrier solve, but these circuits are relatively complex.
Aufgabe der Erfindung ist es, die genannte Schaltverzögerung mit einer einfachen Schaltungsanordnung'zu reduzieren.The object of the invention is to provide the switching delay mentioned with a simple circuit arrangement 'to reduce.
Diese Aufgabe wird erfindungsgemäß dadurch gelöst, daß zwischen die potentialmäßig tiefliegende Gegentaktemitterfolgestufe und den Basisanschluß des hochliegenden Optokopplers ein Kondensator ("Bootstrap"-Kondensator) geschaltet ist.This object is achieved in that between the potential-wise low-lying push-pull emitter follower stage and the base connection of the overhead optocoupler a capacitor ("bootstrap" capacitor) is connected is.
Durch die Erfindung wird der Vorteil erzielt, daß die Schaltverzögerung mit einfachen Mitteln wesentlich reduziert wird, so daß sich die Querstromspitzen sowohl in ihrer Höhe als auch in ihrer Dauer wesentlich verringern und praktisch keine Rolle mehr spielen.The invention has the advantage that the switching delay is significantly reduced by simple means, so that the cross-flow peaks both in amount and in duration substantially decrease and practical no longer play a role.
Der Gegenstand der Erfindung wird anhand der folgenden Ausführungsbeispiele näher erläutert. In der dazugehörenden Zeichnung zeigen Fig. 1 eine erste Schaltungsanordnung, Fig. 2 und Fig. 3 das Schaltverhalten der Cegentaktendstufe ohne und mit Bootsstrap-Kondensator, Fig 4 eine Schaltungsanordnung für einen Drehstrom-Asynchron-Motor am Einphasennetz.The subject matter of the invention is based on the following exemplary embodiments explained in more detail. In the accompanying drawing, Fig. 1 shows a first circuit arrangement, Fig. 2 and Fig. 3 the switching behavior of the Cegentakt output stage with and without bootsstrap capacitor, 4 shows a circuit arrangement for a three-phase asynchronous motor on a single-phase network.
In der Fig. 1 ist die Schaltungsanordnung in einer Leistungs-MOS-FET-Gegentaktendstufe mit den beiden Transistoren T 1 und T 2 dargestellt. Der potentialmäßig hochliegende Transistor T 1 wird von dem ebenfalls potentialmäßig hochliegenden Optokoppler O über die beiden Transistoren Tr 3 und Tr 4 in Gegentakt-Emitter Schaltung angesteuert.1 shows the circuit arrangement in a power MOS-FET push-pull output stage shown with the two transistors T 1 and T 2. The high potential The transistor T 1 is controlled by the optocoupler O, which is also at high potential driven via the two transistors Tr 3 and Tr 4 in a push-pull emitter circuit.
Die Ansteuerung des potentialmäßig tiefliegenden Endstufentransistors T 2 geschieht über die potential mäßig tiefliegenden Transistoren Tr 1 und Tr 2 in Gegentakt-Emitterschaltung. Zwischen diese potentialmäßig tief- liegende Gegentakt-Emitterfolgestufe und den Basisanschluß des hochliegenden Optokopplers 0 ist erfindungsgemäß der "Bootsstrap"-Kondensator C geschaltet.The control of the low-potential output stage transistor T 2 happens via the transistors Tr 1 and Tr 2, which are moderately low in potential in push-pull emitter circuit. Between these low potential lying Push-pull emitter follower stage and the base connection of the high-lying optocoupler 0 the "bootsstrap" capacitor C is connected according to the invention.
Dieser Kondensator C bewirkt nun, daß mit der schnellen positiven Flanke beim Einschalten des tiefliegenden Transistors T 2 ein Differenzierimpuls an die Basis des Optokopplertransistors gelangt. Hierdurch wird der Optokoppler 0 sofort durchgeschaltet und der hochliegende Transistor T 1 sperrt, bis die Photonen der Senderdiode diesen Zustand halten. Umgekehrt räumt der Differenzierimpuls beim Abschalten des Transistors T 2 (negative Flanke) die Basis des Optokopplertransistors so schnell aus, daß die Kollektorspannung sofort steigt und der Transistor T 1 einschaltet.This capacitor C now causes the rapid positive Edge when switching on the low-lying transistor T 2, a differentiating pulse reaches the base of the optocoupler transistor. This will make the optocoupler 0 switched through immediately and the high-lying transistor T 1 blocks until the photons the transmitter diode keep this state. Conversely, the differentiating impulse clears the Switching off the transistor T 2 (negative edge) the base of the optocoupler transistor so quickly that the collector voltage rises immediately and the transistor T 1 turns on.
In den Fig. 2 und 3 ist das Schaltverhalten der Gegentaktendstufe dargestellt, wobei die Messung jeweils am Gate der'Transistoren T 1 und T 2 durchgeführt wurde.In FIGS. 2 and 3, the switching behavior of the push-pull output stage is shown shown, the measurement being carried out at the gate of the transistors T 1 and T 2 became.
Die Kurven a) bezeichnen das Einschalt- und die Kurven b) das Ausschalt-Verhalten der Transistoren T 1 und T 2.The curves a) designate the switch-on behavior and the curves b) the switch-off behavior of the transistors T 1 and T 2.
Die Fig. 2 bezieht sich auf eine Schaltung ohne und die Fig. 3 auf eine Schaltung mit dem erfindungsgemäßen "Bootsstrap"-Kondensator. Den Figuren ist zu entnehmen, daß die Schaltverzögerung beim Einschalten zwischen den Transistoren T 1 und T 2 ohne "Bootsstrap"-Kondensator ca. 3 s und mit "Bootsstrap"-Kondensator ca. 50 ns beträgt. Beim Abschalten betragen die entsprechenden Schaltverzögerungen ca. 1,5 gs bzw. ca 80 ns. Somit wird mit der erfindungsgemäßen Schaltungsanordnung die Schaltverzögerung um einen Faktor größer 10 reduziert.FIG. 2 relates to a circuit without and FIG. 3 to a circuit with the inventive "bootsstrap" capacitor. The figures is it can be seen that the switching delay when switching on between the transistors T 1 and T 2 without "bootsstrap" capacitor approx. 3 s and with "bootsstrap" capacitor is approx. 50 ns. When switching off, the corresponding switching delays are approx. 1.5 gs or approx. 80 ns. Thus, with the circuit arrangement according to the invention the switching delay is reduced by a factor greater than 10.
In der Fig. 4 ist eine Schaltungsanordnung eines frequenzgeführten Umrichters für einen Drehstrom-Asynchron-Motor am Einphasennetz dargestellt. Um die drei Wicklungen R, S, T des Drehstrommotors M anzusteuern, wird die Schaltungsanordnung gemäß Fig. 1 verdoppelt, so daß sich zwei Gegentaktendstufen mit den Transistoren T 11, T 12, bzw.4 shows a circuit arrangement of a frequency-controlled Converter for a three-phase asynchronous motor on a single-phase network. Around to control the three windings R, S, T of the three-phase motor M, the circuit arrangement according to FIG. 1 doubled, so that two push-pull output stages with the transistors T 11, T 12, resp.
T 21, T 22 ergeben. Zwischen die tiefliegenden Gegentakt-Emitter-Folgestufen der Transistoren Tr 11, Tr 12, bzw. Tr 21, Tr 22 und den Basisanschluß der hochliegenden Optokoppler 0 1 bzw. 0 2 sind erfindungsgemäß die "Bootstrap"-Kondensatoren C 1 und C 2 geschaltet.M 21, M 22 result. Between the deep push-pull emitter subsequent stages of the transistors Tr 11, Tr 12, or Tr 21, Tr 22 and the base terminal of the high-lying According to the invention, optocouplers 0 1 and 0 2 are the "bootstrap" capacitors C 1 and C 2 switched.
1 Patentanspruch 4 Figuren1 claim 4 figures
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19833314300 DE3314300A1 (en) | 1983-04-20 | 1983-04-20 | Circuit arrangement for driving power MOS FET push-pull output stages |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19833314300 DE3314300A1 (en) | 1983-04-20 | 1983-04-20 | Circuit arrangement for driving power MOS FET push-pull output stages |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3314300A1 true DE3314300A1 (en) | 1984-10-25 |
Family
ID=6196869
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19833314300 Withdrawn DE3314300A1 (en) | 1983-04-20 | 1983-04-20 | Circuit arrangement for driving power MOS FET push-pull output stages |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE3314300A1 (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0613234A1 (en) * | 1993-02-22 | 1994-08-31 | General Electric Company | Single phase electronically commutated motor system and method |
US5696430A (en) * | 1993-02-22 | 1997-12-09 | General Electric Company | Circuit, motor, and method generating a signal representing back EMF in an energized motor winding |
US6169431B1 (en) | 1998-06-02 | 2001-01-02 | Infineon Technologies Ag | Drive circuit for a controllable semiconductor component |
EP0992114B1 (en) * | 1997-07-02 | 2001-10-24 | Infineon Technologies AG | Control circuit for a controllable semiconductor component |
WO2005081080A2 (en) * | 2004-02-17 | 2005-09-01 | Siemens Energy & Automation, Inc. | Buffered electrical isolator with switched output transistor |
CN103152018A (en) * | 2013-01-23 | 2013-06-12 | 苏州硅智源微电子有限公司 | Push-pull type switch driving circuit without overlapped signals |
CN104135257A (en) * | 2014-06-30 | 2014-11-05 | 安徽国科电力设备有限公司 | A novel steady practical controllable silicon triggering circuit |
DE19750168B4 (en) * | 1997-03-31 | 2014-11-20 | Mitsubishi Denki K.K. | Three power supplies for driver circuits of power semiconductor switches |
-
1983
- 1983-04-20 DE DE19833314300 patent/DE3314300A1/en not_active Withdrawn
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0613234A1 (en) * | 1993-02-22 | 1994-08-31 | General Electric Company | Single phase electronically commutated motor system and method |
US5696430A (en) * | 1993-02-22 | 1997-12-09 | General Electric Company | Circuit, motor, and method generating a signal representing back EMF in an energized motor winding |
CN1037478C (en) * | 1993-02-22 | 1998-02-18 | 通用电气公司 | Single phase electropically commutated motor system and method |
DE19750168B4 (en) * | 1997-03-31 | 2014-11-20 | Mitsubishi Denki K.K. | Three power supplies for driver circuits of power semiconductor switches |
EP0992114B1 (en) * | 1997-07-02 | 2001-10-24 | Infineon Technologies AG | Control circuit for a controllable semiconductor component |
US6169431B1 (en) | 1998-06-02 | 2001-01-02 | Infineon Technologies Ag | Drive circuit for a controllable semiconductor component |
WO2005081080A2 (en) * | 2004-02-17 | 2005-09-01 | Siemens Energy & Automation, Inc. | Buffered electrical isolator with switched output transistor |
WO2005081080A3 (en) * | 2004-02-17 | 2005-11-03 | Siemens Energy & Automat | Buffered electrical isolator with switched output transistor |
US7148738B2 (en) | 2004-02-17 | 2006-12-12 | Siemens Energy & Automation, Inc. | Systems, devices, and methods for providing control signals |
CN103152018A (en) * | 2013-01-23 | 2013-06-12 | 苏州硅智源微电子有限公司 | Push-pull type switch driving circuit without overlapped signals |
CN104135257A (en) * | 2014-06-30 | 2014-11-05 | 安徽国科电力设备有限公司 | A novel steady practical controllable silicon triggering circuit |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8139 | Disposal/non-payment of the annual fee |