DE3312796A1 - DIGITAL OSCILLATOR FOR GENERATING COMPLEX SIGNALS - Google Patents

Description

Licentia Patent-Verwaltungs-GmbH PTL-UL / Bl / hä

Theodor-Stern-Kai 1 UL 82/218

D-6000 Frankfurt 70

Digital oscillator for generating complex signals

The invention relates to a digital oscillator according to the The preamble of claim 1, as z. B. from DE-OS 30 07 907 is known.

Especially for digital receivers, which are used as quadrature receivers work, oscillators are required that emit a complex digital sine / cosine signal. Obvious and it is known to save the corresponding sine and cosine values in ROM tables. With recipients large bandwidth and high resolution requires this however, an enormous amount of memory required.

The object of the invention is therefore to provide a digital oscillator of the type mentioned at the outset, which is used in wide bandwidth and a minimal frequency resolution Total expenditure on storage space and computing circuits requires.

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The invention is in the claim. 1 marked. the further claims contain advantageous developments and embodiments of the invention.

The invention is explained in more detail below with reference to the figures. As an exemplary embodiment, an oscillator is described _{which is intended to supply pairs of values cos (2T kf "M} / f.)., Sin (2π. Kfw / f.) To a mixer at a data rate of T. = 100 MHz. The mixing frequency f" is intended 0 ^ f _M ^ 30 MHz, the frequency resolution is 10 Hz.

FIG. 1 shows a block diagram of the invention Oscillator. The arithmetic unit is structured in three stages RWI to RWIII. For all connections is the Number of bit lines specified. The underlined values refer to those described below second version with RWII. From a control panel

Ci

the oscillator receives the value f,. / f, as a binary number in the N M A -

Form ^> ß.2 'transmitted. In the embodiment must.

N = 24 to cover the resulting range of values. A digital .Rechenschalturtg, realized by an overflowing integrator, forms from the value f _M / f. the sequence of values x (k) = ((kf _M / f _A ) modulo 1). x (k) represents the fractional part of kf _M / f. and it applies

M 0 £ x (k) <l. From x (k), represented by] 5 ^ α.2 ~ ^χ , im

i = l ^X embodiment is M = 21, the value sequence sin (2TOc (k)), cos (2roc (k)) is calculated with the help of the stages RWI, RWII and RWIII, which because of the periodicity of sine and cosine with respect to 2 K already corresponds to the desired oscillator signal. The symmetry properties of sine and cosine are used, and the calculation of sin (2 Hx (k)), cos (2Tt _x (k)) on the value of sin (2 KST (k)) and cos (2Ux (k) ) with 0 έ x (k) <1/8. which

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The function of the individual stages of the arithmetic unit arises from the following mathematical formulation of the relationships. The algorithm for calculating the pair of values sin (2 7tx (k)), cos (2 7tx (k)) can through

^ 1II / ⁽ ~ ^ II [fjixW ^{mod 2} " ³ 'Ot ₃ ) J, (X ₁ , Ot ₂ , Ot ₃ J are described with the functions

“/ X (k) mod 2 ~ ³ for Ot = 0

mod 2 ~ ^J , Ot): = J ^J

"- * (_ 2" "- x (k) mod 2 ~ ° for Ot = 1

: = / _sin (2 rtx (k)), cos (2Kx (k)) J

- i ^ ii [sin (2 TCx (k)), cos (2 TTxOk)), a ^ a ₂ , a ₃ I follows the one shown in FIG. 2 specified function table. Ot., Ot and 0t "

1 ώ J

correspond to the first 3 bits of the dual representation of

21 -i -3

x (k) => α. · 2 and x (k) mod 2 is identical to X = I

^> Ot. 2. Accordingly, in FIG. 1 the bit lines

divided and Ot ₁ to ot "fed as control inputs to the stages RWI or RWIII according to the specified functions.

A simple implementation of the first stage RWI is shown in FIG. 3 shown, consisting of a multiplexer MUX1 and a complement builder (2 compl.). The multiplexer

- 3 gives the value χ = χ mod 2 resp. its 2's complement.

A simple implementation of the third stage RWIII shows FIG. 4t. It essentially consists of two multiplexers MUX2 and MUX3 as well as two complementing devices in one data input each of the multiplexer. According to the function table

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PIG. 2 the output values can be sin (2TCx) or cos (2Ttx) depending on Ot α OC the four values ± sin (2 TCaOj Assume ± cos (2 KSc). These values are accordingly at the data inputs of both multiplexers, derived from the values sin (2 TtSc) and cos (2 Tt> Q, which are derived from of the second stage RWII.

In the exemplary embodiment, RWII separates for the second stage at first glance an obvious table solution for determining sin (2 TIx) and cos (2 TC-SQ, because for this a memory requirement of 2 k bits would still be required. It two advantageous developments of the invention are therefore specified, which implement the 'second stage allow with minimal overall effort.

FIG. 5 shows an embodiment of the first advantageous * -5 further development of the invention. It is based on a series development for sine and cosine:

sin (2Ttx) = sin (2K (x'-h + h)) «» sin (2Tt (xVh)) + cos (2Tt (x-h)) * 2Tth cos (2TtSc) = cos (2Tt (x-h + h)) «* cos (2Tt (x-h)) - sin (2Tt (x-h)) '2TTh.

The error is less than or equal to = and can

sufficient distribution of χ in (x-h) and h can be kept small. The values sin (2Tt (x-h)) and cos (2Tt (JC-Ii)) are calculated using two tables, Sinus-ROM and cosine ROM. Since Sc-h has a much shorter dual representation than jc, reasonable ones now result ROM sizes. In addition to these tables, there are three multiplications, one complement and two for the calculation Additions required: In the multiplier Ml, h is multiplied by 2Tt, in M2 or M3 the product of 2Tth and the Output values of the ROMs formed. In the adders ADDl

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and ADD2, the values are finally combined according to the aforementioned series development. The "R" in the multipliers means that the output values are rounded. The in FIG. 5 specified splitting of

21. 11. '21.

Sc = ZI I2 " ¹ in x ^ h = SI ä.S" ^{1 and} Mi = ^ I * · 2 ~ ^Χ

i = 4 ^X. i = 4 ^X ■ i = 12 ^X

is optimal in the sense of a minimal total effort.

FIG. 6 shows an embodiment of the second advantageous development of the invention. It is based on the calculation of sin (2Ttx) and cos (2n5?) Using an iterative method for converting polar coordinates (r, ψ) into Cartesian coordinates (x, y). In the process, z = x + jy = r cos φ + jr sin ψ is gradually passed through the

Vector ζ = χ + jy approximated. Starting with χ = r and η η η ·. ο

y = 0 in the η-th iteration step the vector ζ "= χ" + jy. by the angle /! " = ± arctan 2 ~ ⁿ on ζ n-1 n-1 ^dJ nl, ·! "

turned off. In which direction rotated. will depend on each depends on whether the difference angle reached

= 4> - / If between ζ and ζ a positive or

η · * ■ —— ^β m η ι

m = l I

has assumed a negative value. The method converges because / Δψ I * arctan 2 ~ tends towards zero. The output values r = 1 and Φ = 2TCx * result in an approximation for cos (2Kx) and sin (2K5c). Mathematically, the nth iteration step can be represented as follows:

π ^Jy n " ^v n-1 ^Jy n-l '

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Λ.

j ) tan

n-1 n-1

with sign ( jf ") = sign (27tx - ^> f _m ) = sign (x- > · / / 2π).

m = l m = l '

Because of tan / ^ "J = 2, no real multiplications are required to calculate χ and y, only shift operations. Since the number of digits is fixed from the start, they can be carried out through appropriate wiring. The multiplications with cos jf" are already performed in the first iteration step considered. Here, too, a shift operation is sufficient with a permissible error. According to the given relationship, an addition or subtraction is necessary to calculate χ, y and sign (/ ^).

In order to keep the iteration error sufficiently small, in the exemplary embodiment a total of 17 iteration steps intended.

In the embodiment according to FIG. 6 are the first five iteration steps replaced by SIN-ROM and COS-ROM panels.

8 23

For this purpose, χ becomes in Sc-h = > S.2 ~ ^x and h = > δί. 2 " ¹ recorded

i = 4 ^x i = 9 ^x

columns. Sc-h serves as the address for the sine / cosine

blackboard. The iteration is based on x_ = k cos (2Tt (x-h))

and y_ = k sin (2ft (Sc-h))
5

17 17 _ _m

with k = TT ~~ cos y = "T7 ~ cos (arctan (2)). m = 6 m = 6

These values are added to the adders (+) of the following stages in accordance with the iteration formula given above linked together. The multiplication by tan

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corresponding shift operations are shown in FIG. 6 indicated by circles. Before the shift operations sign (/ ") taken into account, denoted by VZ in the figure. In the right part of FIG. 6 becomes the value / "/ 2Tt for h added, depending on the sign VZ of the sum reached in the previous stage, the value + -

—M

. arctan 2 ".... or - rz- addxert.

German 71

1Z

- blank page -

Claims (8)

Licentia Patent-Verwaltungs-GmbH PTL-UL / Bl / hä Theodor-Stern-Kai 1 UL 82/218 D-6000 Frankfurt 70 patent claims 1.) Digital oscillator for generating complex signals of the form cos (2rtk f _M / f _A > + (j) sin (2Ukf _M / f _A > with the clock frequency f. and the oscillator frequency f _M , where from Ά ι Ι _{the frequency information f M} / f present as a binary number. the signal sequence by means of an overflowing integrator x (k) = (kf _M / f _A ) mod 1, dual represented by ^> α. 2 ~ ^x , i = l ^x formed and these with the help of stored sine and cosine tables in an arithmetic unit in the signal sequences. cos (2TCk f _M / f.) = cos / "(2rtk f _M / f _A ) mod 2π7 = cos / ~ 2π ((kf _M / f _A ) mod 1) 7 MA" - MA ^J L- MA ^J and sin <2TCk f _M / f. ) = sin f (2nk f _M / f _A ) mod 2π] = sinf27T: ((kf _M / f.) mod 1) 7 M ^- A ^u MA * ^u MA - » be converted, characterized in that the arithmetic unit consists of three levels (RWI, RWII ₁ ,, RWIII), - its first stage (RWI) depending on the value of the bit Or. ,, which is connected to a control input of this stage is placed, the output value jc (k) forms according to the following Regulation UL 82/218 x (k) mod 2 , -3 mod 2 for α = 0 .2 ~ ³ -x- (k) mod 2 ~ ³ for α = 1; - whose second stage (RWII. _{/ o} ) forms a complex sine-y / cosine value pair from the value x (k) according to the function T ₁₁ (x (k)): = [sin (2π ^ (k)), cos (2π x (k)) l; - and its third stage (RWIII) depending on the values of the bits OC ₁ , (X ₂ , (X. ,, which are applied to the control inputs of this stage, from the value pair J_sin (2itx (k)), cos (2TCx ( k)) J forms a value pair [sin (2 Ttx (k)), cos (2Tt x (k)) ~ j according to the following table of functions Control inputs CX2 α ₃ Exit 1 Exit 2 αϊ 0 0 sin (2 Tt χ) cos (2 πχ) 0 0 1 sin (2 π χ) cos (2 π χ) 0 τ-Ι 0 cos (2 Tt χ) sin (2Tt 5c) 0 1 1 cos (2 π χ) -sin (2 Tt χ) 0 0 0 ■ sin (2 Tt χ) -cos (2 π Sc) 1 0 1 -sin (2 π χ) -cos (2 π χ) 1 1 0 -cos (2 η χ) -sin (2 π χ) 1 1 τ-Ι -cos (2 KSt) sin (2 Tt χ) 1 -sin (2 Tt SO cos (2 π χ) (FIG. 1) 2. Digital oscillator according to claim 1, characterized in that the first stage (RWI) of the arithmetic unit a multiplexer (MUXl) with two data inputs, a data output and a control input, and that on the one data input the bits tt, to (X of the binary position x (k) = ^> 0L.2 ~ ^X directly, to the other data input via a complement generator (2 compl.) are placed (FIG. 3). , - 3 - UL 82/218 3. Digital oscillator according to claim 1, characterized in that that the third stage (RWIII) of the arithmetic unit consists of two multiplexers (MUX2, MUX3) each with four data inputs, there is one data output and three control inputs each, and that of the second Step (RWII) delivered values sin (2Ttx) and cos (2 Tt Sc) on the one hand directly and on the other hand via complementary (2er compl.) Are placed on the data inputs of the two multiplexers (MUX2, MUX3) (FIG. 4). 4. Digital oscillator according to claim 1, characterized in that before the second stage (RWII) of the arithmetic unit, the value x (k) is split into a value (xh) and a value h, that only the sine and cosine values for (xh ) are stored in tables, and that the second stage (RWII ₁ ) contains the value pair £ sin (2 rtx (k)), cos (2 Tt 5c (k)) ^ | calculated according to the following rule: sin (2llx) * sin (2 π (xh)) + cos (2 Tt (xh)) 2 π h cos (2 itx) * cos (2 π (xh)) - sin (2 Tt (xh)) - 2lth. 5. Digital oscillator according to claim 4, characterized by the following structure: - the value (x-h) is on the one hand a sine table (sine ROM), on the other hand a cosine table (cosine ROM) supplied as an address, the tables give the values sin (2 Tt (x-h)) or cos (2 π (x-h)); - The value h is fed to a first multiplier (Ml) for multiplication by 2 Tt; the result is ever a second and third multiplier (M2, M3) for multiplication by the value sin (2 Tt (x-h)) or cos (2 Tt (x-h)) supplied; - 4 - UL 82/218 the output value of the third multiplier (M3) and the value sin (2 π (Sc-h)) are further a first adder (ADDl) supplied for addition; - The output value of the second multiplier (M2) is after the complement formation (2's compl.) and the value cos (2 Tt (x-h)) is also fed to a second adder (ADD2) for addition (FIG. 5). 6. Digital oscillator according to claim 1, characterized in that in the second stage (RWII) of the arithmetic unit the calculation of the value pair (jsin (2 π x), cos (2Ttx) J according to an iterative process for converting polar coordinates (r, ψ) into Cartesian coordinates (x = r cos ψ, y = r sin ψ) takes place, with r = 1 and ψ = 2πχ (FIG. 6). 7 · Digital oscillator according to Claim 6, characterized in that, starting from χ = 1 and y = 0 in the nth iteration step of the. Vector ζ . = χ .. + jy * around the n-1 n-1 ° ^J n-1 Angle J ^ = ± arctan 2 on the vector. ζ = cos (2tcx) + j 3ΐη (2πχ) is turned off, whereby the direction of rotation depending on the sign of the difference n-1 angle Δ «Ρ = 2 π χ- 5 ~~ t is chosen. η * - -χ ^u m
m = l 8. Digital oscillator according to claim 7, characterized in that at the beginning of the second stage (RWII) the value x (k) is split into two values (x "-h) and h and that the iteration is based on x_ = cos (2π ( χ-1ι)) and y_ = sin (2 TC (xh)) takes place, the sine and cosine values for (xh) being stored in tables (SIN-ROM, COS-ROM) (FIG. 6).