DE3177181D1 - Anordnung zur erkennung und verarbeitung von synonymen in cache-speichern. - Google Patents
Anordnung zur erkennung und verarbeitung von synonymen in cache-speichern.Info
- Publication number
- DE3177181D1 DE3177181D1 DE8686112937T DE3177181T DE3177181D1 DE 3177181 D1 DE3177181 D1 DE 3177181D1 DE 8686112937 T DE8686112937 T DE 8686112937T DE 3177181 T DE3177181 T DE 3177181T DE 3177181 D1 DE3177181 D1 DE 3177181D1
- Authority
- DE
- Germany
- Prior art keywords
- detecting
- arrangement
- cache storage
- synonyms
- processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
- G06F12/1054—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache the data cache being concurrently physically addressed
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0817—Cache consistency protocols using directory methods
- G06F12/0822—Copy directories
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/205,486 US4400770A (en) | 1980-11-10 | 1980-11-10 | Cache synonym detection and handling means |
US06/205,500 US4394731A (en) | 1980-11-10 | 1980-11-10 | Cache storage line shareability control for a multiprocessor system |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3177181D1 true DE3177181D1 (de) | 1990-06-21 |
Family
ID=26900469
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8686112937T Expired - Fee Related DE3177181D1 (de) | 1980-11-10 | 1981-10-05 | Anordnung zur erkennung und verarbeitung von synonymen in cache-speichern. |
DE8181107928T Expired DE3176632D1 (en) | 1980-11-10 | 1981-10-05 | Cache storage hierarchy for a multiprocessor system |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8181107928T Expired DE3176632D1 (en) | 1980-11-10 | 1981-10-05 | Cache storage hierarchy for a multiprocessor system |
Country Status (2)
Country | Link |
---|---|
EP (2) | EP0051745B1 (de) |
DE (2) | DE3177181D1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0051745B1 (de) | 1980-11-10 | 1988-01-27 | International Business Machines Corporation | Pufferspeicherhierarchie für ein Multiprozessorsystem |
US4484267A (en) * | 1981-12-30 | 1984-11-20 | International Business Machines Corporation | Cache sharing control in a multiprocessor |
US4463420A (en) * | 1982-02-23 | 1984-07-31 | International Business Machines Corporation | Multiprocessor cache replacement under task control |
US4503497A (en) * | 1982-05-27 | 1985-03-05 | International Business Machines Corporation | System for independent cache-to-cache transfer |
US4695951A (en) * | 1983-07-07 | 1987-09-22 | Honeywell Bull Inc. | Computer hierarchy control |
US4612612A (en) * | 1983-08-30 | 1986-09-16 | Amdahl Corporation | Virtually addressed cache |
US4785398A (en) * | 1985-12-19 | 1988-11-15 | Honeywell Bull Inc. | Virtual cache system using page level number generating CAM to access other memories for processing requests relating to a page |
US4797814A (en) * | 1986-05-01 | 1989-01-10 | International Business Machines Corporation | Variable address mode cache |
KR920001282B1 (ko) * | 1987-10-02 | 1992-02-10 | 가부시키가이샤 히타치세이사쿠쇼 | 버퍼메모리 제어장치 |
US5175837A (en) * | 1989-02-03 | 1992-12-29 | Digital Equipment Corporation | Synchronizing and processing of memory access operations in multiprocessor systems using a directory of lock bits |
EP0384102A3 (de) * | 1989-02-22 | 1992-04-29 | International Business Machines Corporation | Mehrprozessor-Cachespeicher mit auf grober Granularität beruhender exklusiver Reservierung |
US5210848A (en) * | 1989-02-22 | 1993-05-11 | International Business Machines Corporation | Multi-processor caches with large granularity exclusivity locking |
JPH035851A (ja) * | 1989-06-01 | 1991-01-11 | Fujitsu Ltd | バッファ記憶装置 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3736566A (en) | 1971-08-18 | 1973-05-29 | Ibm | Central processing unit with hardware controlled checkpoint and retry facilities |
US3735360A (en) * | 1971-08-25 | 1973-05-22 | Ibm | High speed buffer operation in a multi-processing system |
US3771137A (en) * | 1971-09-10 | 1973-11-06 | Ibm | Memory control in a multipurpose system utilizing a broadcast |
US3723976A (en) * | 1972-01-20 | 1973-03-27 | Ibm | Memory system with logical and real addressing |
FR2344094A1 (fr) * | 1976-03-10 | 1977-10-07 | Cii | Systeme de gestion coherente des echanges entre deux niveaux contigus d'une hierarchie de memoires |
US4136385A (en) * | 1977-03-24 | 1979-01-23 | International Business Machines Corporation | Synonym control means for multiple virtual storage systems |
US4136386A (en) | 1977-10-06 | 1979-01-23 | International Business Machines Corporation | Backing store access coordination in a multi-processor system |
DE2947115A1 (de) * | 1978-12-11 | 1980-06-26 | Honeywell Inf Systems | Loeschanordnung fuer einen cache- speicher eines prozessors in einem multiprozessorsystem |
US4293910A (en) | 1979-07-02 | 1981-10-06 | International Business Machines Corporation | Reconfigurable key-in-storage means for protecting interleaved main storage |
US4332010A (en) * | 1980-03-17 | 1982-05-25 | International Business Machines Corporation | Cache synonym detection and handling mechanism |
EP0051745B1 (de) | 1980-11-10 | 1988-01-27 | International Business Machines Corporation | Pufferspeicherhierarchie für ein Multiprozessorsystem |
-
1981
- 1981-10-05 EP EP81107928A patent/EP0051745B1/de not_active Expired
- 1981-10-05 DE DE8686112937T patent/DE3177181D1/de not_active Expired - Fee Related
- 1981-10-05 EP EP86112937A patent/EP0212678B1/de not_active Expired - Lifetime
- 1981-10-05 DE DE8181107928T patent/DE3176632D1/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0212678A3 (en) | 1987-08-12 |
EP0051745B1 (de) | 1988-01-27 |
DE3176632D1 (en) | 1988-03-03 |
EP0051745A3 (en) | 1984-07-18 |
EP0212678A2 (de) | 1987-03-04 |
EP0051745A2 (de) | 1982-05-19 |
EP0212678B1 (de) | 1990-05-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |