DE3177087D1 - Data processing system with a plurality of input/output buses - Google Patents

Data processing system with a plurality of input/output buses

Info

Publication number
DE3177087D1
DE3177087D1 DE8585200462T DE3177087T DE3177087D1 DE 3177087 D1 DE3177087 D1 DE 3177087D1 DE 8585200462 T DE8585200462 T DE 8585200462T DE 3177087 T DE3177087 T DE 3177087T DE 3177087 D1 DE3177087 D1 DE 3177087D1
Authority
DE
Germany
Prior art keywords
input
data processing
processing system
output buses
buses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8585200462T
Other languages
German (de)
English (en)
Inventor
David H Bernstein
Richard A Carberry
Michael B Druke
Ronald I Gusowski
Edward M Buckley
Roger W March
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMC Corp
Original Assignee
Data General Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/120,271 external-priority patent/US4371925A/en
Priority claimed from US06/120,272 external-priority patent/US4394736A/en
Priority claimed from US06/120,291 external-priority patent/US4464772A/en
Application filed by Data General Corp filed Critical Data General Corp
Application granted granted Critical
Publication of DE3177087D1 publication Critical patent/DE3177087D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
    • H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
    • H03K23/667—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses by switching the base during a counting cycle
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22—Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4217—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection
    • G06F9/268—Microinstruction selection not based on processing results, e.g. interrupt, patch, first cycle store, diagnostic programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
  • Manipulation Of Pulses (AREA)
  • Executing Machine-Instructions (AREA)
DE8585200462T 1980-02-11 1981-02-11 Data processing system with a plurality of input/output buses Expired DE3177087D1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US12029280A 1980-02-11 1980-02-11
US06/120,271 US4371925A (en) 1980-02-11 1980-02-11 Data processing system having unique bus control operation
US06/120,272 US4394736A (en) 1980-02-11 1980-02-11 Data processing system utilizing a unique two-level microcoding technique for forming microinstructions
US06/120,291 US4464772A (en) 1980-02-11 1980-02-11 Frequency synthesizer for providing a pseudo-constant frequency signal
EP81300560A EP0035334B1 (en) 1980-02-11 1981-02-11 Data processing system with two level microprogramming

Publications (1)

Publication Number Publication Date
DE3177087D1 true DE3177087D1 (en) 1989-09-21

Family

ID=27494306

Family Applications (3)

Application Number Title Priority Date Filing Date
DE8181300560T Expired DE3172395D1 (en) 1980-02-11 1981-02-11 Data processing system with two level microprogramming
DE8585200462T Expired DE3177087D1 (en) 1980-02-11 1981-02-11 Data processing system with a plurality of input/output buses
DE8383200684T Expired DE3175667D1 (en) 1980-02-11 1981-02-11 Frequency synthesizer

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE8181300560T Expired DE3172395D1 (en) 1980-02-11 1981-02-11 Data processing system with two level microprogramming

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE8383200684T Expired DE3175667D1 (en) 1980-02-11 1981-02-11 Frequency synthesizer

Country Status (6)

Country Link
EP (4) EP0164138B1 (enExample)
JP (1) JPS6319854Y2 (enExample)
AU (3) AU541189B2 (enExample)
BR (1) BR8100790A (enExample)
DE (3) DE3172395D1 (enExample)
IL (1) IL62055A (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU541189B2 (en) 1980-02-11 1984-12-20 Data General Corporation Data processing system
US4476527A (en) * 1981-12-10 1984-10-09 Data General Corporation Synchronous data bus with automatically variable data rate
FR2538140B1 (fr) * 1982-12-21 1988-06-24 Thomson Csf Mat Tel Dispositif de couplage de bus pour systeme de traitement de donnees a bus multiples
US4837785A (en) * 1983-06-14 1989-06-06 Aptec Computer Systems, Inc. Data transfer system and method of operation thereof
US5199106A (en) * 1986-09-19 1993-03-30 International Business Machines Corporation Input output interface controller connecting a synchronous bus to an asynchronous bus and methods for performing operations on the bus
EP0260392A3 (en) * 1986-09-19 1992-03-11 International Business Machines Corporation An input output interface controller connecting a synchronous bus to an asynchronous bus and methods for performing operations on the buses
US4817037A (en) * 1987-02-13 1989-03-28 International Business Machines Corporation Data processing system with overlap bus cycle operations
JPH0276056A (ja) * 1988-09-13 1990-03-15 Toshiba Corp 情報処理装置
CA2007737C (en) * 1989-02-24 1998-04-28 Paul Samuel Gallo Data transfer operations between two asynchronous buses
WO1993016434A1 (en) * 1992-02-13 1993-08-19 Tandy Corporation Method and apparatus to reduce computer system bus interleave overhead
JPH0827773B2 (ja) * 1992-10-23 1996-03-21 インターナショナル・ビジネス・マシーンズ・コーポレイション データ経路を使用可能にする方法、装置およびデータ処理システム
FR2716053B1 (fr) * 1994-02-09 1996-04-26 Sat Procédé de génération d'une fréquence particulière par division d'une fréquence de référence.
JP3016179B2 (ja) * 1995-06-27 2000-03-06 るいエンジニアリング株式会社 削孔機用スイベル
WO2007097036A1 (ja) 2006-02-27 2007-08-30 Fujitsu Limited 中央処理装置、中央処理装置の制御方法、情報処理システム
US20190158127A1 (en) * 2017-11-23 2019-05-23 M31 Technology Corporation Encoding and decoding architecture for high-speed data communication system and related physical layer circuit, transmitter and receiver and communication system thereof

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1188034A (fr) * 1957-11-21 1959-09-18 Trt Telecom Radio Electr Moyens d'intercorrélation pour plusieurs stations émettrices d'informations
US3221307A (en) * 1960-12-07 1965-11-30 Ibm Automatic tape unit selector
US3217267A (en) * 1963-10-02 1965-11-09 Ling Temco Vought Inc Frequency synthesis using fractional division by digital techniques within a phase-locked loop
DE1958662B2 (de) * 1969-11-22 1971-12-30 Siemens AG, 1000 Berlin u. 8000 München Digitaler impulsfolgenteiler mit optimaler gleichverteilung der aus einer aequidistanten eingangsimpulsfolge ausgewaehl ten impulse einer ausgangsimpulsfolge
US3786434A (en) * 1972-12-20 1974-01-15 Ibm Full capacity small size microprogrammed control unit
JPS5250112B2 (enExample) * 1973-06-07 1977-12-22
DE2336676C3 (de) * 1973-07-19 1981-06-19 Ibm Deutschland Gmbh, 7000 Stuttgart Einrichtung zur Modifizierung von Mikroprogrammbefehlen
IT995721B (it) * 1973-10-10 1975-11-20 Honeywell Inf Systems Italia Apparato per l interpretazione di codici di funzione in calcolatori microprogrammati e per l indirizza mento indipendente di fasi inter pretative ed esecutive di micro programma
DE2510766A1 (de) * 1975-03-12 1977-02-17 Schlafhorst & Co W Verfahren und vorrichtung zur selbsttaetigen digitalen division einer frequenz
US4000485A (en) * 1975-06-30 1976-12-28 Honeywell Information Systems, Inc. Data processing system providing locked operation of shared resources
US3997896A (en) * 1975-06-30 1976-12-14 Honeywell Information Systems, Inc. Data processing system providing split bus cycle operation
JPS538034A (en) * 1976-06-30 1978-01-25 Toshiba Corp Electronic computer
US4081755A (en) * 1976-08-10 1978-03-28 Litton Business Systems, Inc. Baud rate generator utilizing single clock source
US4084082A (en) * 1976-10-12 1978-04-11 Fairchild Camera And Instrument Corporation Programmable counter
US4186379A (en) * 1977-04-28 1980-01-29 Hewlett-Packard Company High-speed data transfer apparatus
US4148011A (en) * 1977-06-06 1979-04-03 General Automation, Inc. Asynchronous priority circuit for controlling access to a bus
AU541189B2 (en) 1980-02-11 1984-12-20 Data General Corporation Data processing system

Also Published As

Publication number Publication date
AU3910085A (en) 1985-09-05
BR8100790A (pt) 1981-08-25
EP0097977A3 (en) 1984-02-15
IL62055A0 (en) 1981-03-31
JPS6319854Y2 (enExample) 1988-06-02
AU6679081A (en) 1981-09-03
AU573310B2 (en) 1988-06-02
EP0094140A1 (en) 1983-11-16
AU541189B2 (en) 1984-12-20
EP0097977A2 (en) 1984-01-11
JPS6312231U (enExample) 1988-01-27
EP0035334B1 (en) 1985-09-25
EP0035334A3 (en) 1981-12-09
EP0164138A1 (en) 1985-12-11
DE3175667D1 (en) 1987-01-15
EP0035334A2 (en) 1981-09-09
IL62055A (en) 1987-11-30
AU1380588A (en) 1988-06-23
EP0164138B1 (en) 1989-08-16
DE3172395D1 (en) 1985-10-31
EP0097977B1 (en) 1986-11-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee