DE3176292D1 - Substrate and integrated circuit module with this substrate - Google Patents
Substrate and integrated circuit module with this substrateInfo
- Publication number
- DE3176292D1 DE3176292D1 DE8181102043T DE3176292T DE3176292D1 DE 3176292 D1 DE3176292 D1 DE 3176292D1 DE 8181102043 T DE8181102043 T DE 8181102043T DE 3176292 T DE3176292 T DE 3176292T DE 3176292 D1 DE3176292 D1 DE 3176292D1
- Authority
- DE
- Germany
- Prior art keywords
- substrate
- integrated circuit
- circuit module
- module
- integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/143,216 US4364100A (en) | 1980-04-24 | 1980-04-24 | Multi-layered metallized silicon matrix substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3176292D1 true DE3176292D1 (en) | 1987-08-06 |
Family
ID=22503105
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8181102043T Expired DE3176292D1 (en) | 1980-04-24 | 1981-03-19 | Substrate and integrated circuit module with this substrate |
Country Status (4)
Country | Link |
---|---|
US (1) | US4364100A (de) |
EP (1) | EP0038931B1 (de) |
JP (1) | JPS5927120B2 (de) |
DE (1) | DE3176292D1 (de) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57181356A (en) * | 1981-04-30 | 1982-11-08 | Hitachi Ltd | Sintered aluminum nitride body with high heat conductivity |
US4540621A (en) * | 1983-07-29 | 1985-09-10 | Eggerding Carl L | Dielectric substrates comprising cordierite and method of forming the same |
US4619697A (en) * | 1984-08-30 | 1986-10-28 | Mitsubishi Kinzoku Kabushiki Kaisha | Sputtering target material and process for producing the same |
US4608354A (en) * | 1984-12-24 | 1986-08-26 | Gte Laboratories Incorporated | Silicon nitride substrate |
DE3536883A1 (de) * | 1985-10-16 | 1987-04-16 | Isola Werke Ag | Basismaterial fuer gedruckte schaltungen |
US4882454A (en) * | 1988-02-12 | 1989-11-21 | Texas Instruments Incorporated | Thermal interface for a printed wiring board |
US4882657A (en) * | 1988-04-06 | 1989-11-21 | Ici Array Technology, Inc. | Pin grid array assembly |
DE3814863A1 (de) * | 1988-05-02 | 1989-11-16 | Siemens Ag | Verfahren zum herstellen von vielschichtenkeramik auf silikatbasis |
US5409517A (en) * | 1990-05-15 | 1995-04-25 | Kabushiki Kaisha Toshiba | Sputtering target and method of manufacturing the same |
JP2756075B2 (ja) * | 1993-08-06 | 1998-05-25 | 三菱電機株式会社 | 金属ベース基板およびそれを用いた電子機器 |
US9741881B2 (en) * | 2003-04-14 | 2017-08-22 | S'tile | Photovoltaic module including integrated photovoltaic cells |
GB0623328D0 (en) * | 2006-11-22 | 2007-01-03 | Airbus Uk Ltd | A method for forming a feature in a piece of composite material |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3180742A (en) * | 1961-06-27 | 1965-04-27 | Dwight G Bennett | Elevated temperature resistant ceramic structural adhesives |
US3461524A (en) * | 1966-11-02 | 1969-08-19 | Bell Telephone Labor Inc | Method for making closely spaced conductive layers |
GB1180908A (en) * | 1966-11-17 | 1970-02-11 | English Electric Co Ltd | Improvements in or relating to processes for Forming an Insulating Coating on Silicon, and to Coated Silicon |
US3628778A (en) * | 1970-04-02 | 1971-12-21 | United States Steel Corp | Inner cover and method of making the same |
US3826813A (en) * | 1972-06-20 | 1974-07-30 | Ibm | Process for the preparation of mullite by a solid state reaction |
US3996885A (en) * | 1973-01-26 | 1976-12-14 | Eastman Kodak Company | Apparatus for coating a multiple number of layers onto a substrate |
US4040849A (en) * | 1976-01-06 | 1977-08-09 | General Electric Company | Polycrystalline silicon articles by sintering |
US4109377A (en) * | 1976-02-03 | 1978-08-29 | International Business Machines Corporation | Method for preparing a multilayer ceramic |
US4168343A (en) * | 1976-03-11 | 1979-09-18 | Matsushita Electric Industrial Co., Ltd. | Thermal printing head |
US4261781A (en) * | 1979-01-31 | 1981-04-14 | International Business Machines Corporation | Process for forming compound semiconductor bodies |
-
1980
- 1980-04-24 US US06/143,216 patent/US4364100A/en not_active Expired - Lifetime
-
1981
- 1981-03-19 DE DE8181102043T patent/DE3176292D1/de not_active Expired
- 1981-03-19 EP EP81102043A patent/EP0038931B1/de not_active Expired
- 1981-03-20 JP JP56039735A patent/JPS5927120B2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
US4364100A (en) | 1982-12-14 |
EP0038931A2 (de) | 1981-11-04 |
JPS5927120B2 (ja) | 1984-07-03 |
JPS56161696A (en) | 1981-12-12 |
EP0038931A3 (en) | 1984-07-25 |
EP0038931B1 (de) | 1987-07-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |