DE3130042A1 - DEVICE FOR SINGLE-SIDED BAND MULTIPLEXE TRANSMISSION THROUGH DIGITAL PROCESSING - Google Patents

Description

'* "" "

TELETTRA

Telefonia Eletronica e Radio S.p.A.

Corso Buenos Aires 77 / A Milan (Italy)

Device for single sideband multiplex transmission through digital processing

Priority Italian patent application 23791 A / 80 of July 30, 1980

Representative: patent attorneys

Dipl. Ing. S. Schulze Horn M. Sc. Dr. H. Hoffmeister Goldstrasse 36 4400 Münster

Device for single sideband multiplex transmission by ". Digitalverarbeitung

The invention relates to a device by means of Digital processing is the multiplex and demultiplex transmission in the 1 Sb (single sideband) modulation method allows a predetermined number of baseband signals that have frequency spectra between 0 and 4 kHz. These baseband signals can be in the form of analog signals that are transmitted by means of a preprocessing network a frequency of 8 kHz and converted into digital values. However, you can already be encoded in digital form and on a time division basis on one or more transmission channels, z. With 24 or 34 signals per channel, commonly referred to as 24 or 30 channel PCM flow referred to as. After final processing, these baseband signals can be digitally processed be subjected to a 1 Sb multiplex function. By this operation is supplied with a signal that by means of known digital-to-analog conversion as well as subsequent modulations and filtering assigned to the frequency band that can be used for transmission in frequency division multiplex systems (FDM systems) is best suited.

• B β »

Devices for performing the aforementioned digital 1 Sb modulation are known ("IEEE-Transäetion on Communications "May 1978; U.S. Patents 4,131,766 and 4,013,842). In one of the known methods, N signals are generated in a frequency division multiplexing operation subjected to a discrete Fourier transform, the dimension of which is at least equal to N. The Fourier transform corresponds to a modulation, the signals emerging from a processor by at least N filters can be filtered ·. The N filters can be configured as a single filter with variable coefficients be. These filters are made up of a single filter with a frequency repetition period of its Filter function derived, which corresponds to the sampling frequency of the signal subjected to the frequency division multiplexing function, is equal to.

In principle, only a single filter is used according to the invention. However, this filter is in a Cascade connection composed of different filters and with different frequency repetition periods, which can generally be advantageously implemented with simple multiplication coefficients. The number of different types of filters is related to the number of a frequency division multiplexing function

χ- _ ····· ■ ·· ■■■ '■ ■■

submitting signals downsized. The frequency modulation method becomes partially with one in terms of the number of to be subjected to a multiplex function Signals greatly reduced number of modulators (multipliers) carried out, said modulators for the most part have a simple structure. Partly the frequency modulation is over carried out a processor for the Fourier transform, whose size - relative to the number of signals to be processed - is reduced. In the processor groups of the signals to be subjected to the multiplex function are processed in an identical manner, each signal group contains a number of signals, which corresponds to the number of signals to be processed, divided by a factor of 2 is equal. Such filters with different frequency repetition periods are used together with modulators to form a "fir tree structure" of filters and modulators, which has numerous inputs and only one output. This structure is intended to be duplicated on the one hand to process the real and on the other hand the imaginary parts of the signals. The fir tree structure the filters and modulators are modified so that those on the side with the greater number of inputs arranged filter can be used to a greater extent.

A main advantage of the invention compared to the prior art is that the adaptation of the Construction can be extremely flexible; simple multiplication coefficients can be easily implemented in the filters. Also be simplifies both the modulations and the Fourier transform required for the system. One An explanation of this system can be found in the following description, followed by an explanation of the theoretical basics for the realization of the device.

Any device for frequency division multiplexing a certain number of baseband signals must also be able to perform the reverse function, which - if the mode of operation is known - according to the general reversing principle can be derived. This principle is used in the embodiment to be described, which is why that part of the device will be described in detail which - starting from the 0-4 kHz baseband signals - the mentioned signals of a 1 Sb multiplex function subject. The demultiplexing operation of this device will also be explained.

The following are preferred embodiments of the

Invention explained in more detail with reference to the accompanying drawing. Show it:

FIG. 1 shows a schematic representation of the multiplex area of a device according to a preferred one Embodiment of the invention;

Figures 2a to 2e; graphical representations of the frequency spectrum of a broadband signal to be multiplexed same;

Figure 3a to 3d graphical representations of the division or arranging a filter in a cascade circuit with a decreasing frequency repetition period of the frequency response, some of these filters being characterized by the characteristics of FIGS. 3a to 3c are shown;

Figure 4 is a schematic representation of the manner in which a modulator is composed of a filter and the associated input signal can be picked up or removed;

FIG. 5 shows a circuit diagram of a modulation and filter part of the device in its simplified embodiment,

FIG. 6 graphical representations of the time sequence of to be referred to in the following as a sampling pattern Interrogation or scanning signals through certain points of the arrangement according to Figures 1 and 5;

Figure 7 is a circuit diagram of a filter as part of the multiplex area of the device in a form suitable for time division on different signals;

FIG. 8 graphical representations of the signal sampling patterns appearing at the outputs of the filter according to FIG. 7;

FIG. 9 circuit diagrams to illustrate the routing of a complex modulator from the output to the input of a filter when the modulator performs a frequency shift according to the performs half the frequency repetition period of the filter frequency response;

FIG. 10 shows a schematic illustration of the combination of the two non-periodic filters according to FIG FIG. 9b in connection with a single filter with two inputs and one output

31300A2

with the summing junction;

Figure 11 is a circuit diagram of the take-off side of the device for demultiplexing a signal into its Baseband signal components;

FIG. 12 is a graphic representation of a time sequence of the sampling patterns of some signals in relation to FIG the demultiplex side of the device and

FIG. 13 is a circuit diagram of the filter and modulator part of the demultiplex area of the device in a simplified configuration.

FIG. 1 illustrates that part of the device which, proceeding from the baseband signals, performs the frequency division multiplexing function. The device according to this embodiment can be implemented with a number of baseband signals which is in each case 2 times, for example 2 ⁴ = 16; 2 ⁵ = 33, 2 ⁶ = 64; these are the most frequently used numbers, although, as is customary here, the number of signals actually used is lower, eg 12, 24 or 60.

The following is a 64-signal system for explanation of the invention described by way of example. 60 of the 64 signals are used in practice. These signals correspond either two PCM flows entering the transmission side with 30 channels each or 60 voice channels, if the practice of FDM systems is followed. The 60 voice channels are frequency division multiplexed assigned to the frequency band from 312 - 552 kHz. 64 such signals appear at an input 1 according to FIG FIG. 1, either in two ways, if there are two already sampled, coded or time-division multiplexed PCM signal streams or on 64 channels (effectively 60 channels) if the analog signals are in the 0-4 kHz band acts. Each analog input is sampled and "patterned" at 8 kHz in a block 2 according to FIG. and thereafter has a spectrum which, as usual with PCM signals, has a repetition frequency like this is shown in Figure 2a.

In block 2, the signals are also transformed by methods known per se in order to be able to use them for the next Prepare the processing step. At the exit of the In block 2, the signals appear as linearly coded digital signals, the spectrum of which changes with a period of 8 kHz repeated, but 2 kHz lower

.ί ο λ e

- r-

-34- ""

Frequencies is shifted towards (see. Figure 2b).

It should be noted that in this operation, the sampling patterns of each signal alternate between real and be considered imaginary. Each signal path can now go through the relative spectrum within the fluctuation range of - 2 kHz and + 2 kHz can be characterized by a multiple of the frequency of 4 kHz. the Device makes a selection by means of digital filtering one of the mentioned frequency bands for each channel at a frequency multiple of 8 kHz, the is different for each signal (see FIG. 2d). The signals labeled with numbers 32 through 63 have an inverted spectrum with respect to the position at the same frequency in the periodic repetition of the baseband signal spectrum until this is evident from a comparison of the operating frequency of 256 kHz Signal 32 according to FIG. 2b with the position of an original signal (FIG. 2b) at a similar frequency results. As is known, signals 32 to 63 require a spectrum inversion by modulating the baseband signal at 4 kHz; this is achieved by changing the sign of one of two frequency patterns.

The signals emerge at the output 3 of the block 2, preferably as time-division multiplexed signals. With c, (k = Variables from 0 to 63) is a set of 64 adjacent or consecutive patterns of said time division multiplexing Denotes signal; a special index k assigns the scanning signal designated thereby to the signal to, which assumes a corresponding, equivalent position (see FIG. 2d) in the frequenzmultip.1 external signal. The values c i are each arranged in total in sets of 8 successive scanning patterns; they are arranged in each set in such a way that they are then connected to signals with a frequency of 64 kHz from each other distant spectral difference correspond. The first scan pattern each. Sentence corresponds to signals with a Spectral position O, 4, 2, 6, 1, 5, 3.7.

According to the invention, the Fourier transform is im. Block 4 is carried out on each set of eight consecutive 'sampling patterns in c, in the form of a discrete Fourier transform of order 8, ie in this block the powers of the complex number exp (j2n / 8) = (1 + j) / are used as multipliers / z used. In this phase, the incoming scanning signals can always be viewed as real. "At the output of block 4, there are sequences of eight scanning patterns, from

some of which are real and others complex, but from this point on all sample patterns can be considered as complex quantities. The output scanning patterns are arranged in a row in the next block 5 if they have not already been arranged in this way at the output of the Fourier block 4. The scanning patterns thus appear at the input of block 6 in a chronological order. A basic set of 64 successive scanning patterns, which correspond to the aforementioned c, scanning patterns, are denoted by d,. where k _Q and i can assume values between 0 to 7 and "k" denotes the set of 8 successive scanning patterns which have been subjected to the Fourier transform, while i denotes the 8 transformed scanning patterns in each set which are after the usual Notation for the expression relating to a Fourier transform for 8 data are arranged.

Block 6 contains a multiplier which multiplies the incoming _{sample patterns by exp (jk o} i2n / 64). The indices k and i are defined above. The multiplication constants used by block 6 are supplied by a block 7, which usually consists of a read-only memory (ROM). The sampling patterns emerging from the multiplier 6 are real (Re) and imaginary

(Im) split parts that are introduced separately into two identical sets of filters and modulators, of which, for the sake of clarity, only one is shown in FIG. 1 and that is the blocks 8 to 17 includes; it is assumed that the real part of the signals is processed in this section. When separating of the real part of the imaginary part at the output of the multiplier 6, it should be noted that the in the block 4 entering and related to the single baseband signal alternately as real sampling patterns and imaginary units occur. For this reason it is necessary to use the real at the output of the multiplier 6 and to swap imaginary parts one by one from the two blocks of the 64 complex sampling patterns and reverse the sign of the imaginary part.

For the sake of clarity, s,. the real part of the uniquely related to the real sampling patterns d,. standing exiting from the multiplier 6

o ' ¹
and denotes sampling patterns entering the cascade of filters and modulators associated with the real section, with k and i with the meaning given above.

The time sampling patterns s. will be on two at the same time.

^k o ^{# 1}

Paths forwarded, with the multiplier M _Q on the first path and delay elements R ₁ and R ~ lying on the other path, each time shifting the sampling pattern by eight times the distance between two successive sampling patterns s,. cause; in this case the difference

^K o ' ^x
Exercise τ of the period of the frequency of 512 kHz with which the scanning patterns arranged in series are passed through the device. At the output of the delay _{element R. the sampling patterns are sent to the multiplier M 1} and at the same time to the delay element R, at the output of which the multiplier M ″ is located.

The entering the three multipliers M ", M _1, M 's scan. be in these with a number

o ' ¹
of eight coefficients (some of which are 0.

can) multiplied, which is cyclic, synchronous with the index i corresponding to the scanning pattern s,

³ V ¹

repeat, loading a different set of coefficients into each multiplier. The multiplier M i introduces opposite signs for sequences of the form k _Q = 0, 1, 2, 3 and k = 4, 5, 6, 7.

- 56-

The three sampling pattern sequences emerging from the filter 8 enter the multiplexer 9, which Connects inputs A, B, C to outputs E. The index "r" is variable between 0 and 7. The eight in a row Scan pattern s,. (now through

o ' ¹

the multipliers M _n , M ₁ and M ₂ modified) are impressed on the input E in such a way that r equals _{the index k in the expression s, i.} It must be kept in mind that at the output A, B, C a sequence of eight successive scanning patterns s,

^ o '(with i = 0 to 7), characterized by a certain k, occurs at input B by 8 · τ compared to input A, and at input C is delayed by 16 τ compared to input A. Let T _{0 be} an interval corresponding to 8 τ, then the connection between the inputs A, B, C and the output E takes place in eight successive intervals T _{Q /} which are arranged in such a way that they each have eight / sampling patterns s,. with a variable i from 0 to 7, according to the following table:

- 15 -

Table 1 A. j ~] ■ ^ / order
ν ... T ^E O TTl TTl
E ₇ E ₃ O ^E 4 E ₀ E ₇ ^{1 E} 2 Tt * TTi
^E 4 ^b O 2 ^E 6 TP T **
^E 2 ^E 4 3 ^E 1 ^E 6. ^E 2 4th ^E 5 E ₁ E ₆ 5 ^E 3 TTl TT »
^E 5 ^E 1 6th ^E 7 ^E 3 ^E 5 7th

The eight output signals of the multiplexer 9 are sent in pairs to four identical devices 10, which generate the sum and the difference of the input signals. In particular, the adder S ₁ sums the signals exiting at E _n to the signals exiting at E., the same also applying to the other outputs; the adder S-subtracts the signal exiting at E. from the signal exiting at E, and the same applies to the other signal pairs. The four new signal pairs (sum and difference) each become one

routed by four identical non-recursive filters 11, that work according to the first rule. These filters have a frequency period of 64 kHz and work but in a rhythm of 512 kHz. If each filter according to the formula

H (z ⁸ ) = Σ h
r = O

works, where ζ = exp (j2uQ / o), and ω = 512 kHz and ω is the frequency, then the sum signal emerging from blocks 10 is, for example with an even r to the multiplication coefficients h transferred, while with odd r the difference signal is transferred to the multiplication coefficient h will.

According to Figure 1, two of the filters 11 are with a modulator 12 connected, whose multiplication coefficients periodically assume the sizes 1, j, -1, -j, their size however, change at a frequency of 64 kHz, which is why the signal sampling patterns passing through these modulators are multiplied in sets of eight consecutive sample patterns of the same size. Since the multi.

plication coefficients also have imaginary quantities, the output signal must also be transmitted to the filter and modulator block, which the imaginary Process scan patterns. Similarly, the multiplier of the block, which the imaginary sampling pattern of the signal processed when the multiplication coefficients assume an imaginary size, also transmit its output signal to the block processing the real scanning patterns.

The two following blocks 13 process the two Input signals in the same way as blocks 10; The same also applies to the identical filters 14 and 14 22, which work in the same way as the filters 11, the only difference being that the filters contained in blocks 14 and 22 have a frequency repetition period of 32 kHz according to their filter function.

The output of the filter block 22 is fed to a modulator 21, whose multiplication coefficient is the successive powers of the number (1 + j) // 2 and which, like modulator 12, has a constant multiplication coefficient for eight consecutive ones Maintains signal sampling pattern and its coefficient

sizes with 64 kHz changes. The block 15 operates in the same way as the blocks 10 and 13, with its two output signals entered the non-recursive filter; the frequency repetition period of the filter function of the Blocks 15 corresponds to 16 kHz. The output of the filter is connected to a filter 17, which because of its make transition between its bandpass or pass band and restricted area is designed recursively. The frequency repetition period of this filter is 8 kHz. As mentioned, the cascade connection from the elements from block 8 to block 17 is provided twice, to enable the processing of the real and imaginary parts of the signals.

Those from the filter 17 for the real part and the corresponding filters for the "real" signals (Re) and "imaginary" signals exiting the imaginary part (Im) both enter modulator 18 as a complex signal. The complex signal is periodic Spectrum with a period of 512 kHz, as shown in FIG. 2d for frequencies in the range from 0 to 512 kHz is specified. The modulator 18 causes a 2 kHz frequency shift towards higher frequencies obtained by multiplying successive sampling patterns of complex signals with successive ones

Powers of the number exp (j2n / 4N) -is reached in which it is through the read-only memory 19 to the multiplier 18 delivered consecutive potencies acts. Only the real part of the signal is obtained at the output of the multiplier 18, its spectrum has a configuration that is symmetrical with respect to the frequency of 256 kHz. This signal is the final frequency division multiplexed signal in sampled form.

A block 20, the mode of operation of which is known per se, processes the signal in analog form, so that the Signal spectrum from 8-248 kHz, corresponding to a 60-channel multiplex signal, after digital / analog conversion, Filtering and modulation is implemented in the 312 552 kHz band. Even if the mentioned While principles are not binding, a theoretical description of the present embodiment is intended in accordance with the terms used in the literature are given.

FIG. 2c schematically illustrates the amplitudes as a function of the frequency of a digital filter H (z), where ζ = exp (j2no / u) and ω = sampling rate or -frequency of the frequency-multiplexed digital signal

mean. This filter has a passband within the fluctuation range of -2 kHz and +2 kHz around the frequencies which form a multiple of ω; d. H. in the case of 64 "channels, ω = 512 kHz. This filter expediently suppresses all other frequencies. The filter H (z) is preferably a recursive one Filter designed, and if numerator and denominator of the same size, i.e. H. are equal to I, it can be express by the following equation:

I -1_ I
H (Z) = E - -Ui = Π

-1 z

Each denominator in the above equation has a form 1-x, and since N is a power of 2, -d. H. N = 2, the following relationship applies:

(1 + x ² ) (14-x ⁴ ) Π + χ ^{Ν / 2} )

1-x ^N

By applying equation (1) above to each denominator factor of the expression H (z), the latter can be

_- 33-

as follows:

H (z) = K (Z) K ₁ (z ² ) K "(z ⁴ ) ... K _x (z ^N ) (2;

OI /. J-i

According to equation (2), the filter H (z) is divided into a cascade of filters, of which the first filter K (z) has a frequency period = ω, the second filter one corresponding to ω / 2 etc. and the last filter K '(z) (with L = "log ₀ N) has a frequency repetition period corresponding to ω / N = Ω, which corresponds to the sampling frequency of the baseband signals, in the present case 8 kHz.

N The filters mentioned, with the exception of the filter K _T (z), are of the non-recursive type, while this last-mentioned filter is of the purely recursive type, ie the numerator is constant. The application of equation (2) enables an analysis of the basic principle on which the invention is based. Starting from a filter H (z), which is constructed in a manner known per se, the

2 ^r

The operation of the filter K (z) is explained. This explanation relates to Figure 3 and in particular on Figure 3a, which shows the attenuation of the filter K (z)

illustrated schematically. The filter function is to pass within a range of variation from -2 kHz + 2kHz to the frequency multiples ο AEEN _f assigned frequencies and the frequencies in the region around odd multiples of the frequency ω / 2 significantly attenuate or to lower

Press 2. Similarly, the filter lets K- (z), whose transfer function is shown schematically in Figure 3b, the 4 kHz ranges or bands around the even multiples of the frequency of 128 kHz while there are similar frequency bands to the odd ones Multiples of 128 kHz suppressed.

The same explanations apply to the others

4 filters, of which the filter K ₂ (ζ) in Figure 3c is

N is shown mathematically. The filter K ₁ . (ζ) is pure

Li

recursive, as it is the 4 kHz wide frequency bands or -Ranges around the odd multiples of 4 kHz suppressed and similar frequency bands around the even multiples of 4 kHz.

The pass bands of the filters according to equation (2) can vary in amplitude relative to each other to the frequency, although their cascade connection results in the entire filter H (z) according to FIG. 3d. the

3 Ί 300

2 ^r

The explanations given above with respect to the filters K _r (z) enable their application without having to resort to the exact equation (2), so that each filter can be designed according to the specific, mentioned suppression requirements. In addition, each filter, including filter K _T (z), can be of the non-recursive or recursive type.

An advantage of the invention is that it processes and possibilities for the design and construction of non-recursive and recursive filters in Allows agreement with the expected suppression requirements, the multiplication coefficients of these filters being very simple and special are to be implemented appropriately, especially when using series arithmetic (in this regard cf. Article by D. J. Goodman - M. J. Carey, "Nine Digital Filters for Decimation and Interpolation ", IEEE Transaction on Acoustic Speech and Signal Processing, April 1977, p. 121; Article by W. Wegener, "Design of Wave Digital Filters with Very Short Coefficient Word Lengths ", Proceedings of International Symposium on Circuit and Systems, 1976, p. 473). For clarification, the case of 64 signals is taken as a basis,

- 3G-

where N = 64 = 2 and H (ζ) is the product of 7 Filtering is derived according to the following equation:

(z ² ) K ₂ (z ⁴ ) K ₃ (z ⁸ ) K ₄ (z ¹⁶ ) K ₅ (z ³² ) K ₆ (z ⁶⁴ ) (3)

A certain number of filters out of seven filters existing set of the right-hand side of equation (3), starting from the left, in the present case three non-periodic Filters, are composed according to the following equation:

= Ez ^-1 H ₁ (Z ⁸ ) (4)

i = o

This basic equation is directly applicable because the said filters are of the non-recursive.type; there is therefore a polynomial in each of the variables, e.g. B.

-1 -2-4, ■

ζ, ζ, ζ, ... based.

According to the general principle, frequency division multiplexing can be used of N signals according to the configuration according to FIG. 2d by filtering each baseband signal, its spectrum is denoted by X, (z), the subscript k referring to the

Ä5-- - 3?

desired channel frequency position according to Figure 2d is related, by means of the filter H (z), the kJl [Sl, = 8 kHz) is shifted on the frequency axis; the analytical expression of the frequency shifted filter, denoted EL (z), can be derived from H (z) if the variable ζ is replaced by ζ-exp (-j2nk / N). The complex number exp (j2n / N) is denoted as W.

Assume that the complex signal is denoted Xi- (Z) relative to the baseband signal, its final one Position around the frequency and already has a perfectly oriented spectrum; the complex signal according to FIG. 2d can then be expressed as follows:

Y (z) = Σ X, (Z ^1N ) H, (z).

Using equations (3) and (4) and the fact that W ^! = 1, we get:

(5) ", 32 -32k,", 64s ", 64,

The expression or equation (5) for the filter K _fi

64
(z) can be relocated or shifted outside of the sun blind arranged in this way, for example at the exit of the arrangement which carries out the operation indicated by equation (5).

If through Y (z) the signal at the input of the filter

64
Kg (z) is displayed, equation (5) e can also be applied to it, but excluding the factor Kg (ζ). Before further processing, the index k is divided into two variables, namely:

k = k _Q + 8

As a result, the 64 signals are divided into 8 sets of 8 signals each, each set being characterized by one of the quantities k _Q = 0 to 7, in accordance with the statements made with regard to FIG. The index k .. also assumes the sizes from 0 to 7 and identifies a signal that is present within each of the mentioned signal sets in descending frequency order.

64
Since W ° * = 1, the following applies:

In addition, in equation (5), the summation for the index k can be divided into two summations for the indices k and k., be divided. The expression Y (z) at the input of the

64
Filters K _c (z) can be expressed as follows

Y (Z) = Σ ζ ^X Y _± (z ⁸ ) (6)

i = o

Σ H ₁ (Z ⁸ W- ^ O) K (z ⁸ W- ^8k o) K ₄ (z ¹⁶ W- ^16k o) °

³² W- ^32k O) W ^koi Σ W ⁸³ ^ I ¹ X (ζ ⁶⁴

k .. = o ο 1

The summation in terms of index k- at the outermost right-hand side of equation (7) illustrates a discrete Fourier transform (DFT) on the sampling patterns of the Set of eight signals with a constant index k

The transformation has the order "eight", where

W ^ l ¹ (N = 64) can be replaced by WqI ¹ , where W ₀ where ο

represents the eighth root of the unit Wg = exp (j2n / 8). Hence:

o, x = o

The signals Y. (z) have the argument z _gr that indicates that the sampling pattern of the signals mentioned has a frequency

64 of 64 kHz because the signals §,. (z) with a Frequency of 8 kHz also pass through the filter H. (z). These interpolate the input signal on the time axis and deliver a sampling pattern at the output in every time interval of 8 τ (τ = period corresponding to the Frequency of 512 kHz).

Using equation (8) becomes equation (7). for Y. (z) divided into two terms, of which d one stands for the even-numbered quantities of the index k and the other for the odd-numbered quantities. The mentioned Even and odd indices are expressed as 2k and 2k +1, respectively, with k = 0, 1, 2, 3.

It follows from this:

2k

O,

Σ H

L U ₁

W ^16k

¹⁶ w " ¹⁶ W ~ ^32k

. 1

, 32 _Τ7 -32 _Λ 5 ^(ZW N

64)

The two summands result in different filter sets which can, however, become identical to one another by applying the equivalence between the forms a and b according to FIG. 4 to the second summand according to equation (9), within which the modulator 23 has the following signal sampling patterns at a frequency of 512 kHz multiplied _{by the successive powers of W n.} FIG. 5 illustrates, within a block 28, the arrangement to be implemented from the filters and modulators. A modulator 24 according to FIG. 5 is similar to the modulator

according to Figure 4, only with the exception of the signal stream, which in Figure 5 with a speed or frequency of 64 kHz takes place, so that the modulator 24 encounters non-zero sampling patterns only at intervals of 8 τ and thus the temporally successive sampling patterns are multiplied by the power of W ". The order of the modulator 24 according to FIG. 5 enables the filter block 2 5 to be omitted from the signals distance covered, corresponding to the two summands according to equation (9).

The index k appearing in equation (9) is again divided into even-numbered and odd-numbered variables, while the modulator 23 according to FIG Modulators multiply the successive scanning patterns by the successive powers of W ₄ = exp (j2n / 4).

Another division of the index k completes the Structure of the 'block 28 according to FIG. 5, at the inputs of which signals 9, · with the constant i, arrive, namely

o, ¹
due to the index k of the signals according to equation (8)

adopted eight sizes.

The block 28 should be designed eightfold, accordingly the eight quantities i, where at the output of each block a Element must be arranged that brings about a delay of i · τ. The output variables of the above Delays to achieve signal Y (z) are summed in accordance with equation (6). Each of these Blocks must then be duplicated for each size of the index i in order to have the real and imaginary components of the signal.

If the signals are transmitted on a time division basis den, the number of blocks mentioned can be reduced to two, namely one for the real and one for the imaginary part of the signals §, .. Figure 6a illustrates

O,
the sampling patterns with an interval T corresponding to an 8 kHz

Period of one of the signals 9,. for a fixture

O,
of k and i corresponds to; FIG. 6b shows the scanning patterns emerging from block 28 according to FIG. 5 due to the size zero of index i at a frequency of 64 kHz; FIG. 6c illustrates the scanning patterns emerging from the same arrangement for a non-zero generic variable of the index i, an element with a delay it being arranged at the output of this arrangement.

"3Ί30Ϊ42"

If the delay element χτ at the input each Input stage 27 (Figure 5) is shifted or offset, takes each input due to the eight arrangements according to the eight sizes of the index i, the scanning patterns sequentially with a delay of τ, as shown in Figure 6d for a generic size with index k.

The sampling patterns of the signals J,. can only one single arrangement, i. the block 28 according to Figure 5, run through, which accordingly with a frequency of 512 kHz

is working. The filters 25 (Η _± (ζ)) change their multiplication coefficient with a frequency of 512 kHz.

Since the signals P,. complex, must be more clearly

o, ¹
wise two similar arrangements can be provided, namely one each for the real and for the imaginary sampling pattern of the signal. The signal Y (z) is now available at the output of the block 28 and passes through the filter 17, which in turn is divided into two identical filters, namely one filter each for the real and one for the imaginary part.

A further simplification is achieved if the

the signals o,. associated scanning pattern (for a O,

fixed magnitudes of k and i, varying from zero to 7 the scanning patterns are shown in FIG. 6d) with a multiple of 8τ for a given size of the index k are delayed, which means that they are in the inputs 27 of the block 28 of Figure 5 in the following Enter order: O, 4, 2, 5, 1, 6, 3, 7. So a sampling pattern for each signal j>,. (i = O, ... 7)

o, can be entered in the relevant k input 27, a period of time τ is required which is equal to the 8 kHz frequency period. This means that the scanning pattern

of the signals X, (ζ) in series with input 4 according to κ.

Figure 5 can be directed. The processor 4 performs a discrete block of eight successive sampling patterns within a period of 8τ Fourier transform. The output signals of the processor 4 are arranged in series, whereupon the Scan pattern of multiplication 6 run through. Consequently the multiplexer 30 has the sampling patterns of the signals P,. with a constant size of k in

O,

a time sequence to the respective correct input of the filter and modulator block 28 '.

The filter 17 is connected to the output of said block. This filter is the digital modulator 31 connected downstream, at the output of which only the real ones

3A - ' 3Ί 3 Ο

-H-

Scanning patterns will appear.

In connection with the present invention, reference was made in particular to a case in which a frequency division multiplex transmission of 64 baseband signals is desired. However, the device can be designed for a number N of signals corresponding to a power of 2. The number N is divided into the product of the numbers ρ and q, ie N = ρ · q _r where ρ and q are still power values of 2. If Ω is the sampling frequency of the baseband signal, the frequency-multiplexed signal has a frequency repetition period ΝΩ corresponding to its sampling frequency. Here, ρ sets of q signals are formed, the latter of which have an interval ρΩ when they reach their specific frequency allocation after multiplexing.

The sample patterns of each set of q signals are obtained using the discrete Fourier transform of the dimension "q" is transformed, and the complex output

ki signals are multiplied by the factor W o ^r , at which k is in the range from 0 to p-1 and i from 0 to q-1. The sampling patterns are then sent to a filter and modulator network with ρ inputs,

that for filtering and modulating the real and imaginary Components is provided. Before entering the whole network, swap the real and imaginary. Signal components perform their roles in the manner and for the reasons stated above. The complex signal experiences a complex Ω / 4 modulation at the output of the filter and modulator block to ensure a correct one Frequency position. Various simplifications are also possible at block 28 according to FIG the functions performed by the different blocks can be of different types, depending on what the respective preference and the development of the digital components used in the implementation of the device depends.

The following are two major simplifications indicated, which makes the invention particularly advantageous compared to previous devices.

The first simplification arises from the fact

2 that the first filters of the set K (z), K ₁ (z) ... K- (Z) according to equation (2) are particularly simple, ie of low order. Especially when it comes to

solution of equation (4) contain the filter H. (z) few expressions, this means the sentence this

Filter in block 29 according to Figure 5 can be designed as the only filter whose coefficients are with a speed or frequency of 512 kHz. If this new, only filter at the beginning of the interval T is a sequence of eight sampling patterns with respect to the signals,. records (with k = a constant and

i \. XO

i = variable from 0 to 7), there is the content of its delay elements before the input of the next sample set for the same size k. For example, the following applies to 64 signals:

K ₀ (Z) = (1 + 2

(z ² ) = (1 + z ² ) ³

K ₂ (Z ⁴ ) = (1 + z V (10)

The product of the three above filters makes a filter

20 _ _r
Σ h _r z
i = o

where the sizes of the coefficients h are the following Table II correspond to:

- j Tabel II Ne ⁼ 9 H
ο ₌ 2 ^h 8 ⁼ 22nd ^h 17 ⁼ 6th ^h 1 = 4 h ₉ = 24 ^h 18 ⁼ 4th ^h 2 = 6 ^h 10 ⁼ 24 ^h 19 ⁼ 2 ^h 3 = 9 No 24 ^h 20 ⁼ 1 ^h 4 = 12 ^h 12 ⁼ 22nd ^h 5 = 16 h ₁₃ = 20th ^h 6 = 20 ^h 14 ⁼ 16 ^h 7 Ns = 12th

The table above gives the coefficients of filters in each column, read from top to bottom H. (z) with variable i from 0 to 7. The data graduation is in the present description not considered, as it is a normal task in the construction of digital filters.

Each of the filters 29 according to FIG. 5 can be designed according to the circuit diagram of FIG. It is assumed that this filter is the filter connected to the input 27, to which, according to FIG. 5, the size _e "O" of the index k has been assigned. In this case, this filter picks up a sequence of scanning patterns shown in FIG. 6d at its input 27. Each sequence of eight sample patterns is processed by the multiplier

3130Ö42

corresponding with the sizes according to the first column on the left-hand side of Table II, from top to bottom • read, multiplied. The sampling patterns appearing at the input of the multiplier 34 also appear on the Input of multiplier 35 after a delay of 8 τ by delay element 32, and they will multiplied by the multiplier 35 by the sizes according to the second column of Table II.

Similarly, these sampling patterns at the input of the multiplier 36 should have a delay of 16 τ. appear opposite the entrance 37, which is caused by the presence of the delay elements 32 and 33 will. By the multiplier 36, the sampling patterns with the coefficients according to the last Column on the right side of Table II in which the missing coefficients are multiplied as zero be considered in terms of amount. The scanning patterns emerging on the branches 38, 39, 40 become a single one Branch combined, delivered in accordance with FIG. 8a as a sequence of 21 pulses and fed to the next filter block. All arranged in one column (Figure 5) Filter blocks 29 are identical. They also process the eight incoming sample pattern blocks in a similar way; the output frequencies are in

Figure 8a to 8h shown. Instead of eight filter blocks, a single filter block 2? can be used, which can be designed in the manner shown in Figure 7, since all components according to Figure 7 in each set of eight scanning patterns (Figure 6d) are used only for a time period D / 8. Since the sampling patterns of the signals p,. actually flow in a temporal sequence with a distance T / 8 between the scanning pattern groups marked with different index sizes k, they can all be passed to the input 37 as long as the outputs 38, 39, 40 are appropriately connected to the inputs E. of the following eight filter blocks 41 in accordance with Figure 5 are connected. By dividing the interval T between two incoming sample patterns of the same signal p,. The connections or connections to be established between the outputs 38, 39, 40 and the inputs E. can also be taken from FIG. 8 in eight intervals T designated according to FIG. These connections are already given in Table I, in which the outputs 38, 39, 40 according to FIG. 7 are designated by the letters A, B, C. The filtering effected in this way corresponds to the cascade connection of the three filters according to equation (10). This type of filtering results in a loss of less than 0.05 dB at the pass-through

-jerz.

·· "313OÖ42

band limits of +2 kHz and -2 kHz and an attenuation of more than 75 dB in the same frequency range around the Frequency around 256 kHz (with indistinguishable crosstalk) and more than 85 dB around other frequencies that represent integer multiples of 64 kHz.

The advantage of this embodiment is that the simplification mentioned can be applied to a wide range of N values corresponding to the number of paths for the multiplex transmission. More precisely: for the case of N = 16 it is possible, for example, to divide the 16 signals into four sets of 4 signals each and to perform the DFT (discrete Fourier transform) on each of these sets. Since L = log ₂ 16 = 4, the filter H (z) should have the following parts:

H (z) = K _o (z) K ₁ (z ² ) K ₂ (z ⁴ ) K ₃ (z ⁸ ) K ₄ (z ¹⁶ )

Here the variable ζ = exp ( j2na / a ^) , with ω. corresponding to 128 kHz. In this case, for example, the following relationship can expediently be selected:

K _o (ζ) = (1 + z ¹ ) ³

= -1 + 9z " ⁴ + 16z ⁶ + 9z ⁸ - ζ ¹² '(11)

The product of the filters mentioned then results in a filter

^15th

Σ h z

r = O ^r

its coefficient h according to the following table III can be arranged:

Table ΙΙΪ

h ₀ = -1 h ₄ = 9 h ₈ = 57 h ₁₂ = -1

h ₁ = -3 h ₅ = 27 h _g '= .43 ^h i3 ⁼ ~ ³

h ₂ = -3 h ₆ = 43 h ₁₀ - 27 h ₁₄ = -3

h ₃ = -1 h ₇ = 57 h ^ = 9 h ₁₅ = -1

"* 3130Ö42

Table III above, read line by line from top to bottom, gives the coefficients of FiI-

tern H. (ζ), where i = 0, 1, 2, 3 for a structure similar to equation (4). The filter, whose function is analogous to that of the filter in FIG. 7, has three delay elements 4τ-, with T ₁ equal to the period of the 128 kHz frequency, as well as four multiplier elements, the multiplication coefficients of which cyclically assume the sizes to be read column by column as specified in Table III.

The loss at the edge of the pass band of the product of the two filters according to equation (11) is now less than 0.04 dB, and the attenuation in the 4 kHz frequency ranges around the (center) frequency of 32, 64 or 96 kHz around is greater than 78 dB.

A further simplification can be found in block 28 according to FIG Do Figure 5 on the set of non-recursive filters whose outputs are summed after one has passed through a modulator. In the block 28 of FIG. 5, there is a configuration similar to that shown according to Figure 9a; According to Figure 9a, filters 44 and 45 are used, each of which has the same structure, for filtering signals applied to inputs 48 and 49

Q Q

X (z) and Χ, (ζ), where the filter on the output side

3. L)

4 5 exiting signal passes through the multiplier 47, which uses a frequency conversion of the frequency spectrum a size corresponding to half the frequency repetition period of the damping function of the filter 45 caused.

The circuit according to FIG. 9b corresponds to that according to FIG. 9a, only with the difference that the multiplier stage 47 has been moved to the input of the filter unit 4 5, which is now called the filter unit 46 and which differs from the former in that its filter function is a frequency shift has experienced about half of its repetition period; this is by changing the sign

8r
of the argument ζ of the function itself.

The filters 44 and 46 according to FIG. 9, which are z. B. to those of the non-recursive type, can now be combined into a single filter function, according to the first representation according to Figure 10, which relates to a biquadratic linear phase filter, can be implemented. The sum of the signals

8 8

X_ (z) and Xj * (z) at the inputs of the filters 44 and 46 according to Figure 9b is shown in Figure 10b with even coefficients 52 and 53 to the input of the multipli-

cators, while the difference with odd-numbered coefficients to the input of the multipliers, d. H. in the case of FIG. 10 r.ur is transmitted to the multiplier 54.

The transformation shown in FIGS. 9 and 10 is applied to the entire in block 28 according to FIG Filter set 41, 43 and 25 applied, in which the output signals are summed after one of the modulators 42, 46 and 24 happened. In particular, the modulators 42, their function in a multiplication of the successive scanning patterns of the signals passing through them alternately with +1 and -1, also at the input of the

switched filter H. (ζ) arranged. This has two effects:

1. Since the function of the multiplier 42 in one Change of sign of the scanning pattern according to a signal <?,. consists, where k and i

^J ic χ ο

o, ■

Represent constants and the sampling pattern by 8τ are distant from each other, if the

Multiplier is arranged at the input of the filter H. (z), which also acts as an interpolator, a distance T of the signal sampling pattern introduced so that

the latter are not subject to a change in sign, since they are in a temporal position which is assigned to the relevant sign at any time. Since the modulator 42 is no longer in this case is necessary, it is left out '.

2. As the signals pass through the modulator 42 at the input of the filter H ' _i (z) on the signal transmission path, the filter changes its argument sign according to FIG. 9; this means that the multiplier 35 according to FIG. 7 must change the sign of its multiplication coefficients if it is dependent on the sampling patterns of the signals o,. run through

o, which will correspond with the sizes of the index k 4, 5, 6.7 are marked. FIG. 7 illustrates that which is equivalent to the function of the filters 29 according to FIG Construction.

The above explanations clarify the operation and structure of that part of the device according to FIG Figure 1, its task in an ESB frequency division multiplex transmission of 64 baseband signals. The realization of the device with a different from 64 Number of signals, as well as the technology and complexity of the digital components available

«Τ ■ ■ · ■ ·

■ · * "3130Ö42

the expert on the basis of his technical knowledge with appropriate modification of the device possible without changing the basic working principle of the device. For example, is a doubling of the blocks according to FIG. 1 from 8 to 17 are necessary in order to add the real and imaginary signal components filter and modulate, but such a doubling can be avoided if the (working) speed of the digital components used is sufficiently high. In such a case, a single arrangement can be used of the named blocks process both the real and the - imaginary sampling patterns that are temporally are arranged in series and alternately, whereby the operating speed or frequency of the Blocks' is doubled. Obviously, the real and imaginary sampling patterns in the modulators 12 and 22 according to FIG. 1 with complex multiplication coefficients synchronized again so that they are able to interact with each other and thus are arranged in an alternating time sequence. In addition, the device can process N signals, if the speed of operation of the device allows, more than one set of Multiplex N signals if the relevant time or signal sampling patterns are arranged in time series.

According to FIG. 1, some of the filters assumed to be non-periodic can also be periodic Form. For example, the block -16 according to FIG. 1 has a filter function with a Frequency period of 16 kHz. To ensure a simpler filter and to compensate for the losses This filter can be designed as a recursive filter on the pass bands of the upstream filters be; in this case, however, the 'compact structure not achieved according to Figure 10, so that two separate filters for the real and for the imaginary Part of the signal must be used.

In the following the demultiplexer is described, i. H. the part which at its entrance the different Signal assigned to ESB frequency division multiplexed signals decreases and which divides the signal and converts it into baseband signals. The relevant part of the device is shown in FIG.

In the case of demultiplexing 64 signals (60 in reality), the multiple signal from input 78 is, for example, the 312-512 kHz frequency range assigned. A block 55 converts this signal into valid corresponding to the 8 - 248 kHz frequency range

"**"" * ~ * °" * "' ^Z 3ΐΥθϋ" 42

Standards by means of modulation and filtering processes; this signal is therefore at a frequency of 512 kHz sampled, digitally coded and as a periodic frequency spectrum signal from 64 signals in the 4 kHz range and interpreted or evaluated with assignment to the 0 - 256 kHz range, with the specified spectrum opposite is symmetrical to the odd multiple of the frequency of 256 kHz. This signal occurs at the output of the Blocks 55 with a sampling frequency of 512 kHz in the following multiplier 56, in which there is a 2 kHz frequency shift towards lower Frequencies by multiplying its following or successive real sampling patterns with (consecutive) powers of the complex number exp (j2n./256) learns; the corresponding sizes will be supplied to the multiplier 56 by the read only memory 56 (ROM). The signals at the output of the multiplier stage 56 are now complex and the downstream parts of the device must be split up be to the real components (Re) and the imaginary components (Im) with a frequency of 512 kHz process separately, except when these real and imaginary components or their parts are mutually exclusive Are interrelated. As in the case of the transmission section, the

Description of the traced path, which runs from block 58 (internal) to block 83 (external) according to FIG. 11, because the imaginary sampling patterns are processed in a similar manner.

The real part of the output from the multiplier 56 The signal is passed to the filter 58, the filter function of which is that of the filter 17 according to FIG. 1 is similar. The output signal of the filter 58 enters the filter 59, in which it is filtered and then filtered is divided into two outputs. The filter 59 is a non-recursive filter according to the second designed form described; if the following applies to its filter function:

Σ h ζ ^r
r = o

"the signal at output 79 only happens to the even-numbered ones Multiplier stages, while the signal appearing at the output 80 the odd-numbered multiplier stages passes through. The downstream block 60 directs a sum and a difference between the said signals with the difference being sent to the multiplier. Since the signal sampling patterns start with a

βο * β

Frequency of 512 kHz occur, the multiplier must have 63 successive sets of eight each Sample patterns by the following power of the complex number Wg = (1 + j) // 2, where each these powers are repeated cyclically at a frequency of eight kHz. As already for the transfer part described, occurs under the assumption of the powers of W “for imaginary and complex quantities an interaction between the real part and the imaginary part processing section. The signals entering the two filters 61 are applied to the signals already in connection with the blocks 59, 60 and 63 are processed until they appear at the input of the multiplexer 67 at which the Signal is split into eight different ways. The multiplexer 67 switches the input signals E. in the same way as the multiplexer 9 according to FIG. 1 to the outputs A, B, C. The output signals of the Multiplexers 67 enter the downstream filter with variable coefficients in three multiplier stages 68, 69, 70, whose multiplication coefficients are the same as the analog multipliers, stages of the filter 8 according to Figure 1 have, only with the difference that the coefficients are now repeat in reverse order. Also change

the multiplication coefficients of the multiplier stage have the sign if the multiplier stage itself multiplies the _{sampling patterns coming from E 0} , E ₁ , Ey, E_, in contrast to the case when it is the sampling patterns coming from the inputs E .., Er-, Eg, E_ multiplied.

The sampling patterns coming from the multiplier 70 become a delay element 71 with a delay of 8τ transferred, these sampling patterns in an adder 72 to those of the multiplier 69 coming scanning patterns are added. The scanning patterns emerging from the adder 72 arrive at a second delay element 73 with a delay corresponding to 8τ, and they become those coming from the multiplier 68 by means of an adder 74 Sampling patterns added. The sampling patterns emerging from the filter 81 are combined with the imaginary sampling patterns from the analog filter provided for the imaginary sampling patterns to the multiplier stage 83 transferred. With regard to the transmission section, the successive sentences of the 64, real sampling pattern exiting the filter 81 with g,. designated. The index k has a

Jv X O

O,

Size from 0 to 7, making it eight consecutive Different scanning patterns (from each other),

130042

which the routes E mentioned go through.

It should also be noted that the multiplier stages 68, 69, 70 have their eight multiplication coefficients synchronously with the changes to the in g,. contained index i

O/

to distinguish the eight scanning patterns that follow one another have to modify each path. A similar process also applies to the 64 successive imaginary scanning patterns, which are divided into eight groups of equal size, which with the relevant or assigned real scanning pattern groups are synchronous. In the following blocks of N complex sampling patterns, the function or the sign of the real at the input of the multiplier 83 and imaginary parts are alternately changed, also changing the sign of the component which takes on the role of the real part after the change mentioned. At this point the multiplier multiplies 83 the complex scanning pattern (now with ß,

Jc ( 8-i) ^ ' ) with the complex number vCP , which represents the complex coefficient mentioned, which has been supplied to the multiplier 83 by the read-only memory 84. The downstream processor carries out a DFT of dimension “8” on the complex signals emerging from the multiplier 83

313QQ42

(= B w
o ' ¹ o'

these signals processed in groups of eight signals with the following order of the index k are: 0, 4, 2, 6, 1, 5, 3, 7. Here only the real size is used as the output signal of the DFT executing processor 85 is considered.

The sampling patterns leaving the processor 85 are arranged in parallel in terms of time in groups of eight sampling patterns each and at a frequency of 64 kHz. These scan patterns are then rearranged in series by element 86. This parallel series conversion is necessary so that the DFT calculation can be carried out in such a way that the transformed data appear simultaneously at the output of the eight signal paths. The data output from block 86 can be represented with X ₁ , _O1 , since, as mentioned,

^k o ^{+ 8k} 1
with respect to k and with respect to the index k- are arranged in series according to the correspondence between the index i and the Indöc. k .. as determined by the DFT operation. As mentioned, the real sample patterns are x, ₀ . in 64

^K o ^bK 1

- GG-

consecutive blocks in which the Sampling patterns with the same indices k and k- the 8 kHz frequency sampling patterns of the single baseband signal to which a (corresponding) frequency position on the multiple signal had been assigned (See description of the transmission section and FIG. 2d). The mentioned scanning patterns every single one or individual baseband signals can occur as a result of the change of real and imaginary parts at the input of the multiplier stage 83 can be viewed alternately as real and imaginary. These scanning patterns with the Frequency of 8 kHz represent a complex baseband signal with the frequency spectrum according to Figure 2b, which is eventually shifted by 4 kHz for signals that positions 32 to 63 in the multiplexed Signals are (have been) assigned (see FIG. 2d). The block 87 according to FIG. 11 carries out an inverse transformation on the signals mentioned in relation to the block 2 according to Figure 1 by, so that the PCM currents or the analog baseband signals to or at the output.

To make it easier to understand how it works of the device part shown schematically in FIG. 11 for demultiplexing the signal into individual pieces

Baseband signals this mode of operation is in the following theoretically explained.

The complex multiplex signal at the output of the multiplier stage 56 of Figure 11 is designated by Y (z), where 'the Multiplier stage has shifted the input signal spectrum by 2 kHz in the direction of low frequencies

A,

(see FIG. 2e). The signal Y (z) is converted into 8 signals

Y. (z) where the index 1 is from 1 to 8

varies; each of these signals Y. (z) contains different sampling patterns of the original signal at a reciprocal spacing of 8τ, so that these signals are sampled at a frequency of 64 kHz. With respect to a reference sequence of sampling patterns of the signals Y (z) spaced 8τ apart and _{forming the signal Y g} (z), the signal Y. (z) contains sampling patterns which are shifted in time by ϊτ in the direction of increasing time. FIG. 12a schematically illustrates the complex sampling patterns of the signal y (z), which are shifted from one another in time by τ; Figure 12d illustrates sampling patterns of a generic signal Y. (z) with factor i differing from 8; Figure 12c shows the sampling pattern of the signal Yg (z). The connection or relationship between

"■ * · 8 see the signals Y (z) and Y, (z) are determined by

-. J »4th O

H β

following equation:

⁸ -i 8
Y (z) = Z ζ ¹ Y, (z ^ö ) (12!

The version of the filter H (z) shifted in frequency by ΚΩ is already used to multiply the frequency. Since the multiplex signal Y (z) has a sampling frequency of 512 kHz possesses, the same sampling frequency is also present at the output of the filter H, (z), which outputs a single signal the frequency division multiplexed signal. Because this single, filtered signal has a frequency band of 4 kHz the signal need only have an 8 kHz sampling pattern sequence instead of 512 kHz, so that this individual signal must have a spectrum which, according to FIG. 2b, has a periodic repetition frequency of 8 kHz. Using equation (3) for H (z) and substituting the solution (4) where the index i is replaced by the index r in order to distinguish it from the index i according to equation (2), and by dividing the index k to designate the only signal path for signal excerpt into k + 8k .., and final designation of the filter H, (z) in the same way as in the case of the transmission link,

p. O «- *** ■

can be separated and with a frequency of 512 kHz sampled signal x,, ", as follows-

^{press k} o ^{+ 8k} 1:

X (ζ) = Σ z ~ ^r W ^{(ko + 8k} 1 ^{) r} H (z ⁸ W ^8k °) K (zV ^8k O) ^X k + 8k, ^{U; l W} N ' ⁿ x ^{{z W} N ^{; A} 3 ^UW N ^; ο 1 r = o

A first sample decimation of the signal

takes place by summing the spectrum of the signal itself with its frequency conversions in multiples of 64 kHz, which leads to the conclusion that it is sufficient to use the two summands according to equation (13) to be considered when the indices i and 'r of the relationship

i + r = 8

obey, which means that the index r can be replaced by the index 8 - i of equation (13), so that one (neglecting an insignificant

__ Q

Delay ζ receives the following:

X (ζ ⁸ ) = Σ W ^ ⁸ " ¹ ^ W ^-83 ^ I ¹ Y (ζ ⁸ ) H (z ⁸ W" ^8k °) ^ + 8Ic ^U '^ ₁ ^W N ^W NV ^{Z; il} 8-i ^UW N '

Equation 14 expresses that each signal Y. (z) is filtered by eight different filters which, in addition to the index i, differ from each other by the index k, which can have eight sizes from 0 to 7, so that complexes at the outputs of the filters mentioned Signals,. can be obtained. The filter function for

JC 1
O, g

Filtering of each signal Y. (z) can be realized in a similar way as was done before for the multiplex side has been described, so that the arrangement of filters and modulators according to FIG. 13 is obtained, namely by doubling the real and imaginary signal components of the signal Y. (z). The arrangement according to For the moment, FIG. 13 can be viewed as relating to a specific quantity of the index i. These The arrangement operates at a frequency of 64 kHz and the identical filters 96 are denoted by subscript 8-1;

The filters H (z) are therefore according to the following Table IV

associated with the signal Y. (z), where in each column

this table the correspondence between the size i and the relative value r is to be determined.

Table IV

i 1 2 3 4th 5 6th 7th 8th r 7th 6th 5 4th 3 2 1 O

8 According to FIG. 13, the signal Y. (z) is sent to an input 9 entered, from which it arrives at the filter 89, the

64
the filter function K _fi (z) performs. At the output of this filter, the signal is distributed simultaneously on two paths, a modulator 90 being arranged on one path, which the successive scanning patterns with the successive powers of the number

W ₈ = (1 + j) // T

multiplied; these values have a repetition period of 8 kHz. The signal passes through it two identical filters 91, at the output of which the output signals are again transmitted simultaneously on two paths will. After the signals have passed through modulators 92 and 94 and filters 93, 95 and 96 the signals § appear. . at outputs 97. How

o, ₈
thinks, the signals Y ^ z) are complex signals, which is why

the structure according to Figure 13 must be provided twice, around the real and imaginary parts in the same way Way to process, the interactions between these two arrangements for real and imaginary sample patterns at the output of the multipliers 90 and 92 are to be taken into account, since no interaction for the multiplier 94 exists, the real sizes of which assume the values +1 and -1.

The arrangement according to FIG. 13 can be simplified according to the criteria described for block according to FIG. In particular, the multiplier stages 90, 92, 94 to the output of the filter assemblies, i.e. H. 91, 93, and routed to the output of the cascaded filters 95 and 9 6, with the sign of the argument of the function that represents the filter contained in the named blocks. These non-periodic filter pairs 91, 92 and 95 with the same input signal can result in a single filter the second form described are combined with two separate outputs, one of which Output for the sum of the signals from the even coefficients and the other for the sum of the signals of the odd-numbered coefficients of said filter is used. The signals from these two outputs

• ο

are combined into sum and difference signals.

The arrangement of Figure 13 is provided for the real and imaginary sampling patterns in duplicate, and it is provided to process the sampling patterns of a signal Y. (z) with a frequency of 64 kHz _e ; however, it is able to process signals Y. (z) for all sizes from i from 1 to 8 if these signals are fed in at the input in an already time-division multiplexed form, ie with the configuration of the original multiple signal Y (z) shown in FIG are now to be processed with a frequency of 512 kHz. The filters 9 6 should have multiplication coefficients which change with a frequency of 512 kHz as a function of time and cyclically or periodically assume the values or sizes corresponding to the filter H (z) as a function of time, where r relates to the scanning pattern / the subsequent with a time interval τ and differ by an index i, which is related to the quantity r in the manner indicated in Table IV. _{The signals C 1} emerging with a frequency of 65 kHz from the real and imaginary blocks of the arrangement according to FIG.

o, th index i can be cyclic or periodic

Extract at each time interval T from each output 97, with only eight consecutive sampling patterns a frequency of 3 kHz.

Each sequence of those located in the time interval T, from output19 The sampled sample pattern is assigned the same size of the index i and represents an 8 kHz frequency signal that deals with

O'

can be designated. The relational equation (14) can now be expressed as follows:

ν r 64> ν τι -Sk-I ¹ VT ^k (8-i) i-, 64,

^X k + Sk ₁ ^{(z ] =} AV ^{1 W} N ° ^V ki ^(z} ο 1 x = 1 o,

The entire set of signals

^or ° k

O'

results in a time sequence of 64 sample blocks,

The sampling patterns of each block are denoted by x, _Q , and,. denotes, the indices k and k ₁ denoting K _o , ι οι

Assign sampling patterns to the respective respective time-division multiplexed signals. The scanning patterns β,. are multiplied by the quantities W "° and become hence to α,

O,

A subsequent discrete Fourier transform is performed on each set of eight sample patterns with the time interval τ carried out over a distance 97 are output in accordance with FIG. 13 and to which a fixed value of the index k is assigned. The DFT can express as follows:

8 _ß ,

^X k + 8k ^{= Σ} V ¹
ο ^8k 1 i = 1 ^N

If the phase rotation imparted to the baseband signal is neglected, the above operation can also be carried out express the following equation:

. ^Σ

1 = 0

The sampling patterns of the baseband signal are included

- * «- ■ '3Ί30042

-fs-

a frequency of 8 kHz and by fixed sizes of the index k and k. differed from each other. The DFT operation expressed by equation (15) yields complex quantities x, ",, their real or

ο 1

alternate imaginary quantities for each baseband signal representing the signal spectrum in accordance can be taken into account with the frequency allocation according to FIG. 2b.

A subsequent 2 kHz conversion to a higher frequency delivers the desired spectrum of one with 8 kHz sampled real baseband signal. Optionally, instead of considering the real and imaginary Parts of the sampling pattern of each transmission link in an alternating manner the real size of the output signal of the block performing the DFT can be used, the real and the imaginary part as well as if necessary, the sign of the signal is switched which is supplied to the outputs 97 in blocks of eight successive scanning patterns. These operations should each be carried out once at two intervals T. Since the in each interval T from each of the eight outputs 97 blocks of eight adjacent or successive scanning patterns during successive time intervals T / 8

can be pulled out, the filter blocks 96 can be combined into a single arrangement. This arrangement takes that indicated by block 81 in 1-iyur 11, if one takes into account that the relocation of the multiplier 94 to the outputs of the arrangement shown in FIG (where they are useless and therefore ignored) the trans-

Q Q

formation of the function H (z) of blocks 96 to H (-z) conditional. It can thus be seen that the odd coefficients of the filter mentioned are negative so that the multiplier 69 of the block 81 according to FIG. 11 must have negative values if it Treated blocks of eight successive scanning patterns, which are assigned to the transmission paths 97 designated in FIG. 11 with 4, 5, 6, 7.

The above exemplary information and comments obviously apply to the parts required for frequency multiplexing the incoming baseband signals also for the part required to demultiplex these signals.

Although the invention has been specifically illustrated and described above in a preferred embodiment

is, of course, various changes and modifications are possible for those skilled in the art without departing from the scope and principles of the invention are deviated from.

Claims (7)

Patent claims: 1 / device for single sideband or 1 Sb multiplexing and demultiplexing a predetermined number 2 ⁿ of baseband signals, the multiplex side of which is formed by a circuit section which transforms the incoming baseband signals into a sampled digital form, so that the spectrum of these signals is symmetrical around the Zero frequency is arranged around, furthermore a discrete Fourier transform (DFT) processor, digital filters and modulators and a circuit section which converts the sampled signal in the form of a frequency multiplex function of the input signals to an analog form with appropriate frequency allocation, the Components corresponding to the components mentioned are also provided on the demultiplex side, characterized by the following individual parts:
A) on the multiplex transmission line: A1) a processor that does the discrete Fourier transform (DFT) on the complex sampling patterns of the baseband signals, which are preferably time-division multiplexed Format, said DFT in an identical manner to groups of one Frequency division multiplexing to be subjected Signals, of which each group has a signal number corresponding to the total number of signals to be subjected to a frequency division multiplexing function, divided by the factor 2, and at least two of these signal groups are provided, A2) a multiplier stage (multiplier), which the output from said DFT processor complex scanning patterns are multiplied by complex numbers and thus the signal spectra subject to frequency modulation, A3) two synchronously working, for the real and imaginary sampling patterns of the output signals the aforementioned multiplier provided Demultiplexer, which continues the real and imaginary sampling pattern cyclically to the inputs let through two filter-modulator arrangements, each provided for the real or imaginary sampling pattern of the signal are, A4) two identical filter-modulator arrangements for processing the real and imaginary ones 313-2 Sampling patterns of the signals, each of these arrangements having only one output and one number of inputs corresponding to the number of those treated in the same way by the DFT processor Having baseband signal groups in order to do so from each input signal in series and cyclically with respect to time and via one of the multiplexers mentioned take real or imaginary sample pattern of one of said signal groups, wherein the filters by a set of filters with a pass band or band accordingly the area which characterizes each baseband signal and in the case of cascade connection a filter function with a symmetrical around the zero frequency as well at frequencies that are a multiple of the sampling frequency of the frequency-multiplexed signal amount, provide around arranged pass band, and the provided modulators a Frequency shift of the frequency spectra passing through them with a corresponding size cause 2 times a fundamental frequency, which is the sampling frequency of the original Input signals, is equal, multiplied with the number of signals contained in each signal group, which are processed in the same way by the said processor, the filters and modulators having a so-called "fir tree structure", so that successive pairs of signals are passed to identical filters, the output signals of which are linked to one another are summed after one of these output signals has passed through one of the mentioned modulators, so that a single output signal is obtained by subsequently reducing the signal transmission paths by half, A5) a modulator for frequency conversion of the complex signals output by the two mentioned filter and modulator arrangements at 1/4 the sampling frequency of the original baseband signals, the real sampling patterns output by the modulator representing the 1 Sb- frequency division multiplexing function on the original baseband signals; and
B) in the multiplex line: B1) a modulator, which the spectrum of the sampled multiplex signal with half Frequency range for each signal to be subjected to a frequency demultiplexing function and thereby a complex consisting of real and imaginary scanning patterns Signal delivers, B2) two identical arrangements of filters and modulators for processing the real and imaginary sampling patterns of the signals, each of these arrangements having a single input and a number of outputs corresponding to 2 ⁿ times and next equal to half of the signals to be subjected to a frequency demultiplexing function, the filters being formed by a set of filters, the passband of which is equal to the range which characterizes each signal to be subjected to a baseband demultiplexing function, and which, when connected in cascade, provide a filter function with a passband which is symmetrical about the zero frequencies and multiples is arranged around the sampling frequency of the frequency-division multiplexed signal, the passband (also) being the same as the frequency range which characterizes each individual signal to be demultiplexed, the modulators cause a frequency conversion of a basic frequency corresponding to the power or the factor 2, which is the sampling frequency of the picked up multiplex signal, divided by the number the outputs of each of said filter and modulator arrangements, and whereby the filters and modulators are arranged in a so-called "fir tree structure", so that the signal after passing through a single filter becomes two identical filters one of which has a modulator at its output, and each individual of these two new output signals is transmitted to a downstream pair of filters, one of which in turn is provided with an output modulator, etc., until the required number of Output signals is achieved, B3) a set of synchronous multiplexers operating in a cyclic or periodic manner or sequentially a number from each of the output signals of said filters and modulators of temporally successive scanning patterns corresponding to the number of the additionally multiplexing ones Signals divided by the number of outputs output signals of each of the aforementioned arrangements, these scanning patterns in sets of real and imaginary sampling patterns leading to a single output of the Connection network are routed, at the output of which a through real and imaginary The complex signal represented by the scanning pattern is present, B4) a multiplier stage (multiplier) for multiplying that of said multiplexers delivered real and imaginary sampling patterns with corresponding complex ones Numbers, equivalent to frequency modulation, and B5) a processor for performing a discrete Fourier transform (DFT) on the complex sampling patterns emerging from the multiplier stage, this processor the complex sampling pattern corresponding to a single output signal of the mentioned filter and modulator arrangement are processed in an identical manner to those exiting the processor Sampling patterns characterize the single sideband signals. 2. Apparatus according to claim 1, characterized in that the frequency multiplex function is characterized that only one of the filter and modulator arrangements, for processing the real and imaginary Sampling pattern of the signals designed for processing both the temporally sequentially arranged real scanning pattern as well as the imaginary scanning pattern is used, and means for temporal alignment of the real and imaginary sampling patterns between which there is an interaction exists, and for the subsequent arrangement of the same in a chronological order or time sequence the interaction processes are provided .. 3. Device according to claim 1 and 2, characterized in that that more than one set of baseband signals are multiplexed and demultiplexed and that each set contains an equal number of signals to be multiplexed and demultiplexed and the multiplexed signals in the like Frequency bands or ranges are assigned with the same sampling frequency and the device on the mentioned signal sets according to the time division multiplex principle acts. 4. Device according to one of claims 1 to 3, characterized in that the filter elements on the multiplex side, which the non-zero input sampling patterns only during a small portion of the time interval between successive sampling patterns of the baseband signals decrease, to an iri single filter element with variable coefficients are combined, which has a single input and has numerous outputs, the input being the real or imaginary components of the complex sampling pattern decreases, and that the multiplexer (in this arrangement) between the variable coefficient filters and the inputs to the remaining part of the Filter-modulator arrangement is switched on. 5. Device according to one of the preceding claims, characterized in that in the block of filters and modulators on the demultiplex path, the filters that are switched on at the outputs and Sampling pattern to the downstream block only during a fraction of the baseband signal sampling period to a single variable coefficient filter with multiple inputs and a single output are combined, with the inputs with the upstream filter and modulator sets via time-variable connections are connected and the sampling pattern at the output directly to the multiplier stage (multiplier) which dom DFT processor is connected upstream is. 6. Device according to one of the preceding claims, characterized in that in the on the multiplex route lying filter pairs, which deliver output signals, the output signals with each other are summed after one of these signals has been subjected to a modulation that the Multiplier stage performing this modulation is moved to the input of the filter in question, whose frequency response is half of its frequency repetition period is shifted that the filter pairs are combined into a single filter arrangement with one output and two inputs, and that these inputs (here) the sum and the difference of the input signals to the previously separated filters decrease, the sum and The difference is formed after one of the signals passes the frequency-shifted modulator element Has. 7. Device according to one of the preceding claims, characterized in that in the demultiplex path un3 in the filter pairs, which take the same signal at their inputs, and after one Modulation of the signal at the input of one of the filters, the modulator element to the output of the relevant Filter has been moved or relocated, with the relevant filter ' a filter function with a frequency conversion corresponding to half of the frequency period of this Filter function has that the two filters (here) to a single filter arrangement with one Input and two outputs are combined and the formation of sums and differences on the output signals takes place, the difference being passed through the shifted or relocated modulator will.