DE3066922D1 - A semiconductor memory device in which soft errors due to alpha particles are prevented - Google Patents

A semiconductor memory device in which soft errors due to alpha particles are prevented

Info

Publication number
DE3066922D1
DE3066922D1 DE8080301294T DE3066922T DE3066922D1 DE 3066922 D1 DE3066922 D1 DE 3066922D1 DE 8080301294 T DE8080301294 T DE 8080301294T DE 3066922 T DE3066922 T DE 3066922T DE 3066922 D1 DE3066922 D1 DE 3066922D1
Authority
DE
Germany
Prior art keywords
prevented
memory device
semiconductor memory
errors due
alpha particles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8080301294T
Other languages
German (de)
Inventor
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3066922D1 publication Critical patent/DE3066922D1/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H01L23/556—Protection against radiation, e.g. light or electromagnetic waves against alpha rays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1091—Substrate region of field-effect devices of charge coupled devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/762—Charge transfer devices
    • H01L29/765—Charge-coupled devices
    • H01L29/768—Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76833—Buried channel CCD
    • H01L29/7685—Three-Phase CCD
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/33—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor extending under the transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE8080301294T 1979-05-02 1980-04-23 A semiconductor memory device in which soft errors due to alpha particles are prevented Expired DE3066922D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5460679A JPS55146956A (en) 1979-05-02 1979-05-02 Semiconductor element having function for avoiding generation of soft error due to alpha ray

Publications (1)

Publication Number Publication Date
DE3066922D1 true DE3066922D1 (en) 1984-04-19

Family

ID=12975387

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8080301294T Expired DE3066922D1 (en) 1979-05-02 1980-04-23 A semiconductor memory device in which soft errors due to alpha particles are prevented

Country Status (4)

Country Link
EP (1) EP0018764B1 (en)
JP (1) JPS55146956A (en)
CA (1) CA1153829A (en)
DE (1) DE3066922D1 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57210665A (en) * 1981-06-19 1982-12-24 Mitsubishi Electric Corp Semiconductor memory device
JPS602782B2 (en) * 1982-06-30 1985-01-23 富士通株式会社 semiconductor storage device
JPS60126861A (en) * 1983-12-13 1985-07-06 Fujitsu Ltd Semiconductor memory device
EP0169938B1 (en) * 1983-12-15 1989-03-29 Kabushiki Kaisha Toshiba Semiconductor memory device having trenched capacitor
US4688063A (en) * 1984-06-29 1987-08-18 International Business Machines Corporation Dynamic ram cell with MOS trench capacitor in CMOS
JPS62114265A (en) * 1985-11-13 1987-05-26 Mitsubishi Electric Corp Semiconductor memory device
US4852060A (en) * 1988-03-31 1989-07-25 International Business Machines Corporation Soft error resistant data storage cells
JPH07101733B2 (en) * 1988-05-20 1995-11-01 日本電気株式会社 Semiconductor memory device
JPH01305561A (en) * 1988-06-03 1989-12-08 Fujitsu Ltd Semiconductor storage device
FR2655197B1 (en) * 1989-11-28 1995-03-17 Sgs Thomson Microelectronics INTEGRATED CIRCUIT COMPRISING MEMORIES AND ITS MANUFACTURING METHOD.
JPH11224935A (en) 1997-12-02 1999-08-17 Mitsubishi Electric Corp Semiconductor integrated circuit board and manufacture of semiconductor integrated circuit thereof

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5279787A (en) * 1975-12-26 1977-07-05 Toshiba Corp Integrated circuit device
DE2736473A1 (en) * 1977-08-12 1979-02-22 Siemens Ag METHOD OF MAKING A SINGLE TRANSISTOR MEMORY CELL

Also Published As

Publication number Publication date
EP0018764B1 (en) 1984-03-14
CA1153829A (en) 1983-09-13
EP0018764A1 (en) 1980-11-12
JPS6262065B2 (en) 1987-12-24
JPS55146956A (en) 1980-11-15

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee