DE3026988A1 - CIRCUIT ARRANGEMENT AND METHOD FOR GENERATING A MUDULATION FORMAT FOR TRANSMITTING MULTIPLE WIDEBAND SIGNALS - Google Patents

Description

description

The present invention relates to a circuit arrangement according to the preamble of claim 1 and a Method according to the preamble of patent claim 22. Such a circuit arrangement is preferably suitable and such a method of transmitting multiple broadband video signals from a video camera via a single optical fiber array.

Traditionally, broadband signals, such as a color television signal generated by a broadcast television camera, have been used from the camera via a multi-conductor cable (coaxial cable) to a central processing unit. Such a system requires a considerable amount of compensation to correct losses in the cable. Such compensation must be switched on and off depending on the length of the cable used. In disadvantageously, even the best equalizers produce a large amount of undesirable distortion. About that in addition, the cable itself is bulky and cumbersome to handle.

In a more complicated solution, the broadband signals are transmitted via a triax system in which the multiple broadband signals modulated onto different AM or FM carriers and via a single coaxial cable with very large diameter are transferred. Such a system requires complex and time-consuming development work with a correspondingly complex hardware for its implementation.

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In a third solution, an optical fiber cable can be used, which has the advantage that Much larger distances with minimal distortion and with extremely large signal bandwidth options can be mastered are. For a straight application, however, are for multiple signals multiple fibers in the cable with corresponding multiple connectors at both ends of the cable necessary. This is disadvantageous because optical fibers are currently very expensive. In addition, there are two Copper lines required for power transmission. Such a multiple fiber optic cable is therefore not desirable either.

It is therefore advisable to transmit the multiple signals over a single optical fiber cable in order to reduce the effort and expense to keep the number of optical fibers and connectors as small as possible. In a system where a A single optical fiber cable is used, a signal is transmitted as a pure baseband signal while the remaining signals are transmitted on specific FM or AM carriers. However, it is in such a way System generally used light-generating laser diode a non-linear element that is used to generate massive Intermodulation distortion, i.e., significant crosstalk between channels, tends, if not relative Carrier levels must be carefully limited. However, this in turn reduces the carrier level, which means that the Signal-to-noise ratio is impaired in an undesirable manner.

The present invention is based on the object of the disadvantages of known systems by providing a better modulation formats, a medium and a technique for multiplexing transmission of, for example, a

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Color video camera to avoid broadband video signals generated over a conductor.

A circuit arrangement and a method are intended for generating and decoding a modulation format that use the maximum advantages of the optical fibers own broadband properties power.

By configuring the format signal train of the modulation format In addition, a relatively simple demultiplexing process with associated Circuit arrangement be possible.

The object defined above is achieved in an inventive Circuit arrangement of the type mentioned according to the invention by the features of the characterizing Part of claim 1 and in a method according to the invention by the features of the characterizing Part of claim 22 solved.

According to one embodiment, red, green and blue are video signals (RGB video signals) fed into key and hold circuits via corresponding channels, which through a clock frequency F that obeys the Nyquist criterion can be controlled. The keyed video signals S1, S2 and S3 are modulated, the output signal being a signal train of the time period 1 / F with a stationary reference edge EO and time-variable edges E1, E2 and E3 describes, in which the edges EO and E2 have the same polarity own. The positions of the flanks E1, Ξ2 and E3 in relation on the edge EO are as far as possible as a function of the corresponding sampled video signals S1, S2 and S3 variable over time, i.e. controllable. The entire, for that

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The available modulation time is equal to that Sampling interval 1 / F minus the sum of the rise times of the edges EO, E1, E2 and E3, with only the rise time the reference edge EO is "lost".

When transmitted over a single optical fiber, the Signal form by identifying the reference edge EO and their subsequent use for phase locking an oscillator oscillating at the frequency F is demultiplexed and demodulated. The edges EO and E2 have the same polarity, whereby to distinguish between in one embodiment, the allotted control time of the generated signal train is such that the interval between the edges EO and E2 is always half of the entire waveform period exceeds 1 / F. Denit will a simple demultiplexing process is possible, with sin binary divisors with complementary outputs, which triggers the edges EO and E2, a higher mean DC voltage level generated at the output, which is positive as a function of the reference edge EO. The output signals are compared and EO by selecting the output signal with the greatest mean DC voltage level identified.

In a modification of the format explained above, the time interval between the edges EO and E2 is always smaller than half of the total waveform period, with the binary divider providing a larger mean DC voltage level generated at the output, which is negative as a function of the edge EO.

Further refinements both with regard to the circuit arrangement according to the invention and the one according to the invention Process are characterized in corresponding subclaims.

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The invention is explained in more detail below with reference to the exemplary embodiments shown in the figures of the drawing explained. It shows:

1 shows a block diagram of the circuit arrangement according to the invention ;

FIGS. 2 and 7 each show a circuit diagram of a first embodiment of the modulator and the demultiplexer the circuit arrangement according to FIG. 1;

FIGS. 3A-3F each show a diagram of generated at various points in the circuit arrangement of FIG Signal trains;

Fig. 4 is a diagram of a signal train showing an embodiment shows the modulation format according to the invention;

FIG. 5 shows a circuit diagram of an edge discriminator in the circuit arrangement according to FIG. 1; FIG.

FIGS. 6A and 6F each show a diagram of from the signal train according to FIG. 4 during the edge discrimination process generated signal trains;

FIGS. 8a to 8G each show a diagram of different points in the circuit arrangement according to FIG. 7 generated signal trains;

9 and 11 each show a circuit diagram of a further embodiment the modulator and the demultiplexer in the circuit arrangement according to FIG. 1; and

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FIGS. 10A to 10H and 12A to 12G are each a diagram

of in different points of the circuit arrangements 9 and 11 generated signal trains.

Fig. 1 shows an embodiment of a circuit arrangement for generating the modulation format as a function of broadband red, green and blue video signals (RGB video signals) for the transmission of the coded multiplex signal as well as for demultiplexing and decoding the transmitted Multiplex signals according to the invention. For this purpose, three broadband signals are used in a generator 10 according to the RGB video signals in corresponding key and hold amplifiers 12, 14, 16 via three input terminals 18, 20 and 22 of corresponding channels 1, 2 and 3 are fed in. The key and hold amplifiers are from one coupled oscillator 24 is controlled with a clock frequency F. Keyed video signals S1, S2 and S3 are combined fed from the oscillator 24 into a modulator 26 at the clock frequency F. The modulated video signals serve to control a light-emitting diode arrangement 28 (LED arrangement) (or laser diode, etc.) via a driver 30. The signal train of the modulated video signal from the modulator 26 is shown in various forms in FIGS 3F, 4 and 10H show and define different modulation formats according to the invention.

The multiple (multiplex) modulation video signals are given by the LED arrangement 28 to a single optical fiber cable 32 for transmission to a receiver 34. The signals are received by a photodiode array 36, converting their electrical equivalent into a Preamplifier 38 is fed. The amplified signals are in an edge discriminator 40 as well as in a Demultiplexer / demodulator 42 entered. The edge discriminator 40 is connected to a phase-locked oscillator 44

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coupled, which in turn is coupled to the demultiplexer / demodulator 42. This latter circuit 42 provides (three) demodulated output video signals in respective channels 1, 2 and 3 via output terminals 46, 48 and 50.

In a modified, simpler embodiment, the duty cycle and hold amplifiers 12, 14 and 16 can be completely omitted from the system, the RGB color signals at the connections 18, 2 0 and 22 directly in the modulator 26 can be fed in. In such a simplified system, the video signals are "naturally" keyed in contrast to the system using key and hold amplifiers (Fig. 1), in which a "uniform" Tactile solution is used. The lack of the duty cycle and hold amplifier causes a certain high frequency intermodulation distortion, which is permissible in the present video signal system instead of the complexity which is caused by the use of key and hold amplifiers is conditional. However, if optimal operating behavior is to be achieved, thus the duty cycle and hold amplifiers as shown in FIG. 1 can be provided.

Fig. 2 shows an embodiment of the modulator 26, which directly the RGB color signals from the terminals 18, 20 and 22, which is the natural tactile solution mentioned above. The signals are in one side of a Sequence of difference comparison stages 52, 54 and 56 fed in, which are formed by corresponding pairs of transistors whose emitters are connected together, Specifically, the signals are fed into a base of each transistor pair. The other side of the comparison stage is connected to a terminal via the other transistor bases 58 fed in a triangular signal. The collectors of the transistors are at a terminal 60 to a source for coupled to a positive voltage. A power source like

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for example a negative voltage 62 is applied to the differential comparison stages coupled, a transistor 64 forming the current source for the comparison stage 52. In the comparison stages 54 and 56, the current is selectively fed in via transistors 66 and 68, which in turn fed by one through a terminal 70 at their bases with a square wave signal. The triangle signal and the Square-wave signals are generated by the oscillator 24 of FIG. 1, the rise times of the square-wave signal being accurate correspond to the turning points of the triangular signal, which will be described in more detail below.

The outputs of the comparison stages 52 and 56 are on NOR gate 72 coupled while the output of the comparison stage 54 is coupled to an inverter 74. The exits of the gate 72 and the inverter 74 are connected together to form an output terminal 76 at which the composite modulated signal train is supplied, which has a desired modulation format that is used for control the LED array 28 is used.

According to FIG. 3, the difference comparison stages 52, 54 and 56 compare the triangular signal at connection 58 (FIG. 3A) the instantaneous voltages of the RGB color signals picked up at the connections 18, 20 and 22. The power source 62 is selectively applied to the comparison stages as a function of the square-wave signals (FIG. 3B) fed into terminal 70 coupled. It should be noted that the rise times of the signal of Figure 3B correspond to the reversal points of the square wave signal correspond to Fig. 3A. When the color signal is equal to the value of the triangle signal, the transistors change the corresponding comparison stages 56, 54 and 52 their switching states, to produce three equal sets of pulses, the waveforms of which are shown in Figures 3C, 3D and 3E is. The three sets of waveforms are generated via the logic

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see NOR gate 72 and inverter 74 combined to produce the To generate the modulation format in the form of the composite signal train of FIG. 3F. The latter signal train corresponds to that of FIG. 4 and contains a stationary reference edge EO, one representing the green color channel signal temporally variable reference edge E1, a temporally variable which represents the red color channel signal Edge E2 and a temporally variable edge E3 representing the blue color channel signal. The different signal trains 3A to 3F are indicated at special points on the modulator according to FIG.

Referring to Figures 4 and 3F, it can be seen that the modulation format signal train furthermore by a stationary reference edge EO running into the positive and temporally variable edges in the form of a negative flank E1, one positive running edge E2 and a negative running edge E3. As shown, determine the Sizes of the at the outputs of the duty cycle and hold amplifiers 12, 14 and 16 of FIG. 1 or by the modulator 26 of the Simplified embodiment according to FIG. 2 gated video signals the time discrepancies and thus the corresponding Positions of the edges E1, E2 and E3 in relation to the stationary reference edge EO. It should be noted that in contrast For conventional pulse width modulation techniques, the modulation format described here shows the time deviations and thus determines the positions of the flanks E1, E2 and E3 with respect to the same stationary reference flank EO. The signal train has a period of 1 / F, where the position of the edge E1 corresponds to the signal in channel 1 and is equal to the instantaneous value of the keyed (green) video signal. as well the positions of the edges E2 and E3 correspond to the sizes of the signals in channels 2 and 3 (red and blue video signals) .

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A modified embodiment for the format signal train according to Fig. 3F and 4, wherein the time interval between the reference edge EO and the following edge of the same Polarity, i.e. the edge E2 is always less than half of the total signal train period of 1 / F, is shown in Figures 9 and 10H. It should be noted that in the format signal trains of Figures 3F and 4 or 1OH the next temporally variable edge (E2) of the same polarity as that of the reference edge EO never the midpoint the total available time period of the signal train in the course of the modulation crosses. For a practical Circuit arrangement, it is obvious that the time-variable edge of the same polarity around one predetermined small amount of time should remain away from the midpoint.

The photodiode array 36 and the preamplifier associated therewith 38 are the main sources of noise in the system. The effect of this noise is kept to a minimum by that the rise times of the edges EO, E1, E2 and E3 are only due to the light dispersion in the optical fiber of the cable 32 and that the keyed video signals are as different as possible from their corresponding Edges differ, which corresponds to the use of the highest possible modulation index. The whole for the control The time available is equal to the sampling interval (1 / F) minus the sum of the rise times of the edges EO, E1, E2 and E3, where the rise time of the reference edge EO is the only "lost" time of the signal train.

An emitter-coupled logic, very fast transistors and low-value load transistors are used in the circuits used to meet the requirements for very high speed. For example, the edge rise times are on the order of 1 ns or less and the period 1 / F of the format waveforms is 62 1/2 ns. There is therefore a total control time of 58.5 ns

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the three time-variable planks E1, E2 and E3 for Disposal.

According to FIG. 5, the edge discriminator 40 includes one Binary divider 78 with complementary outputs Q and Q, which are predetermined edges of the received modulation format signal train trigger. The signals at the outputs Q and Q are transmitted to a switch 80 and via resistors 84 is applied to a positive or a negative input of a DC voltage level comparison stage 82. The input signals for the comparison stage 82 are coupled to ground via capacitors 86, wherein these capacitors act as a low-pass smoothing filter form. The switch 80 is thus controlled via the DC voltage level detected by the comparison stage 82.

With regard to the modulation formats according to FIGS. 3F and 4 (and 10H), this is the format signal train via the generator 10 once generated and the multiple modulation signals are transmitted over the optical fiber cable 32, so it is required for the demultiplexing and demodulation process of the signal train, first the reference edge EO to identify and then use them to determine the phase of the oscillating with the sampling frequency F of the oscillator 24 phase locked oscillator 44 to use. Since the edge E2 has the same positive polarity as the Reference edge EO, i.e. it is the next Edge with the same polarity, it is necessary to make a distinction between these two edges. In the RGB color video generator system for which the modulation format is described here for example, it is appropriate that the signal-to-noise ratio of a Channel, namely the green signal channel, is significantly larger than that of the red and blue signal channel. This is based on the fact that the green signal has the greatest influence on the quality of the image. Such a signal

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Noise correlation is realized in a simple manner in that a larger proportion of the total available control time is made available for the corresponding edge (E1 in FIGS. 3F and 4 and E3 in FIG. 10H) of the special channel (green channel 1). This results in the above-mentioned time period relationship, that is, the time interval between the edges EO and E2 always exceeds one half of the entire signal train period as in FIGS Half of the total waveform period as in Figure 10H. Another way to express this connection is that the next edge (E2) of the same polarity as that of the stationary reference edge (EO) never crosses the middle point of the entire time period of the signal train in the course of its modulation, but this one only approximates.

The above conditions enable a simple demultiplexing process of the received signals over the receiver 34. For this purpose, according to FIG. 5, the received signal, which corresponds to the signal sequence according to FIG. fed into the binary divider 78, the signals at the complementary outputs Q and Q (see FIGS. 6A and 6B) trigger the edges EO and E2. Assume that the phase-locked oscillator 44 is going positive Edges operate as is the case when using the format signal train of FIGS. 3F and 4, so it is necessary to select the output signal of the binary divider, which has the waveform of Fig. 6A. This is done by comparing the mean DC voltage level the two signals at the outputs Q and Q via the comparison stage 82 and by selecting the output signal, that has the largest mean DC voltage level. This is done via switch 80 as a function of the output

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signals of the comparison stage 82 reached.

Since when using the format signal train according to Fig. 1OH the phase-locked oscillator 44 operates on positive edges, it is also necessary that To select the output of the binary divider 78 which has the waveform of Fig. 6A. So they work Comparison stage 82 and the switch 80 in such a way that the output signal is selected which is the smallest has an average DC voltage level.

FIG. 7 shows an embodiment of a circuit which is used as a demultiplexer part in the demultiplexer / demodulator 42 (Fig. 1) can be used to demultiplex the transmitted signals prior to demodulation. The generated signal trains are shown in Figures 8A to 8G. Therefore, RGB-D flip-flops are used in the demultiplexer 88, 90 and 92 used. The transmitted format signal train shown in Fig. 8A is provided by the preamplifier 38 (FIG. 1) via a line 94 to the red-D flip-flop 88 and to two inputs of a NOR gate 96. The phase-locked oscillator 44 (FIG. 1) provides a clock shown in FIG. 8B, which is generated by an in the Phase fixed on the stationary reference edge EO Square wave signal is formed with 16 MHz. The phase relationship between the edge EO and the (positive) edge of the phase-locked oscillator clock can be seen from Figs. 8A and 8B. The clock is via a line 97 and a monostable multivibrator 98 (with a toggle time of 8 ns) into the set input of the flip-flop 88, via line 97 into the set input of the blue flip-flop 90 and via the line 97 and a NOR gate 100 into the set input of the green flip-flop 92 fed. The NOR gate 96 is coupled to the clock inputs of the flip-flops 90 and 92, while the output of the flip-flop 90 is coupled to the second input of the NOR gate 100.

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To decode the red channel signal, the positive edge of the clock of Figure 8B generates a sharp pulse (8 ns) in the monostable multivibrator 98 (FIG. 8C), which resets the red flip-flop 88. The next positive, temporally variable edge (E2) of the format signal train at the clock input of the red flip-flop 88 resets this. Thus, the output signal of the red flip-flop 88 is a fixed time, ins Negative running edge followed by a positive running edge, the position of which is related to the Reference edge EO as a function of the red channel signal changes, which is the red color signal edge E2 (Fig. 8D).

For decoding the blue channel signal: zt the clock is that Blue flip-flop 90 back, with the positive edge that goes into the clock input of flip-flop 90 is fed in, this resets. Because the next positive edge is due to the inverting effect of NOR gate 96 from the time-variable blue channel edge E3 of the format signal train on line 94 is generated, the position of the blue color signal edge E3, which determines the resetting of the blue flip-flop 90. Therefore, the output signal of the blue flip-flop 90 is a time-fixed negative going edge, which is followed by a positive edge, the position of which is related to the reference edge EO as a function of the blue channel signal changes, which is the blue color signal edge E3 (FIG. 8E).

A NOR combination is generated to decode the green channel signal the demodulated output signal of the blue flip-flop and the clock have a positive edge, which resets the green flip-flop 92 (Fig. 8F), with the next in the clock input of the flip-flop 92 fed into the positive edge of this flip

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Flop resets. It is the green color signal edge E1, which sets the flip-flop 92, making this green flip-flop 92 generates the signal train of FIG. 8G.

The various signal trains shown in FIGS. 8A to 8G are at the corresponding locations in FIG Demultiplexer circuit according to FIG. 7 entered.

The output variables of the demultiplexer according to FIG. 7 are thus formed by three signals, each of which has one stationary edge related to the reference edge EO as well as a flank which changes over time as a function of the position of the corresponding flanks E1, E2 and E3 the color channel signals change. The red, blue and green demultiplexer signals are fed into the demodulator part of the Demultiplexer / demodulator 42 fed, which the time-variable edges according to conventional pulse width converter techniques transferred into corresponding tensions. The tensions are filtered and form the RGB color signals at the output terminals 46, 48 and 50 of FIG. 1.

9 to 12 show modified embodiments of the circuit arrangements and the associated generated Signal trains, based on the modified modulation format, with the time interval between the stationary Reference edge EO and the next time variable Edge of the same polarity (E2) is less than one half of the total waveform period (Fig. 10H). To the Realization and use of this modified modulation format are the modulator according to FIG. 2 and the Demultiplexer according to FIG. 7 slightly modified, as shown in FIGS. 9 to 11. In all figures the same components are denoted by the same reference numerals.

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Fig. 9 shows a modulator with the inputs 58, 60, 62 and 70, the sequence of differential comparison stages 52, 54 and 56 and the current source transistors 64, 66 and 68 of FIG. 2. In this embodiment, however, the green and blue color inputs are on inputs 22 and 20 of the difference comparison stages 56 and 54 vice versa. In addition, the signal train summation circuit is from the NOR gate 72 and the inverter 74 through an AND gate coupled to the difference comparison stages 54 and 56 102 a NOR gate 104 coupled to the comparison stages 54 and 72 and one coupled to the gates 102 and 104 OR gate 106 replaced. The modulation format appearing at output terminal 76 as shown in FIG. 10H the stationary reference edge EO with temporally variable edges E1, E2 and E3 corresponding to the red, blue and Green color signal channel.

It should be noted that the time interval between the reference edge EO and the following edge E2 of the same polarity is always less than half of the total available time period of the signal train while in the format according to FIGS. 3F and 4 it always exceeds one half. In both modulation formats, however, the condition is met that the next Edge E2 of the same polarity as that of the reference edge EO in the course of the modulation never the middle point crosses the entire time period of the signal train, but only approximates it.

The signal trains of FIGS. 10A-10H, which at various Places entered in the modulator according to FIG. 9 generally correspond to those above with reference to FIGS. 3A to 3F in connection with Fig. 2 described signal trains and

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are therefore no longer explained in more detail at this point.

The modified multiplexer circuit according to FIG. 11 corresponds largely that of FIG. 7, whereby the inputs 94 and 97, the D flip-flops 88, 90 and 92 and NOR gates 96 and 100 are present. In adapting the demultiplexer to the modulation format however, according to FIG. 10H, the circuit couples the clock (FIG. 12B) of the phase-locked oscillator directly to the Set input of the flip-flop 88, via a monostable multivibrator 108 (with a flip-over time of 20 ns) to the Set input of the flip-flop 90 and via the multivibrator 108 and the NOR gate 100 to the set input of the flip-flop 92. The outputs of the flip-flops 88, 90 and 92 are different in that they are the blue, green or Red color signal edge E2, E3 and E1 deliver, like this shown in Figures 12C, 12E and 12G.

The generation of the various signal trains shown in FIGS. 12A-12G which appear at various points in the demultiplexer circuit 11, corresponds generally to the above with reference to FIGS. 8A to 8G in connection connections described with FIG. 7, so that a further explanation can be dispensed with at this point.

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Claims (27)

Patent attorneys Dipl.-Ing. H. Weickmann, DjPl.-Phys. Dr. K. Fincke Dipl.-Ing. R A.Weickmann, Dipl.-Chem. Dr. Ing.H. LiSKA DXIIIH 8000 MUNICH 86, THE 1l '. J- !; PO Box 860 820 MOHLSTRASSE 22, CALL NUMBER 98 39 21/22 ID-2665 Ampex Corporation
Broadway-Redwood City, Calif. 94063, V.St.A. Circuit arrangement and method for generating a modulation format for transmission of multiple broadband signals Claims j 1./Circuit arrangement for generating and using a Modulation formats for the transmission of multiple broadband signals corresponding signal channels over a single optical fiber array, characterized by a generator (10) containing a modulator (26) for generating the modulation format in the form of a signal with a predetermined time period, which is a stationary Has reference edge and several temporally controllable edges, the position of the latter edges being relative corresponding to the stationary reference edge as a function sampled signals of the corresponding signal channels are varied over time, and by a demultiplexer coupled to the generator (10) via the single optical fiber arrangement (32) (42) containing receiver (34) for detection 130065/0531 the stationary reference edge and to separate the Temporally modifiable edges with respect to the stationary reference edge for the purpose of recovering the multiple broadband signals. 2. Circuit arrangement according to claim 1, characterized in that that the next temporally controllable edge of the same polarity as the stationary reference edge im The course of their deviation is the middle point of the total signal period only approximates but never crosses. 3. Circuit arrangement according to claim 1 and 2, characterized in that that at least two broadband signals of two corresponding signal channels via the modulation format be modulated by corresponding time deviations of corresponding temporally controllable edges. 4. Circuit arrangement according to one of claims 1 to 3, characterized in that three broadband signals are three corresponding signal channels via the modulation format be modulated by corresponding time deviations of corresponding temporally controllable edges. 5. Circuit arrangement according to one of claims 1 to 4, characterized in that the broadband signals are color components of a composite color video signal and that a predetermined color component by the temporally modifiable edge is represented, which has the greatest time modulation. 6. Circuit arrangement according to one of claims 1 to 5, characterized in that the generator (10) has a key circuit (12, 14, 16, 24) for sampling each broadband signal of corresponding signal channels with a given 130065/0531 Has frequency and that the sampled signals of corresponding channels in time with the corresponding Shift the controllable edges in accordance with the sampled values at the given frequency. 7. Circuit arrangement according to one of claims 1 to 6, characterized in that the modulator (26) has the following Has components: an oscillator (24) for generating a driver signal with a predetermined sampling frequency, and a difference comparator (52, 54, 56) in each channel to compare the level of the driver signal with that of the corresponding broadband signal for the purpose of determining the positions the corresponding temporally controllable edges. 8. Circuit arrangement according to one of claims 1 to 7, characterized in that the receiver (34) has an edge discriminator (40) for the detection of the stationary reference edge as well as for the detection of the next timed modulable Edge of the same polarity, which never crosses the middle point of the total signal period. 9. Circuit arrangement according to one of claims 1 to 8, characterized in that the edge discriminator (40) has the following components: a binary divider (78) with complementary outputs and a comparison circuit (82, 84, 86) coupled to the complementary outputs for selecting the output signal these outputs, which as a function of the reference edge ins Positive runs. 10. Circuit arrangement according to one of claims 1 to 9, characterized in that the receiver (34) further comprises the following components:
one attached to the single optical fiber assembly (32) 130065/0531 coupled light detector (36) for receiving the transmitted Modulation formats, and a phase-locked oscillator (44) coupled selectively to the complementary outputs of the binary divider (78) via the comparison circuit (82, 84, 86),
wherein the demultiplexer (42) is coupled to the light detector (36) and the phase-locked oscillator (44). 11. Circuit arrangement according to one of claims 1 to 10, characterized in that the key circuit (12, 14, 16, 24) each has a key and hold stage (12, 14, 16) in each broadband signal channel as well as a clock stage (24) for controlling the sampling and holding stage with a predetermined one Having frequency. 12. Circuit arrangement according to one of claims 1 to 11, characterized in that the modulator (26) the differential comparison stages (52, 54, 56) forming transistor pairs in each signal channel, one to each
Transistor pair coupled current source (64, 66, 68)
and a gate circuit (72, 74) coupled to the transistor pairs for generating the modulation format
having. 13. Circuit arrangement according to one of claims 1 to 12, characterized in that the comparison circuit (82, 84, 86) is connected to the complementary outputs of the binary divider (78) is coupled to its output signal with the largest mean DC voltage level · for the purpose of definition of the part of the signal period which always exceeds half of the total signal period. 14. Circuit arrangement according to one of claims 1 to 13, characterized by one coupled to the complementary outputs of the binary divider (78) and from the comparison circuit (82, 84, 86) controlled switch (80) for 130065/0531 Selection of the output signal with the highest mean DC voltage level. 15. Circuit arrangement according to one of claims 1 to 14, characterized in that the demultiplexer (42) has a flip-flop (88, 90, 92) in each channel, controlled by the phase-locked oscillator (44) and the corresponding time-modifiable edges are to selectively regenerate the temporally modifiable edges relative to the reference edge. 16. Circuit arrangement according to one of claims 1 to 12 and 15, characterized in that the comparison circuit (82, 84, 86) is connected to the complementary outputs of the binary divider (78) is coupled to its output signal with the smallest mean DC voltage level for the purpose of definition of the part of the signal period which is always less than half of the total signal period. 17. Circuit arrangement according to one of claims 1 to 12 and 15 and 16, characterized in that the to the Outputs of the binary divider (78) coupled and controlled by the comparison circuit (82, 84, 86) switches (80) is used to select the output signal with the lowest mean DC voltage level. 18. Circuit arrangement according to one of claims 1 to 17 for generating a corresponding multiple broadband signals The modulation format representing signal channels, characterized in that the one containing the modulator (26) Generator (10) for generating the modulation format in the form of a signal of the time period 1 / F / the one contains stationary reference edge and several temporally variable edges, the position of which is related to the stationary 130065/0531 Reference edge as a function of sensed sizes of their corresponding signals changes. 19. Circuit arrangement according to one of claims 1 to 18, characterized in that the next temporally variable edge of the same polarity as the stationary edge can reach the middle point of the entire available signal time period in the course of their modulation, but this never crosses. 20. Circuit arrangement according to one of claims 1 to 19, characterized in that the time interval between the stationary reference edge and the next in time variable edge of the same polarity always exceeds half of the entire signal period. 21. Circuit arrangement according to one of claims 1 to 19, characterized in that the time interval between the stationary reference edge and the next in time variable edge of the same polarity is always less than half of the total signal period. 22. Method for generating an improved modulation format, which is suitable for displaying multiple broadband signals from corresponding signal channels, characterized in that, that each of the broadband signals is sampled to determine its instantaneous values with a given sampling frequency is, and that the modulation format is generated as a signal train with a predetermined time period, which is a stationary Has reference edge and several temporally controllable edges, the positions of which are related to the stationary Reference edge over time as a function of the corresponding keyed Change broadband signals. 23. The method according to claim 22, characterized in that for 130065/0531 3026388 Generation of the temporally controllable edges a next Temporally modifiable edge of the same polarity as that of the reference edge is generated, this being temporally controllable edge in the course of their modulation reach the middle point of the specified signal train time period can, but this never crosses. 24. The method according to claim 22 and 23 for the use of the multiple broadband signals representing the modulation format, characterized in that the signal train over a single optical fiber array (32) is transmitted that the stationary reference edge of the transmitted signal train is detected, and that the temporally modifiable edges with respect to the stationary reference edge for Recovery of the broadband signals are subjected to a demultiplexing process. 25. The method according to any one of claims 22 to 24, characterized in that that a triangular signal of the predetermined sampling frequency is generated and that the level of the triangular signal with those of the corresponding broadband signals Determination of the positions of the corresponding temporally controllable edges in relation to the stationary reference edge be compared. 26. The method according to any one of claims 22 to 25, characterized in, that for the detection of the stationary reference edge the mean DC voltage level of a pair of complementary output signals to select that output signal that ins Positive runs, be compared. 27. The method according to any one of claims 22 to 26, characterized in that that a phase-locked oscillator (44) is used for the demultiplexing process of the edges that can be controlled over time is held at a predetermined sampling frequency and that 130065/0531 the temporally controllable edges are regenerated with respect to the stationary reference edge. 130065/0531