DE3006535A1 - Telephone exchange meter pulse equipment - has storage for day and time information and count comparisons to output correct tariff pulse periodicity - Google Patents

Abstract

The call timing method compares the summation of pulses in a store with those summated by a counter and upon agreement, forwards a charging pulse to the appropriate accounting equipment. The counter is then restored to zero and starts the next time period summation. Time period, i.e charge rate, changes for different periods of the day and different times of the year are accommodated by the equipment. The equipment comprises a counter (Z in UZ1) to feed timing pulses from a master clock (ZE) to a comparator (Vg) so that the output can be controlled by the store (Sp1) containing the information relating to date and time of day changes for different charging periods. There is also a back up store and counter (Sp2,UZ2). An address signal is sent out from the above control store (Sp1,UZ1) into a switching circuit (Ta1...Tan) which contains as many switches as are tariff changes in the charging structure. The output switched stage (Ta1...Tan) then accesses the correct tariff charging pulse periodicity section from the store (Sp3) containing all the required periodicities.

Description

Circuit arrangement for generating time clocks

The invention relates to a circuit arrangement for generating Time clocks, in particular for time counting in telephone switching systems, whereby which differ in their period duration within each tariff area Time cycles by comparing the content of the numerical with the number of Time clocks matching memory locations of a memory arrangement, in each of which the number of control clock pulses corresponding to a period is stored, with the status of a counter acted upon by the control clock in the way it can be deduced that if the status of the counter matches the The number stored in the corresponding memory location causes the transmission of a clock pulse caused and the counter is reset to zero, and during a time-dependent period of a day or an annual period a day-dependent changeover to certain, respectively, relating to a given day clocks assigned to the tariff area must be provided.

It is known to record the charges for a long distance connection to use time-dependent counting in telephone networks. Do this during of the call will transmit counting pulses with a counting pulse frequency that is determined by the Location of the interconnected call stations in the telephone network is dependent. To the determination of the required time cycle are followed by a counting pulse generator a successfully established connection counting pulses are applied to the line, the then processed by a corresponding registration device. Within one Each of the tariff areas envisaged as a whole are given these time intervals Changeover times changed during a day period. Such a tariff change can, for example, also be provided for certain days within an annual period be. For example, a time cycle can apply on Sundays and public holidays; the one particularly reduced tariff.

A in the telephone exchange is used to generate the individual clocks as a central facility of the existing clock. For the tariff changes to be made must this time clock at the specified ZeiMpunktz or at the beginning of the specified Days a corresponding changeover signal can be supplied. This is done through a control device preprogrammed accordingly with regard to these switching times.

If time-dependent counting is also introduced for local connections, this counting is to be initiated at the start of the conversation and it is during the conversation the counting pulses to the subscriber-specific existing ones with a fixed time cycle Transfer counter. For this time-dependent counting of calls in local networks different time cycles can also be provided.

These must be available in the respective exchange. These can, for example, from a clock generator via a corresponding distribution system are made available, in which case the effective feed is provided by an in the exchange in a suitable manner arranged counting add-on can be made can.

In order to be flexible with regard to changes in the timing, an electronic Time clock known in which the individual time clocks made available through multiplicative linking of so-called basic clocks more appropriate Gates are won. With such a clock that is not a decadic Graduating of the time intervals is possible, are appropriate changes in the event of a tariff change to be carried out in the multiplicative links.

An arrangement for generating time clocks is also known, in which there is a first storage arrangement, in which in each storage location the number of those pulses is stored that corresponds to the duration of the period of a clock is equivalent to. The number of storage locations corresponds to the number of required ones Clocks match. The number of pulses is stored in a second memory whose total period is equal to the duration of a clock pulse. Each memory location of the first-mentioned memory arrangement is one of a control clock Affected counter assigned. Be through a comparison device the counter readings with the content of the corresponding memory locations, as well as compared with the content of the memory specifying the duration of a clock pulse. In the event of a match, the transmission of a clock pulse is referred to this memory ended and the count of the individual counting device each with a predetermined Cycle time increased by the value one. If the counter reading agrees with the The numerical value stored in the respectively allocated memory location then becomes a further Clock pulse derived from the relevant clock cycle.

The clock frequency of the time clocks provided is therefore through the selected cycle time is also determined.

The planned time-controlled tariff switching device is with regard to independent of their internal control processes and the necessary clock supply of the arrangement for generating the time clocks. This in turn requires a additional circuit effort.

It is the object of the invention to provide a system-independent and interface-neutral To create arrangement for generating clocks, in particular with regard to on the necessary tariff switching, the switching effort and the required Space requirement is extremely small.

In an arrangement of the type mentioned at the beginning, this is achieved by that the changeover times defining the change in the decisive time cycle likewise by the content of the memory locations of at least one further memory arrangement are determined that due to the correspondence of the clock-wise read out contents with the status of a current time or the current days Counting device automatically sends an addressing signal for the relevant and through the changeover times of the first-mentioned storage space assigned to a specific period of time Memory arrangement derived and thus the release made by the comparison made of the time cycle stipulated therein, that all for the tariff-related Switchovers, the derivation of the time cycles and the necessary internal control processes used control clocks exclusively from one for the respective units clock base unit that is jointly present in an immediate spatial combination can be obtained in the required reduction.

The necessary tariff switching device and the actual clock generation unit thus form a module that simultaneously uses the common clock supply both of which are operated. To generate the switchover signals and the timing pulse, the same principle of operation is applied. At a Modification the switchover times or the time cycles then only have to be the relevant stored numerical value can be changed. Through the application a common clock base unit, the execution of which is of the required accuracy for the clock period and the tariff change is dependent, there is a reduction the circuit complexity and thus the costs, and at the same time the susceptibility to failure reduced.

A further development of the invention consists in that each memory arrangement a building block of the same type produced using integrated technology, which contains a comparator and a counter is assigned, and that of each a stored content of the memory locations that requires output information a corresponding addressing is offered to the comparator and if they match with the reading of the counter set by a corresponding clock, the delivery a switchover information or a clock information is effected. It can thus a commercially available integrated module for the various tasks be used.

According to another development, to implement the counting, A microcomputer uses comparison and control functions.

The invention is now based on the embodiment shown in the figure explained in more detail.

The figure shows the block diagram of an arrangement for generating of clocks. By means of a time-controlled tariff switching device that turns off the memory arrangement Spl and the module UZ1 or the memory arrangement Sp2 and the module UZ2, it can be arranged that one of a given Number of time clocks is activated. Such an arrangement is for example as a clock for a time-dependent counting of calls to be used in local networks. In such a case, a corresponding clock distribution system the respective time clock that in the exchange arranged counting add-on are offered. Such a counting addition can then the functional sequence required for time-dependent counting can be controlled.

The clock generator shown in the figure as a block diagram can also extended accordingly for use for time pulse counting in remote connections will. For this purpose, the actual clock generation unit is in accordance with to be provided several times in accordance with the number of specified zones.

Those times of the day at which a tariff changeover is carried out are to be, for example, in the storage locations tal to tan of the storage arrangement Sp1 stored as binary coded information. In memory locations f1 to fn Storage arrangement Sp2 stores those days of the year on which a particularly reduced tariff, the so-called public holiday tariff, is to apply. In this The memory therefore contains the annual program for the holiday changeover. These Memory arrangements of the switching device can be used in the same way as in their function yet to be explained memory arrangement Sp3 either as manual or be designed electrically programmable memory.

Each of these memory arrangements is one of several similar Counter / clock modules assigned to UZ. Such a commercially available integrated Each block contains a comparator Vg and a counter Z, the count of which is fed to this comparator in the coding required in each case. The counter Z of the module UZ1 receives from a highly constant clock base unit ZE, which both for the tariff switching device as well as for the actual clock unit as common clock supply is provided, via a suitable divider unit U7 Incremental cycle. Due to this incremental cycle, this counter is used during of a daily routine, the respective time is registered and the comparator Vg des Module UZ1 offered. The counter counts the hours and in a known way Minutes during each period of the day.

When the clock is at midnight or at 0 o'clock, an impulse is emitted, the is fed as a carry pulse to the counter Z of the module UZ2. Through this Counters are used to register the days of a year ~. The respective daily count will be supplied to the comparator Vg contained in the module. The one after every daily routine emitted pulse influences a trigger stage F in such a way that with the trailing edge this impulses this tipping stage in the cases in which it is in the set state is reset. This mode of action is intended by the input circuit E can be achieved.

The tariff changeover times stored in the memory arrangement Sp1 are now stored in the same way as those stored in memory arrangement Sp2 faster follow the comparator contained in the respective grounded block UZ is offered for comparison. For this purpose, the individual Memory locations addressed in a specified cycle. The content of each addressed Storage space is then allocated via the data linesD1 or via the data lineD2in the corresponding coding is supplied to the respective own comparator Vg. In the memory array Spl are in the storage locations valley to tan during normal daytime operation provided n switching times, at which a change in the so-called called Timing is provided, stored. Is used by the in the assigned block UZ1 existing comparator found that the corresponding addressing transferred content of a storage location with the dle Thrzeit registered status of the Counter Z matches, an output signal is produced. This output signal arrives to the respective clock input of each of the trigger stages TA1 to TAn. The number of these Tilt levels corresponds to the number of daily tariff switching times. The control cycle for the scanner is supplied by the clock base unit ZE, whereby for the reduction the integrated divider module U2 is provided for the required clock frequency can be. The addressing signals issued by the scanner for the individual memory locations influence the flip-flops TA via the decoding device De. It arises namely simultaneously with the addressing of the individual memory locations Tal to Tan at the outputs of the decoding device DE assigned to these memory locations a preparation signal for the respective multivibrator. It is only the one Flip-flop TA switched to the active state opposite to its idle state, in the case of both this control signal and that from the comparison device VG of module UZ1 is present. So it becomes with each reaching of the switching time preprogrammed by the memory content the relevant Tilt stage set. The output signal of the respective Flipper now influences a memory arrangement Sp3 in such a way that the content of an assigned memory location Tf during the duration of the respective active state the comparison device VG of the module UZ3 is offered.

As already mentioned, only one of the flip-flops TA is set in each case. The other flip-flops are reset or they remain reset, since the Appear of the output signal of the module UZ1 with the associated outputs of the decoder De connected preparation inputs are signal-free.

The comparison contained in the clock counter module UZ2 delivers an output signal whenever the value specified by the counter reading and in current holiday written in a memory location of the memory arrangement Sp2 is addressed. This signal emitted when the relevant holiday is reached sets the assigned flip-flop F to the active state. By the corresponding output signal is achieved in the same way as by the output signals of the flip-flops TA, that the content of an allocated memory location of the memory arrangement Sp3 over the corresponding data lines D3 are offered to the comparator of the UZ3 module will. The content of the corresponding memory location TfF makes the special Holiday tariff marked.

The output signal of the flip-flop F is sent to the reset inputs R1 to Rn of the flip-flops TA1 to TAn that store the respective tariff states. This prevents a changeover to one during a public holiday other tariff is made. With the trailing edge of the counter Z of the block UZ1 given transfer impulse with the beginning of the next day becomes the holiday tariff signaling flip-flop F is reset again. It remains in this state until the counter reading corresponds to the next stored value.

In the memory locations Tf1 to Tfn of the memory arrangement Sp3 those clock sequences are stored which are used during normal daytime operation determine the necessary time cycles. The storage space TfF is used during a The decisive time interval is determined on the public holiday.

For this purpose, there is a suitable coding in the memory locations mentioned the number of pulses of a given Control cycle saved, which corresponds in its entire duration to the period duration of the respective time cycle. By the output signal of one of the set trigger stages TA1 to TAn or the trigger stage F causes the content of the memory location allocated to it, e.g. the content from Tf1, constantly to the comparator during the period provided for this tariff VG of the module UZ3 is offered. This compares the relevant numerical value with the status of the counter Z. This counter receives the control clock from the Clock base unit ZE supplied via a suitable divider circuit U3. Depending on the The desired length of the clock period and the density of the clock spectrum can depend on this Clock base unit a suitable control clock can be obtained. The one fed to the meter The control clock can be, for example, a clock period of 10 milliseconds or 100 Have milliseconds. If the stored number is the same, the latter results in the control cycle then a correspondingly longer clock period.

Does the counter reading resulting from the control cycle agree? corresponds to the effectively offered content of the storage space concerned, so will emitted an output signal from the comparator Vg contained in the module UZ3. This output signal always arises when the memory content defined period is counted. With every output pulse of the comparator the counter is reset to zero. With the pulse shaper stage I, the for example, it can be a monostable multivibrator, and the downstream one Amplifier stage Vwud because a4F generated pulse at a usable clock pulse processed. At the output TZ the specified by the tariff switching device can thus be used Time cycle with the impulse length specified for the individual impulses. When the next tariff changeover time is reached, in the a different flip-flop set and the previously activated one Flip-flop reset.

The UZ3 offered a different cycle time, so that a correspondingly changed at output TZ Timing sequence arises.

3 claims 1 figure L e r s e i t e

Claims (3)

Claims 1. Circuit arrangement for generating time clocks, especially for time counting in telephone exchanges, whereby the time cycles that differ in their period duration within each tariff area by comparing the content of the numerical with the number of clocks matching memory locations of a memory arrangement, in each of which the number the control clock pulses corresponding to a period is stored with the Status of a counting device acted upon by the control clock can be derived in this way are that if the status of the counter coincides with that in the corresponding Number stored in memory causes the transmission of a clock pulse and the counter is reset to the value zero and during a time-dependent period of a day or an annual period a day-dependent switchover to specific days concerning a given day Time cycles assigned to the tariff area must be provided so that no one is able to -z e i c h n e t that the changeover times defining the change in the decisive time cycle likewise by the content of the memory locations of at least one further memory arrangement (Spl / Sp2) are determined that due to the correspondence of the clockwise read out Content with the status of the current time or the current days indicating counter (Z in UZ1 or UZ2) automatically an addressing signal for assigned to the time span in question and determined by the switching times Storage space (Tfl to Tfn, TfF) derived from the first-mentioned storage arrangement (Sp3) and thus through the comparison made, the release of the specified therein Time cycle is made possible that all for the tariff-related switchovers, the derivation of the time cycles and the necessary inter- control processes used control clocks exclusively from one for the respective units clock base unit that is jointly present in an immediate spatial combination (ZE) in the required reduction ratio (U1 to U3). 2. Circuit arrangement according to claim 1, d a d u r c h g e k e n n z e i c h n e t that each memory arrangement (Sp1 to Sp3) one with the other similar module (UZ) manufactured using integrated technology that has a comparator (Vg) and a counter (Z) is assigned that each has an output information item Conditional stored content of the memory locations via appropriate addressing (Sc) is offered to the comparator, and if it matches the status of the by a corresponding clock set counter the delivery of a switchover information or a clock information is effected. 3. Circuit arrangement according to claim 1 and 2, d a -d u r c h g e k E n n z e i n e t that for the implementation of the counting, comparison and control functions a microcomputer is used.