DE2965381D1 - Input/output-system for a data processing system - Google Patents
Input/output-system for a data processing systemInfo
- Publication number
- DE2965381D1 DE2965381D1 DE7979103601T DE2965381T DE2965381D1 DE 2965381 D1 DE2965381 D1 DE 2965381D1 DE 7979103601 T DE7979103601 T DE 7979103601T DE 2965381 T DE2965381 T DE 2965381T DE 2965381 D1 DE2965381 D1 DE 2965381D1
- Authority
- DE
- Germany
- Prior art keywords
- input
- output
- data processing
- processing system
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
- G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
- Debugging And Monitoring (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/954,070 US4224667A (en) | 1978-10-23 | 1978-10-23 | Command queuing for I/O adapters |
Publications (1)
Publication Number | Publication Date |
---|---|
DE2965381D1 true DE2965381D1 (en) | 1983-06-16 |
Family
ID=25494892
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE7979103601T Expired DE2965381D1 (en) | 1978-10-23 | 1979-09-24 | Input/output-system for a data processing system |
Country Status (8)
Country | Link |
---|---|
US (1) | US4224667A (de) |
EP (1) | EP0010187B1 (de) |
JP (1) | JPS5559528A (de) |
AU (1) | AU527907B2 (de) |
BR (1) | BR7906843A (de) |
CA (1) | CA1119308A (de) |
DE (1) | DE2965381D1 (de) |
ES (1) | ES485246A1 (de) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4445176A (en) * | 1979-12-28 | 1984-04-24 | International Business Machines Corporation | Block transfers of information in data processing networks |
US4546430A (en) * | 1983-07-13 | 1985-10-08 | Sperry Corporation | Control unit busy queuing |
GB2162709A (en) * | 1984-06-22 | 1986-02-05 | Hitachi Ltd | A magnetic bubble memory |
JPH0644251B2 (ja) * | 1986-08-28 | 1994-06-08 | 日本電気株式会社 | デ−タ処理装置 |
US4837738A (en) * | 1986-11-05 | 1989-06-06 | Honeywell Information Systems Inc. | Address boundary detector |
US5155812A (en) * | 1989-05-04 | 1992-10-13 | Texas Instruments Incorporated | Devices and method for generating and using systems, software waitstates on address boundaries in data processing |
US5065313A (en) * | 1989-03-30 | 1991-11-12 | Dell Usa Corporation | Digital computer system having circuit for regulation of I/O command recovery time |
US6253307B1 (en) | 1989-05-04 | 2001-06-26 | Texas Instruments Incorporated | Data processing device with mask and status bits for selecting a set of status conditions |
US5386560A (en) * | 1991-05-23 | 1995-01-31 | International Business Machines Corporation | Execution of page data transfer by PT processors and issuing of split start and test instructions by CPUs coordinated by queued tokens |
US5548791A (en) * | 1994-07-25 | 1996-08-20 | International Business Machines Corporation | Input/output control system with plural channel paths to I/O devices |
US5822611A (en) * | 1995-06-05 | 1998-10-13 | Donley; Greggory D. | Method for cycle request with quick termination without waiting for the cycle to reach the destination by storing information in queue |
JP4086345B2 (ja) * | 1997-09-09 | 2008-05-14 | キヤノン株式会社 | 通信制御方法及び装置及び通信システム |
US10310923B1 (en) | 2014-08-28 | 2019-06-04 | Seagate Technology Llc | Probabilistic aging command sorting |
US10831403B2 (en) | 2017-05-19 | 2020-11-10 | Seagate Technology Llc | Probabalistic command aging and selection |
CN108833056B (zh) * | 2018-05-23 | 2021-02-23 | 江苏格澜得智能电气有限公司 | 一种消防两总线优先通信的编码方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3514758A (en) * | 1967-03-27 | 1970-05-26 | Burroughs Corp | Digital computer system having multi-line control unit |
US3566358A (en) * | 1968-03-19 | 1971-02-23 | Bevier Hasbrouck | Integrated multi-computer system |
US3623006A (en) * | 1970-06-29 | 1971-11-23 | Burroughs Corp | Queueing device for the selection of requests for access to a storage medium |
US3688274A (en) * | 1970-12-23 | 1972-08-29 | Ibm | Command retry control by peripheral devices |
US3725864A (en) * | 1971-03-03 | 1973-04-03 | Ibm | Input/output control |
JPS4938530A (de) * | 1972-06-30 | 1974-04-10 | ||
DE2237576C3 (de) * | 1972-07-31 | 1980-10-30 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren und Anordnung zur Übertragung von Informationen zwischen peripheren Geraten und dem Arbeitsspeicher einer Zentraleinheit über einen Blockmultiplexkanal |
US3961312A (en) * | 1974-07-15 | 1976-06-01 | International Business Machines Corporation | Cycle interleaving during burst mode operation |
US3993981A (en) * | 1975-06-30 | 1976-11-23 | Honeywell Information Systems, Inc. | Apparatus for processing data transfer requests in a data processing system |
-
1978
- 1978-10-23 US US05/954,070 patent/US4224667A/en not_active Expired - Lifetime
-
1979
- 1979-09-04 CA CA000334988A patent/CA1119308A/en not_active Expired
- 1979-09-04 AU AU50559/79A patent/AU527907B2/en not_active Ceased
- 1979-09-24 EP EP79103601A patent/EP0010187B1/de not_active Expired
- 1979-09-24 DE DE7979103601T patent/DE2965381D1/de not_active Expired
- 1979-10-19 JP JP13430679A patent/JPS5559528A/ja active Granted
- 1979-10-22 ES ES485246A patent/ES485246A1/es not_active Expired
- 1979-10-23 BR BR7906843A patent/BR7906843A/pt not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
CA1119308A (en) | 1982-03-02 |
EP0010187B1 (de) | 1983-05-11 |
US4224667A (en) | 1980-09-23 |
ES485246A1 (es) | 1980-05-16 |
EP0010187A1 (de) | 1980-04-30 |
AU527907B2 (en) | 1983-03-31 |
JPS5732364B2 (de) | 1982-07-10 |
BR7906843A (pt) | 1980-09-16 |
JPS5559528A (en) | 1980-05-06 |
AU5055979A (en) | 1980-05-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8339 | Ceased/non-payment of the annual fee |