DE2919508A1 - Data input system keyboard - using coded input generated for opto-electronic keys with checking circuit to test code validity - Google Patents

Abstract

The keyboard data input is provided by keys that individually generate a code output. A checking circuit tests the output code validity. The key consists of a coded bar moved to interrupt the output of light emitting diodes (8). Receiver stages (16) are switched by the light beam and pulse shaping stages (11) output signals to the checking station. The generated code signals are transmitted to the test stage (12) where a test is made to determine how many bits are received and whether or not the code is valid. The coded signals are entered in a buffer store (18) before transmitting to output.

Description

The invention relates to a method for entering data

in the preamble of claim 1 specified type and an arrangement to carry out the procedure.

So-called optical keyboards are known in which between a light source and light receivers in the beam paths that can be actuated by buttons Coding members are arranged (DE-AS 26 50 308). When a key is pressed, this becomes associated coding member briefly moved through the beam paths, whereby the individual Light receiver covered according to the key code represented by the coding member or not covered (L or O bits). The bits of each key code occur thus on the receivers in parallel.

With such keyboards special measures have to be taken to prevent them the incorrect entry of information by pressing more than one key at the same time be seized. Mechanical key locks are known for this, but they have a Require considerable mechanical effort and the fluid and easy-to-use key actuation hinder.

Another known measure (DE-AS 24 03 160) provides, in addition in addition to the light channels required for the key code, three additional channels for To arrange check bits. The check bits indicate those contained in the respective key code O places and are used together with the bits of the key code in a test computer which checks the validity of the code. More when pressed at the same time as a key, the number of O positions indicated by the check bits matches the O digits of the code do not match and the code is recognized as invalid.

Although this solution eliminates the disadvantages of mechanical key locks, but it takes an increased circuit complexity for the additional optical channels in purchase. In addition, to ensure a reliable Signaling and evaluation, especially the opto-electronic components, closely tolerated such a keyboard is expensive to manufacture.

The invention is based on the object of the optical keyboards to simplify the type specified in the preamble of claim 1 and thus the Cheaper keyboards with at least the same level of reliability.

This object is achieved according to the invention by the in claim 1 specified features solved.

The advantages of the invention are in particular that despite There is no need for additional channels for test bits or mechanical key locks Incorrect entry of information by pressing several keys at the same time is excluded is.

Opto-electronic components with a large tolerance range can be used for this used, as well as the coding elements of the keyboard and the accuracy their movements do not need to be closely tolerated. The inventive The keyboard is therefore considerably simpler and cheaper than the state of the art.

An embodiment of the invention is shown in the drawings and is explained in more detail below. The figures show: FIG. 1 a schematic representation of a key element Representation, FIG. 2 a block diagram, FIG. 3 a curve representation and FIG 4 is a flow chart.

On the basis of Figure 1 so 1.1 for a better understanding of the mode of operation the keyboard of one of the key elements 1 are explained in block 5 of the figure 2 are arranged side by side. The key element 1 has a bar 2 which is provided with openings 6 in a number corresponding to the light channels 14 and in front of a suddenly displaceable by an actuating element not shown in detail Coding member 3 is arranged. The coding member 3 has individual tabs 4, whose Number and distribution correspond to the code assigned to the respective key and of which the associated openings during a jump movement of the coding element 3 6 are covered for a short time. In this way the signal bits of the key code in parallel through darkened and non-darkened beam paths the key element 1 is generated.

In FIG. 2 there is a large number of such key elements in the key block 5 1 arranged side by side. On one side of the keypad 5 is located the radiation source 7, a light source 8, z. B. a light emitting diode. On the opposite side of the keypad 5 is a receiver 16, which for each beam path 14 z. B. a phototransistor 9 has, arranged.

A pulse generator 13 having controller 10, the z. Am is formed in a known manner by a microprocessor, causes that the radiation source 7 via a switching element 15, shown symbolically as a switching contact, in pulse mode is controlled.

As a result, the light sources point towards static control 8 of the radiation source 7, depending on the pulse ratio, the 5 to 10 times output power on. The phototransistors 9 on the other side of the keypad 5 can therefore work reliably within a wide tolerance range.

If a button is pressed, the associated, darkened and not darkened beam paths 14 generated existing key code, so arrives it with all its (in example 8) places in parallel to the receiver 16 and will there converted into electrical signals (first-valued signals, e.g. L-bits, -and Second order signals, e.g. B. O bits). About a pulse shaper 11 is the Key code applied to the controller 10, the mode of operation in this example should be clock-controlled, so that the further treatment of the key code according to the clocking takes place.

For the coding of the key elements- 1> so the arrangement of the Lobe 4 on the coding elements 3, a coding is chosen in which each Coding member 3 can assign the same number of tabs 4. Each key code has thus the same number of L bits, but with a different distribution. Using from Z. B. eight beam paths 14 and four lobes 4 on the coding members 3 each Key element 1 can be seventy different key codes in this way generate what roughly corresponds to the needs of an electric typewriter.

The controller 10 includes, among other things, a circuit arrangement 12 to check the bit pattern supplied by the receiver 16, whether the number of L bits (Signals of first order) it is correct whether the bit pattern is too many or too few Has L bits. It also includes a buffer 18 in which a can be stored by the test circuit 12 as a correctly recognized key code. she has a memory cell 17 into which, depending on the test result, the Test circuit 12 and one of three of the previous contents of memory cell 17 possible identification codes (e.g. binary 00, OL, LO) can be stored, and they contains a keyboard memory 19, in the key codes from the Cache 18 can be transferred for further use by the device.

Before the function of the described circuit structure is explained, will first be described with reference to FIG. 3, the creation of a key code. As explained at the beginning, a coding element 3 is activated suddenly by pressing a key moved through the beam paths 14, whereby individual of the beam paths, the key code accordingly, be darkened. Due to the large tolerances of the coding elements 3 and their sequence of movements and the sensitivity of the phototransistors 9 in the Receivers 16 are not all of the four to be darkened beam paths 14 of the key code darkened at the same time. The receiver 16 is so z. B. first one, then two, then three and finally four darkened beam paths 14 after a time t1 to register.

During the time t2 the four beam paths remain dark, and during t3 they are released again one after the other. (The times t1, t2 and t3 are at each key has a different size.) With two or more at the same time or almost Simultaneously operated buttons would indeed darken more than four beam paths before recognizing this larger number would also be a temporary one State can be recognized with four darkened beam paths. The criterion for Recognition of a correct key code is therefore the occurrence of a lower number darkened beam paths, after only four - and also not immediately before that more - darkened beam paths had been recognized. Only then is a key code allowed can be released for further processing without the risk of incorrect entries by pressing two buttons at the same time.

In the case of a clock-controlled controller 10 or test circuit 12, this must the clock frequency be so high that in the time t2 with safety at least one query and test cycle falls. A pulsed control of the Radiation source 7 then expediently takes place with the same clock spacing, with a time offset between the activation of the radiation source 7 and the query the receiver 16 is provided according to the response delay of the components have to be.

The function of the circuit structure of FIG. 2 will be described below explained with reference to the simplified flow chart of FIG. By switching on the device starts the process, d. H. from the controller 10; becomes the registered of the first identification code = "O" (binary 00) into the memory cell 17. Pressing a key causes the jump movement of the associated coding element 3, as a result of which the photodiodes 8, which are energized in terms of pulses, emanate beam paths 14 rated as darkened in the manner described. After the response delay Due to the time delay caused by the phototransistors 9 of the receiver 16 i applied to the test circuit 12 and converted bit patterns to electrical signals queried according to the cycle of the controller 10.

As a rule, the number of L bits (darkened beam paths) still be too small (<4 for an eight-bit key code, correctly must always contain four L bits), whereupon a query for the content of the memory cell 17 takes place. Since its content is full, there is a return to the beginning of the Process.

After the time t1 has elapsed, four beam paths 14 are darkened and the bit pattern has four L bits (time t2). It thus represents the key code of the pressed key. In the test circuit 12, the query 11L number '<4? :: no, "L number = 4?" against it affirmed; is still in the memory cell 17 the identification code 0. The controller 10 initiates due to of these query results the writing of the second identification code = 8! (binary QL) in memory cell 17, and the key code is in the buffer 18 taken over.

If the next interrogation cycle also falls within time t2, this indicates If the bit pattern still has four L bits, there is a return to the beginning of the sequence carried out without a further function taking place because in the memory cell 17 the second identification code is "1".

After the time t2 has elapsed, there are again fewer than four beam paths darkened, but the memory cell still contains the second identification code 1 (right branch of the flow chart).

That which is now to be assessed as being correct and which is in the buffer 18 Bit pattern is therefore - z. B. by an enable signal on line 20 - as a key code released for further processing and enters the keyboard memory 19, from which it can be removed from the device as required. In the memory cell 17 is then the first identification code "O" is written in again, and there is a return to the beginning of the process.

If, on the other hand, two or more buttons are used at the same time due to incorrect operation or has been actuated almost simultaneously, so are during the movement of the coding elements 3 initially also registered four L bits, whereupon this bit pattern is described in Way is stored in the buffer 18. As a result, however, more than four beam paths darkened and from the test circuit 12 more than four L bits recognized in the bit pattern (middle branch of the flowchart). In this case it will a third identification code = 2 (binary LO) is stored in the memory cell 17 and again a return without further functions carried out. The temporarily stored wrong bit pattern is not released for further processing. In the further course will be. then again four L bits recognized by the test circuit 12, which, since the memory cell 17 contains the identification code 2, to return to lead to the beginning (query "<memory cell> 1?" in the left branch of the flowchart) and then less than four L bits. The memory cell 17 still contains the Identification code "2" (query "IIQ memory cell> 6 1?" In the right branch of the Flowchart), and the controller again uses the first identification code ~ 0 "loaded.

This incorrect operation therefore does not result in a wrong bit pattern as a key code for further processing; it could even e.g. B, from the content 2 of the Memory cell 17, an error signal for the operator of the device can be derived.

After the erroneous bit pattern has been eliminated, the following Key actuation of the (faulty) content of the buffer 18 by the new one Overwrite bit pattern

Claims (8)

Method and arrangement for entering data Claims: 1. Method for entering data into a data processing device by means of a keyboard, the keys cause a movement of coding elements when pressed, whereby of beam paths emanating from a radiation source to a beam path common to all keys Receivers are allowed through and a multi-digit parallel bit pattern of signals first and second valence form, g e k e n n -z e i c h n e t d u r c h use a coding that has a key code with the same number of signals for each key First value and through the following process steps a) Examination of the Number of signals of the first order of each bit pattern occurring at the receiver (16), b) Intermediate storage of a bit pattern as a key code if it is the correct number of signals of first significance, c) enabling the temporarily stored key code for further processing, if after one or more correct bit patterns a bit pattern occurs with a lower number of signals of the first order at the receiver (16), however d) not releasing the temporarily stored key code for further processing, if a bit pattern with a larger number of first-order signals at the receiver (16) occurs. @ Arrangement for performing the method according to claim 1 d a d u r c h g e k.e n n z e i c h n e t that through the Keys actuable Codiergli-eder (3), of which key codes with the same number of signals are the first Valence can be generated, and a buffer (18) for receiving key codes are provided and that a circuit arrangement (12) for testing the receiver (16) received bit pattern and detection of a correct, too small or too large a number of first-order signals and to control the takeover of the bit pattern as a key code in the buffer (18) if the number is correct, the release of a key code stored in the buffer (18) for further processing if the number is too low, the correct bit pattern is used and if the number is too large, it is not released Number is provided. 3. Arrangement according to claim 2, d a d u r c h g e k e n n -z e i c h n e t that the circuit arrangement (12) has a memory cell (17) into which a first, a second or a third identification code can be stored and that the recognition of a bit pattern with the correct number of signals of the first order when the first identification code is stored in the memory cell (17) of the second identification code and transfer of the bit pattern to the buffer (18) and in the case of the second or third identification code contained in the memory cell (17) Failure to observe the bit pattern causes the detection of a bit pattern with a lower Number of signals of the first significance with the first contained in the memory cell (17) or third identification code, storage of the first identification code and in the case of the second identification code contained in the memory cell (17), the release of the Temporary storage content for further processing and storage of the first Identification codes causes and the recognition of a bit pattern with larger number of signals of the first significance storage of the third identification code causes. 4. Arrangement according to claim 2 or 3, d a d u r c h g e -k e n n z E i c h n e t that a keyboard memory (19) is provided in which a key code can be transferred from the buffer (18) for further processing when released. 5. Arrangement according to claim 2, 3 or 4, d a d u r c h g e k e n n z e i c h n e t that a pulse-controlled radiation source (7) is provided is. 6. Arrangement according to one of claims 2 to 5, d a d u r c h g e k e n n z e i c h n e t that a clock-controlled circuit arrangement (12, 17) for Check of the bit pattern received by the receiver and result-dependent control of the signal flow is provided. 7. Arrangement according to one of claims 2 to 6, d a d u r c h g e k It is noted that the radiation source (7) for each position of the bit pattern has a light emitting diode (8). 8. Arrangement according to one of claims 2 to 7, d a d u r c h g e k It shows that as a receiver (16) for each digit of the bit pattern Phototransistor (9) is provided.