DE2851822C2 - Method for error assessment in the case of signals stored in spiral tracks on rotating information carriers and circuit arrangement for carrying out the method - Google Patents

Description

Procedure for evaluating defects in information media stored on rotating information carriers in spiral tracks Signals and circuitry for carrying out the method.

The invention relates to a method for error assessment according to the preamble of the patent Proverb 1 and a circuit arrangement for performing this method.

When duplicating rotating signal memories designed in the form of plates or foils Storage in spiral tracks can be different, e.g. B. errors caused by stored dust, scratches, s'chranimen, stains and the like Playback as a disturbance - for sound recordings e.g. B.

as crackers and the like, in image recordings as disruptions in the reproduced picture - make noticeable. For the monitoring of manufacturing processes of this type It is of some value in signal memory to know whether an error, no matter how small, occurs only once or repeats itself in the next turn of the signal memory in the adjacent track and possibly in a similar way

Through the literature DE-PS 1149 920 and 14 47 991 it is known, for example, how such signal interference in the form of a single pulse sequence (error signal) when such an information carrier is scanned can be selected from the scanned total information.

The present invention is based on the object of specifying a solution for how, in information carriers of the aforementioned type, the accumulation of Errors can be assessed according to individual errors and scratches.

According to the invention, this object is achieved by the method as characterized in claim 1. Furthermore, this object is also achieved by Circuit arrangements for carrying out the method according to claim 1 solved as they are in the Claims 2 to 5 are specified.

In the following the invention is explained in more detail with reference to an exemplary embodiment shown in the drawing. It shows

F i g. 1 shows a basic circuit constructed according to the invention for sorting errors in rotating information carriers,

FIG. 2 a pulse telegram for the circuit according to FIG. 2.

To understand the method described below, a rotating information carrier is assumed, on which the information is or is recorded in spiral tracks, between which there is a more or less wide gap (lawn). This recording medium is disturbed by spatially limited errors which are electronically determined in a known manner and fed to the input of this device as a pulse-shaped error signal Fs. These errors can now be sorted based on their repetition:

a) An error that occurs once is referred to as an individual error

b) An error that occurs only in two consecutive Traces appear is also an individual fault that lies on the "lawn"; he should be on his second Occurrence cannot be registered again.

c) An error that occurs over several consecutive tracks at the same point is a "Scratch".

The method is explained in more detail below with reference to the basic circuit diagram of FIG. 1. The electronic Error signal Fs is written into a first shift register SÄ 1 with a length of exactly one cycle. This register is clocked by a rigid the drive shaft of the information carrier attached pulse generator 1, which generates a few pulses per revolution (up to several hundred) gives

The shift register must have a corresponding number of places. The error signal appears at the output of SÄ 1 with a delay of exactly one cycle and with the input signal in an AND element 5 becomes an output signal »single error« according to the criterion

linked by a and b An AND element 6 between the input and output of SR 1 supplies an output signal "Scratch" A, which already corresponds to criterion c , but also supplies an output signal in the event of individual errors on the "lawn" Shift register SR 2 can be added again with the length of a cycle, the output of which, linked with the input and output of SR 1, supplies the output signal "Scratch" B , in which individual errors on the "lawn" no longer appear, but which only after two Revolutions supplies an error signal. For registration purposes, a third shift register SR 3 can be added to the registration output »Schramme« B (or to the registration output »Schramme« /. Neglecting the »lawn« error), the output and input of which are linked together (9) only emit an error signal when a scratch occurs, ie a pulse signal corresponding to the number of scratches.

The number of pulses from the pulse generator 1 and thus the number of stages in the shift registers SR 1. SR 2 and SR 3 are measured by considering the extent to which errors that follow one another within one cycle must still be separated and therefore stored in different stages of the shift register. The decision is made on a case-by-case basis. However, the shift registers SR 2 and SR 3 can usually be designed with a reduced number of stages and clocked accordingly with a clock frequency reduced by frequency dividers 2 and 3, since they have to store a "diluted" pulse signal reduced by the individual errors. The division factors m and η can be freely selected on the basis of the individual case.

Those provided in the circuit according to FIG Logical links can be implemented in different ways, for example as follows:

The input and inverted via the inverting stage 4 the output of the shift register SR 1 (length a circulation de ^r information carrier) are the AND gate 5 »for registering output single error" links the further AND gate 6 associated input and output of shift register SR 1 and if necessary, supplies the registration output »Scratch« A with the above restrictions. If these restrictions are to be avoided, the output of the AND element 6 is written into the further shift register SR 2 , possibly clocked lower by the division factor η of the frequency divider 2, with the length of one cycle and with the output signal and the input signal via the AND element 7 linked to the "Schramme" B registration output.

The third shift register SR 3 of one cycle length (possibly with a further reduced number of stages and a clock frequency reduced by the factor w of the frequency divider 3) is connected to the registration output “Schramme” B or the registration output “Schramme” A. The input of this shift register SR 3 and its inverted output 8 are finally linked via the AND element 9, which supplies a pulse signal corresponding to the number of scratches at its registration output. When connected to the registration output "Scratch" A , each "lawn" individual error will also provide an output signal "Scratch number".

FIG. 2 shows various possible errors using the example the associated pulse diagram and its evaluation in a circuit according to FIG. 1. Details of the timing diagram, including the pulse symbols, are shown in FIG. 2 removable

In individual cases, incorrect exit signals can occur occur which, as marked in Fig. 2, occur at the beginning of Spots output a single pulse error each. This incorrect display can usually be neglected in the practical case.

For this purpose 2 sheets of drawings

Claims (5)

Patent claims: 1. Procedure for error assessment in disc-shaped rotating information carriers in Spiral tracks stored signals, thereby characterized in that the errors are based on one revolution of the scanned information carrier in their lateral position in the form of a Error patterns are detected that also the error pattern of successive revolutions of the scanned information carrier on their temporal Matches are compared and, depending on the number of matches, are registered for successive revolutions. 2. Circuit arrangement for carrying out the method according to claim 1, characterized in that the sampled signal is fed to a clock-controlled first shift register (SR 1), the inverted output of which is connected to the first shift register via an AND gate (5) a first registration output (individual error) is linked and that the input and output of the first shift register are linked to a second registration output (scratch A) by a further AND element. 3. Circuit arrangement aach claim 2, characterized in that a clock-controlled second shift register (SR 2) is attached to the registration output (Schramme A) , the output of which is connected to the input and the output of the first Sch «.beregisters (SR 1) via an AND element (7) to a registr; erausge (scratch B) is linked. 4. Circuit arrangement nar ^. Claim 2 or 3, characterized in that the signal at the registration output (Schramme) is fed to a third shift register (SR 3) controlled by a clock, the inverted output of which is linked to its input via an AND element to form a registration output (Schrammen number) so that a counting pulse is only generated for each new scratch that occurs. 5. Circuit arrangement according to one of claims 2 to 4, characterized in that the shift registers (SR 1, SR 2, SR 3) are dimensioned for the same pass line at different frequencies of the controlling clock and that this is the clock for the first Shift register (SR 1) has the highest frequency.