DE2851822A1 - Fault detector for information storage discs - detects faults due to scratches on spiral track of rotating disc, by using shift registers and logic gates - Google Patents

Abstract

The fault detector compares the faulty signal obtained during one complete revolution of the disc with the signal obtained during the preceeding revolution. If the fault repeats itself in the next revolution (or the next two, three etc. revolutions) then a multiple-fault is registered (i.e. a scratch). The disc signal is applied to a first shift register (SR1) whose length is equal to one revolution. The register's inverting output is combined via an AND-gate with the input to produce a fault signal indicating a single fault. A second AND-gate combines input and output to produce a second fault signal indicating several faults.

Description

Method and circuit arrangement for fault detection

on rotating information carriers recorded in SDiral tracks Signals The invention relates to a method for error detection at disc-shaped rotating information carriers recorded in spiral tracks Signals.

When reproducing plates or foils in the form of rotating signal memories with storage in spiral tracks can be different, e.g. from stored dust, scratches, scrapes, stains, etc. caused errors occur, which during playback as a disturbance - # in sound recordings, for example. as crackers and the like, in image recordings as disturbances in the reproduced image - to make noticable. For the monitoring of manufacturing processes such a signal memory it is of some value to know if a bug is and is it still so small, occurs only once or changes with the next revolution of the latch in the adjacent track and possibly further repeated in a similar manner.

The present invention is now based on the object of a method indicate with which such defects are correctly identified and also a distinction between individual defects and spots or

Scratches can be made depending on the length.

This object is achieved according to the invention in that an error signal occurring during a full revolution by comparison with the signal content of previous revolutions is identified in such a way that with a repetition of the error signal in the next following first, second, third revolution one that extends over at least two adjacent signal tracks Scratch and, without a corresponding repetition, a single error is registered will.

Advantageous further developments of the inventive concept result from the features of the subclaims.

In the following the invention is illustrated with reference to one in the drawing Embodiment explained.

1 shows a basic circuit constructed in accordance with the invention for sorting errors in rotating recording media, FIG. 2 shows a pulse diagram for the circuit according to FIG. 1.

To understand the procedure described below, assumed a rotating information carrier on which the information in spiral tracks are recorded or are being recorded, between which one more or there is less wide space (lawn ").

This recording medium is disturbed by spatially limited errors, which are found electronically in some specific way and as a pulse signal to be given to the entrance of this facility. The sorting of these errors can now take place on the basis of their repetition: a) An error that occurs once is called Denotes single faults.

b) An error that only occurs in two consecutive tracks, is also a single fault that lies on the "lawn"; he should be at his second occurrence cannot be registered again.

c) An error that occurs over several consecutive tracks on the occurs at the same point is a ~ scratch.

The method is described below with the aid of the basic circuit diagram in Fig. 1 explained in more detail. The electronic error signal Fs is stored in a shift register SR 1 inscribed with a length of exactly one revolution. This is clocked Register of a rigidly attached to the drive shaft of the information carrier Pulse generator 1 that emits a few pulses (up to several hundred) per revolution.

The shift register must have a corresponding number of places. At the exit from SR1 the error signal appears with a delay of exactly one cycle and with the input signal in a gate 5 becomes an output signal single error " linked according to criteria a and b. A gate 6 between the input and output of SR1 supplies an output signal "Scratch" A, which already corresponds to criterion c, but also provides an output signal in the event of individual errors on the "lawn".

To avoid this, a shift register SR2 can be used again from the Length of a cycle can be added, its output, with the input and output linked by SR1, the output signal "Scratch" B supplies, in which individual error on the ~ lawn "no longer appear, but only after two laps Provides error signal. For registration purposes, you can use the "Schramme" B (or also to the exit "Schramme" A, neglecting the ~ lawn "error) Add another shift register SR3, whose output and input are linked with one another (9) Issue an error signal only when a scratch occurs, i.e. one of the scratch number corresponding pulse signal.

The number of pulses from the pulse generator and thus the number of places in the shift register is measured on the basis of the extent to which errors occur within a cycle in short succession, still separated and therefore in different places of the Shift registers must be saved. The decision is made based on the Individual case.

However, you can usually use the shift registers SR2 and SR3 with Perform a reduced number of places and accordingly with a frequency divider 2 and 3 clock frequency reduced, since they have a reduced by the individual errors, ~ Save diluted "pulse signal have to. The division factors m and n are freely selectable on the basis of the individual case.

The logic operations provided in the circuit according to FIG. 1 can be realized in detail in various ways, for example as follows are: Input and the output of the shift register, which is inverted via the inverting stage 4 SR1 (length one revolution of the information carrier) are via an AND gate 5 to "Single error" output linked. Another AND element 6 links input and Output of shift register SR1 and, if necessary, supplies the output ~ Schramme " A with the above restrictions.

If one wants to avoid these restrictions, the output of Gate 6 into another, possibly by the division factor n of the frequency divider 2 lower clocked shift register SR2 with the length of one cycle and with the output signal and the input signal via an AND gate 7 to one Scratch B output linked.

Another shift register is connected to this output or the "Schramme" A output SR3 of a length (possibly with a further reduced number of places and clock frequency reduced by the factor m of the frequency divider 3). The input of this shift register SR3 and its inverted output 8 are finally Linked via an AND element 9, which has a number of scratches at its output provides the corresponding pulse signal. When connected to the "Schramme" output, A becomes also S Every single "lawn" fault provides an output signal ~ scratch number ".

Fig. 2 shows the example of various possible errors associated pulse diagram and its evaluation in a circuit according to FIG. 1. Details of the timing diagram, including the pulse symbols, are shown in Fig. 2 removable.

In individual cases, incorrect output signals may occur which, as marked in FIG. 2, output a single pulse error at the beginning of each spot. This incorrect display can usually be neglected in the practical case.

7 claims 2 figures

Claims (7)

Patent claims rv method for error detection in disc-shaped, rotating information carriers stored in spiral tracks, d a d u r c h g e k e n n -z e i c h n e t that a occurring during a full revolution Error signal by comparison with the signal content of previous revolutions in the manner is identified that if the error signal is repeated in the next following first, second, third ... rotation of one of me over at least two adjacent signal tracks extending scratch and without a corresponding one Repetition each time a single error is registered. 2. The method of claim 1, d a d u r c h g e -k e n n z e i c h n e t that with a repetition in the next following second, third, fourth ... one revolution that extends over at least three adjacent signal tracks Scratch is registered and individual faults between the tracks that are adjacent Touch traces, be excluded. 3. Circuit arrangement for performing the method according to claim 1 or 2, d u r c h e k e n n -z e i c h n e t that at the signal input a first shift register of the length of one revolution is provided, its inverted The output is linked to the input via an AND element to form a "single error" output is, and that through another AND element input and output to an output "Schramme" are linked. 4. Circuit arrangement according to claim 3, d a d u r c h g e k e n n z e i c h n e t that another shift register from the. length is added to a revolution, the output of which with the Error input and the output of the first shift register via an AN3 element an output ~ Schramme "is linked, the output signal of which does not have any pulses from Contains more individual errors between two information tracks. 5. Circuit arrangement according to claim 3 or 4, d a -d u r c h g e it is not indicated that the output signal "Schramme" is sent to a shift register of the length of one revolution is supplied, the inverted output of which with its Input is linked via an AND element to an output "number of scratches", so that there is only a counting pulse for every new scratch that occurs. 6. Circuit arrangement according to one of claims 3 to 5, d a d u r c h e k e n n n z e i c h n e t that the clock frequency of the shift register is phase-locked is coupled to the rotation of the information carrier. 7. Circuit arrangement according to claim 6, d a d u r c h g e k e n n z e i c h n e t that the second and third shift registers with the same or lower Clock frequency are operated with respect to the first shift register, and that accordingly their number of places is equal to or less than that of the first shift register.