DE2848371A1 - ELECTRONIC DICTIONARY - Google Patents

Description

Applicant: 1. David Lowe

2. Silvano Battimiello

Electronic dictionary

The invention relates to an electronic dictionary that is for a Word of one language gives the corresponding word of another language.

People traveling to foreign countries can generally make themselves comfortable by learning and using a few selected words to clarify. They cannot have a normal conversation in the foreign language. With just a few words you can However, they share their basic wants and needs and exchange common courtesies.

The inventors have now found that electronic help, which could provide stored information quickly, would be very useful in such situations. The task the present invention thus resides in the formation of such a device.

The solution to this problem arises according to the invention with an electronic dictionary which is characterized by a first memory with several addresses, information relating to the words in a first language being stored at each of these addresses, by a second memory also with several Addresses, information relating to the words in a second language being stored at each of these addresses, the words at each address in the second memory corresponding to a translation of the words contained in the first memory into the second language, by means for identifying the address of a selected word in the first memory, by second means for identifying the address of a word in the second memory, which is a translation of the selected word, from the information associated with the address, by means for addressing the second memory

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chers for the purpose of outputting the Information and means for displaying the information from the identified address in the second memory as a word in the second language.

The devices for displaying the words expediently consist of an LED or light-emitting diode or liquid crystal display. It should be noted, however, that the invention does not apply to either of these two special representations of the words from the second language is limited. A cathode ray tube can also be used. The beam is deflected on this so that it Records letters of the words from the first and second language in any size on the screen.

Punctuation marks, such as a question mark, can also be used Enter on the keyboard.

In a typical application, intermediate address registers are used used. The unit can then be used in both directions. Read memory for both the output and the Translation language can then be filled alphabetically.

The invention will now be described further using the example of the embodiment shown in the drawing.

In the drawing is:

Fig. 1 is a perspective view of the dictionary according to the invention ,

Fig. 2 is a block diagram of the electrical circuit of the electronic dictionary shown in Fig. 1 with additional Circuitry for alternative translations of words into the second language and / or a phonetic representation of translated words using characters of the international phonetic alphabet of the alphabet of the first language,

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Fig. 3 is an illustration of the application of a read address memory in order to store in the read only memory of the translation language, the addresses of the equivalents of a word in the first language which is stored at a predetermined address in the read only memory of the source language, and

Figure 4 is a block diagram based on Figure 2 showing how latches (or address) read-only memories enable the dictionary to operate in two directions.

Fig. 1 shows an embodiment of the dictionary according to the invention with a generally low housing 10 with an upstanding section 12. An opening 14 is located in this. The opening 14 encloses the visual display 16. This encloses LEDs or liquid crystals. The number of individual elements contained in the display is indicated by the number determines the characters that a word in the dictionary can contain. In typical use cases, these are twelve characters.

A keyboard is located below the upstanding section 12 with twenty-eight pushbuttons 18 arranged in four rows of seven. Each pushbutton 18 can be pressed individually and is denoted by a sign of the English alphabet. The remaining two pushbuttons 20 and 22 have punctuation marks like period and exclamation mark.

When any of the twenty-eight pushbuttons 18, 20 or 22 are depressed, the respective symbol of this pushbutton will appear in the next free field of the display 16 in the direction from left to right.

With a first delete key 24, labeled CE (delete input) the character entered last is removed from the display and an error is corrected.

After the representation of a word, the corresponding word of the foreign language must be represented. For this purpose, a push button 26 labeled TR or translation is pressed and the corresponding

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The relevant word appears in the display.

Unless the memory does not have a translation for the entered word contains, the circuit automatically generates an indication reflecting this fact. Another push button 28 with the imprint "Cancel" or "Delete" is used to delete the entire display.

Another pushbutton 30 is labeled “Step” or “Level”. When this push button is pressed, several stations in the foreign language memory are queried one after the other and those stored there Words are in turn reproduced in the display 16. The most suitable translation is then selected.

An on / off switch 32 completes the one on the front panel existing tax options.

The device is divided into two parts:

(a) A keyboard for entering characters with circuitry for querying the memories and with a display for displaying the entered and translated information and

(b) a first memory for storing words from a language and a second memory containing the words in the other language.

Part (a) is any of those stored in the memories of part (b) Languages in common, the device is therefore expediently built up from two parts. It consists of a flat housing 10 and a second flat housing 34. This can be attached to the rear of the first housing 10. The housing 34 contains two read memories with the coded words in the two languages. Other similar housings, not shown, can be used instead of the Fit housing 34. Each of these housings contains two read-only memories with the coded words of the two languages.

With a ratio of 1 to 1 between the two tanks and

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with no more than one translation per word, the housing can be connected to the housing 10 in one way or the other so that the first and second languages can be interchanged. You can also reverse the connections the memory also use a switch and thus reverse the function of the two memories.

Two or more memories can also be used for a second language provide. In this case a switch is also provided. With this one or the other memory is selected, so that the translation of an entered word is output in one of the foreign languages.

Fig. 2 shows the basic diagram of a circuit arrangement with which a word of a language is entered via the keyboard and translated into a second language word which is then displayed. The basic scheme is in Fig. 2 in solid lines shown. The keyboard 36 contains the keys 18, 20 and 22 and the control keys 24, 26, 28 and 30. The keyboard 36 includes circuits for converting each character in accordance with a binary coding; and other circuits for converting the binary code of each Characters one after the other in an input register.

The number of bits for the binary coding depends on the number of characters contained in the alphabet of the source language. With English as the source language, the number of bits in the binary coding can be five. This enables the entry of up to five unused coding symbols. (In the embodiment shown in Fig. 1, two such coding symbols are used .)

The input register 38 includes a series input / parallel output device. The total bit capacity is equal to or greater than the product of the total number of bits in the code and the maximum permissible number of characters in a word of the source language. By limiting each word to twelve characters and when used of a five bit code, the input register 38 must have a capacity of sixty bits. In a typical application

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case becomes a standard register with a capacity of sixty-four Bits used.

A first input on line 40 supplies encoded information from the circuitry of keyboard 36 to the register. A clear signal is supplied via a further line 42, and the information contained in the input register after translation turned off. The input register can be queried across the board with a comparison stage 46 via a parallel output line 44 or read.

The operation of the circuit is controlled by a control oscillator or clock 48. This generates a regular pulse train. In a typical application, this has a frequency of 1 MHz. The control oscillator is connected to an over the line 50 supplied start signal is put into operation. The start signal is generated in the circuit belonging to the keyboard 36. That The start signal is transmitted when the translation key 26 is pressed.

When operating the control oscillator 48, the pulses are via a Line 54 is fed to an address register 52. This register is similar to the input register. With one over the line However, it is automatically reset to zero. A clear signal is automatically applied before a start signal, so that the address register is set to zero just before the control oscillator 48 starts operating. Even when you press the Clear key 28 resets the address register to zero.

A register 52 successively counts the pulses coming from the control oscillator. The binary scheme present in the address register is interpreted as an address in a read-only memory 58. This contains sixty-four by sixty-four memory locations. Each memory location is queried with a binary coded two-digit number supplied via the parallel connection 60; and read that corresponds to the coordinates of that location in the 64 by 64 array. The address register 52 thus generates two series of numbers with numbers with six bits each and thus represents all the digits one after the other in the 64 by 64 arrangement.

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The source language reading register contains the source language words. Eight standard read registers, each with eight chips, each with 4,096 storage locations, would have 4,096 words with no more than ever record twelve characters. For English, this is considered appropriate.

The comparison stage 46 compares the during the interrogation cycle Information originating from the input register with the information supplied via the line 62 from the read-only memory 58. The comparison level triggers an immediate stop signal on line 64. This switches off the control oscillator and holds the address register 52 is always on the last address if the entries on lines 44 and 62 correspond.

If after querying the entire read memory 58 an identity is not detected, a "no identity" signal on line 66 produces a corresponding indication in FIG of the display device 68. A stop signal is also placed on the line 64 and the read-only memory 58 is queried further completed.

The coded information to generate the "No Identity" indication is stored in an auxiliary read-only memory, not shown, or in free spaces in the read-only memory 53 of the source language.

The output of the input register 38 is decoded in the unit 70 and results in the entered characters which are shown in the display 68. The output of the decoding and display unit 70 is controlled with a reading gate 72 which is activated while information is being entered. One on line 74 standing activation signal is activated by pressing the translation button 26 removed.

The comparison stage 46 also generates a signal on the line. This activates another signal after an identity has been established Reading gate 78. In the normal state, this reading gate 78 blocks the forwarding of an address from the address register 52 to the reading

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memory 80 of the second language. When an activation signal occurs on the line 76 the address in the address register 52 is forwarded to the read-only memory 80 of the second language.

The foreign-language words are entered at locations in the read-only memory 80 that correspond to the locations of the words in the other language correspond to the address register. That is, the word in the location N1, N2 in the address register 52 is the word in the one Is language which corresponds to a word in the other language which is in the same place N1, N2 in the read-only memory 80 of the second Language is settled.

When an address is fed from the address register 52 into the read-only memory 80, the one at the selected position is coded Information passed on via line 82 to display 68.

Fig. 2 contains circuit improvements and a direct connection between the output of the address register 52 and the input to the reading gate 78 is not shown. In the basic embodiment, as thus far described, it is assumed that the output of the address register 52 is connected directly to the input to the read port 78, so that the address information on the occurrence of the activation signal is transmitted on line 76 straight to the read only memory 80 can.

The display device 68 contains light emitting diodes (LED). Electroluminescent or liquid crystal devices can also be used. The display device contains twelve digits if the number of characters per word in the source language is limited to twelve, and each display device must have each? the characters in the first language and each of the characters in the second language, in the words of the first language to be translated, View.

The output from address register 52 can receive a carry signal if the register reaches its capacity and no stop

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signal from the comparison stage 46 is received. In this case a stop signal for the control oscillator is generated on line 84 and the carry signal then controls a "no word" indication 86. This can be a simple warning light, for example. This eliminates all connections and disruptions with and on the display device 68 avoided.

In general, there is no one-to-one correspondence between the words in both languages. The word "time" from English can be translated into French either as "temps", "fois" or "heures" to be translated. Although the user of the electronic dictionary knows the starting word in general, he may not know how many translations of it there are in the second Language there. However, the circuit arrangement can be converted so that it contains more than one word in the second language per word of the Can process source language. To this end, the components shown in the dashed outline 88 are added.

The address required in the read-only memory of the second language is no longer identical to the address contained in the read-only memory of the source language and is an indirect addressing or query is used. An address read-only memory and a second address register are between the address register 52 and the reading gate 78 are interposed. This additional address read-only memory bears the reference number 90 and the additional Address register, reference number 92.

A repeat key with key 30 is added to the keyboard of Figure 1 and is also an "end of block" detector intended.

Second language read-only memory 80 generally contains more words than source language read-only memory 80 and either the full capacity of the read-only memory of the source language is never used or a read-only memory with a larger capacity is used used as memory 80. The numerous different translations of a given word of the source language are performed on successive Addresses in the read-only memory of the second language

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before saved. The address of the first translation is in the Address read-only memory is stored at the current address in the source language read-only memory. The last word of one The sentence contains a code that indicates the end of the block consisting of the alternative translations. This coding is detected by the detector 94 using it on the line 96 supplied information detected.

This detector 94 indicating the end of the block activates the step button 30 in FIG. 1 and step pulses are given on the line 98. Each of these pulses advances the address register 92 from one location to the next. Successive pressing of the level key 30 causes a series of words from the read-only memory 80 of the second language to appear in the display device 68.

The operation of the supplemented circuit arrangement is therefore largely the same as that of the basic circuit arrangement up to the point at which the address of the input word (from a language) is found in the read-only memory of the source language. The address of the first equivalent word of the second language in the read-only memory of this language is located at this same address in the address read-only memory. This address is contained in the second address register 92, and since the reading gate 28 is now activated, that is to say opened, the first word of the second language, which corresponds to the word entered by the reading memory 80 for this language, is displayed on the display device 68.

To reach the next equivalent word, if any, the repeat (or level) key 30 is pressed. If the detector 94 indicating the end of a block has recognized an “end of the block” coding after the word in the first position in the read-only memory 80 of the second language, nothing happens when the step key 30 is pressed. If a series of alternative words is present at successive positions in the read-only memory 80 of the second language , these alternative words are successively converted into when the step key 30 is pressed

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of the display 68 until the detector 94 detects the "end of block" coding at the end of one of these words and further interrogation of the register 92 is prevented.

The address read-only memory 90 has the same capacity in binary words as the source language read-only memory, independently of the capacity of the read-only memory 80 of the second language. However, the number of bits per word only needs that number which contains the address register. In the example under consideration, there are twelve. That is, the address read memory have a smaller bit capacity than the read-only memory of the source and second language.

A further development of the basic circuit arrangement can be achieved by adding a phonetic reading memory. This has the reference numeral 100 and is shown in dashed lines. This memory is then connected via line 102 the address information is passed from the reading gate 78. At each point of the phonetic read-only memory 100 there is information in this stored, which is a phonetic spelling of the just displayed word of the second language in the alphabet of the source language allows. This takes place at the same time, instead of or after the representation of the word of the second language. at Using a separate phonetic representation, a special phonetic representation device 104 is provided to either the Main part clamped on or the protruding section 12 is shown with two display devices, for example one above the other, Mistake. One is for the second language word and the other is for phonetic spelling in the source language certainly.

In a further development of the basic idea, an audible phonetic output using a phonetic Standard coding can be generated. The additional logical hardware is currently available and is the only requirement would be another read memory. This would store the information relating to the phonetic coding and the modulation an audio frequency source. This would then fit

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• Ab send sounds according to the standard phonetic coding.

To reduce the storage capacity required in the previous explanations, a 5-bit coding was used to represent the alphabet. With twelve as the maximum number of characters per input, 4,096 by 64-bit memory would hold four thousand words. In the basic embodiment described, the memories are queried immediately and the corresponding inputs for the source language and the second language have identical addresses in the two memories. Each entry occupies a 60-bit word in the memory and, if required trailing pulses are added to the definition of the refills.

In general, storage units are based on an 8-bit word since the standard character encoding generally contains seven bits, with the eighth bit being used for parity control. Standard-style keyboard decoding chips are available which output the ASCII encoding corresponding to that key when any key is pressed. Figures 3 and 4 show how a circuit arrangement can be constructed using a standard 8-bit word so that the memories of the source and the second language have identical formats and the translation device can operate in both directions.

In English and many other languages, a word has an average of five characters. Providing sixty-four bits for each input leaves room for twelve characters when using 5-bit coding and eight characters when using ASCII coding. If all entries are of the same length, then space is wasted. This waste can be prevented if the last character of each input is marked and can therefore always be recognized as such. When using ASCII coding, the most heavily weighted bit of the last character can be changed to ^M 1 ⁿ and thus results in a marking.

Storing 4,096 inputs in this way would then require 4,096 by 5 by 8 (or 20,480 by 8) bits. Since 4.096 ■

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2, an address coding of fifteen bits (12 + 3 bits for a factor of 5) enables access to a stored word. A distinction must be made between INPUT , which is a word in the source or second language, and the WORD , which is a group of eight bits. An address stored in the intermediate (address) read-only memory therefore takes up two words and the most important bit of the first is always zero.

If the entries in the memories of the source and the second language are in alphabetical order, the two become an input of the first language alternative equivalents hardly lead to two consecutive inputs in the second language. The addresses of such equivalents can be stored at successive double word addresses in the address read-only memory. However, it is no longer possible to store the address of the first such equivalent at the same address in the address read-only memory how to store the input of the source language in the read-only memory of the source language.

The address of the address read-only memory, which contains the address of the first equivalent of the two words in the source language read-out memory in the read-only memory of the second language, is therefore stored in the source language immediately following the input. The addresses in the second language read only memory of successive equivalents are stored at successive double word addresses in the address read only memory and the last address occurring in the group is identified by changing the first bit of the first word to ^M 1 ".

This required an average of seven words per input in the read-only memories of the source and second language, so that the capacity required for 4,096 inputs is now 4,096 times 7 times 8 »32,768 times 7. In Fig. 3, the numerical value of the first address in each block has been chosen arbitrarily.

By adding a second address read-only memory, which is not shown in FIG. 3, the circuit arrangement in FIG

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effective in both directions. The addresses xx, yy and zz are the addresses in and at this second address read-only memory For example, addresses are stored as the English equivalent of the French words "fois", "heure" or "temps".

Since an entry is now found at a multiple word address, the comparison stage and the circuit that reads from the read-only memory of the second language both require an address register and means for indexing them and for determining the last character of an input.

By adding switching devices with which the read-only memory the source language and the second language can be interchanged and the address read-only memories can be exchanged, the circuit arrangement is really effective in both directions. Since every input into a read-only memory of the second language in average length is seven words and comprises a double word entry into an address read-only memory, needs the capacity of the address read only memory to be only 2/7 (perhaps half) that of the read only memory of the source or second language.

In FIG. 4, the building blocks shown in dashed outlines replace the building blocks 58, 80, 90, 92 and 94 of FIG The same reference numbers have been used.

ROM 1 and ROM 2 are the read-only memories for the source and second language and can be interchanged with switches. All of the switches shown are generally logical Elements and are operated by a signal from a single pole toggle switch located on the keyboard. In position with yourself With the switch located, ROM 1 is the read-only memory of the source language and only the address read-out memory 1 is used. at If the switches are in position 2, only the address read-only memory 2 is used.

The mode of operation of the circuit arrangement will now be described below.

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Pressing the clear key clears the display and the characters are then entered using the keyboard. When the translation key is pressed, the selected address register for the read-only memory of the source language is cleared and a "1 ^M bit is set in the most significant position of the character entered last. The control oscillator is then switched on. Characters from the read-only memory of the source language and the input register are then compared one after the other and the last ^{characters containing the identification bit M} 1 "are compared. Until the characters match, the comparison begins again with the next input into the read-only memory of the source language.

If a match is achieved, the next two words in the read memory of the source language are placed in the address register A is entered, and since the reading gate is activated, the address is used to retrieve the address from the address read-only memory to read out the first character of the first equivalent contained in the read-only memory of the second language. This address is stored in register B. Each character in the read-only memory of the second language is entered into the display device, and if it is not the last character of the entry, the address in register B is increased by one unit, and the next character is read and displayed until all characters have been displayed.

By pressing the repeat key, the address from the address read-only memory is checked for the ^M 1 "bit at the most significant position. If this check is positive, the display indicates that the last equivalent has already been displayed. If this check is negative the address in register A is increased by two and the reading and display process is repeated for the new address.

The representation of all equivalents must be repeated by pressing the translation key again, since the input register still contains the input of the source language.

The last character of a either in the read-only memory of the

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common or the second language is entered with his The most significant bit is set to 1 and thus indicates the end of the entry. Additional information regarding entering the second language can be stored in the read-only memory of the second language immediately after the main input. Preferably the additional information beyond the 2-word address is saved after the last character of the input. The last sign the additional information is marked by setting the most significant bit to 1.

In a system that gives meanings and associations, the information belonging to a word such as "fois" can relate to the word "temps ¹¹ and also end in" .... temps ", where ¹¹ S" should be designated as the end of the information. When entering "temps" the last word of the information following "fois" would be found and identified with the entry. However, the next two words would not be an address, but the first two characters of the next input. This difficulty is overcome in that after each piece of information a symbol is entered which cannot be entered via the keyboard. In a typical case, a point is entered.

If the additional information is just a common abbreviation exists, for example (H) noun or (T) activity word etc., the number of additional characters is small, for example ' eight, and the display device is enlarged in its capacity to accommodate the additional characters.

A circuit is known that takes the last character in an input determined. Another circuit is therefore needed that skips two addresses and continues the display unless that the marked character is, for example, a point. Every entry must therefore be followed by at least one period after the 2-word address.

To display even more information, the introduction of a shift register between the read-only memory of the second language and the display device is a better method and the in-

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formation is placed on the right side of the register, starting at the beginning of the input into the read-only memory and the register is advanced by one character each time. The display then continues to the left and new characters move the existing characters to the left. An oscillator with a low frequency is used to represent the shift register, since the clock frequency of the logic system is generally so high that it causes blurring in the representation.

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Claims (7)

Applicant: 1. David Lowe 2. Silvano Battlmlello PATENT CLAIMS ^ Ji Electronic dictionary, characterized by a first memory (58) with a multiplicity of addresses, information relating to words in a first language being stored at each of these addresses, a second memory (80) also with a multiplicity of addresses, with information relating to words in a second language is stored at each address, the words at each address in the second memory (80) corresponding to a translation of a word contained in the first memory (58) into the second language, means (36, 38, 46, 48, 52) for identifying the address of a selected word in the first memory, second means (90, 92) for identifying the address of a word in the second memory (80) which is a translation of the selected word the information associated with this address, means (78) for interrogating the second memory for outputting the address identified in this enen information and means (78) for displaying the information from the identified address in the second memory (80) as a word in the second language. 2. Electronic dictionary according to claim 1, characterized by a plurality of auxiliary addresses for each address identifiable in the second memory (80) and wherein at each of the auxiliary addresses information is present, the alternative translations of the word selected in the first language into the second language and devices (30) are provided so that each auxiliary address is interrogated one after the other and its information is displayed on the display device (68). 3. Electronic dictionary according to claim 1 or 2, characterized in that 909820/0698 ORIGINAL INSPECTED indicates that the means for selecting an address in the first memory (58) is a keyboard with pushbuttons (18; 36) with which letters in the alphabet of the first language are entered and for displaying a word in the display device (16; 68) can be reproduced, each letter represented being an electrical one relating to it Has information which when combined with the electrical information relating to others via the keyboard entered letters a certain information content generated, which can be decoded to display a specific address in the first memory. 4. Electronic dictionary according to claim 3 »characterized in that that the specific address in the first memory (58) defines a specific address in the second memory (80), at which a translation of the displayed word is stored. 5 · Electronic dictionary according to claim 1 or 2, characterized by a third memory (90) for storing the addresses of the word information stored in the second memory (80), corresponds to the alternate translations of the selected word. 6. Electronic dictionary according to claim 5, characterized by a register (92) which the addresses from the third The memory (90) receives and holds and that is updated step by step with electrical signals from a controller (30) can read, this step-by-step operation is terminated with a detector circuit (94) which detects when in the third memory (90) no further addresses with alternative translations of the selected word are contained. 7. Electronic dictionary according to claim 1, characterized by two further memories (address read-only memory 1 and address read-only memory 2), of which one addresses the word information stored in the first memory (58) and the other addresses the word information stored in the second memory ( 80) saved 909820/0696 cherten word information, and switching means are provided with positions 1 and 2 for selecting either the address read-only memory (1) or the address read-only memory (2) in order to make the dictionary effective in both directions. 909820/0898