DE2835015A1 - Contacting system for semiconductor - embedded in compound on printed circuit board with conducting holes connecting to current supply leads - Google Patents

Contacting system for semiconductor - embedded in compound on printed circuit board with conducting holes connecting to current supply leads

Info

Publication number
DE2835015A1
DE2835015A1 DE19782835015 DE2835015A DE2835015A1 DE 2835015 A1 DE2835015 A1 DE 2835015A1 DE 19782835015 DE19782835015 DE 19782835015 DE 2835015 A DE2835015 A DE 2835015A DE 2835015 A1 DE2835015 A1 DE 2835015A1
Authority
DE
Germany
Prior art keywords
circuit board
printed circuit
semiconductor
embedded
contacting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19782835015
Other languages
German (de)
Inventor
Karl Von Bruck
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AEG Isolier und Kunststoff GmbH
Original Assignee
AEG Isolier und Kunststoff GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AEG Isolier und Kunststoff GmbH filed Critical AEG Isolier und Kunststoff GmbH
Priority to DE19782835015 priority Critical patent/DE2835015A1/en
Publication of DE2835015A1 publication Critical patent/DE2835015A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The contacting system has conducting holes coupling the connecting paths of the semiconducting component to leads on the surface or in several layers of the printed circuit board. The embedding compound for the components has catalysts to allow it to be metallised without having to pass currents. The connection points on the connecting paths are distributed in three dimensions in the embedding compound. The latter consists of an adhesive resin layer containing appropriate catalysts.

Description

Kontaktierung der Verbindungsstege von HalbleiterbauelementenContacting the connecting webs of semiconductor components

Die vorliegende Erfindung bezieht sich auf eine Kontaktierung der Verbindungsstege eines in einer Einbettmasse auf einer gedruckten Schaltungsplatte angeordneten Halbleiterbaucl emcntes.The present invention relates to a contacting of the Connecting webs one in an embedding compound on a printed circuit board arranged semiconductor component emcntes.

Die Kontaktierung von Halbleiterbauelementen, wie Siliziumzcllen erfolgt derart, daß Siliziumzellen in Form eines auf Band vestanzen Teil es hergestellt werden; sodann wird in einem Preßverfahren die Siliziumzelie in ein mit Füllstoff verschenes Epoxidharzsystem eingepreßt, wobei die Verbindungsstege an der Siliziumzelle in Form von abgebogenen Beinchen als Kontaktstuck zur Verfügung stehen. Da die Funktionseinheiten auf der Siliziumzelle immer dichter angeordnet werden, mijssen auch die dazugehörigen Leiterbahnen immer enger und feiner ausgeführt werden Das bekannte Kontaktierungsverfahren basiert auf einem Einzelsteckverfahren, bei dem mittels einer Lötwelle die Haftung und Befestigung der Bauteile bewirkt wird.The contacting of semiconductor components such as silicon cells takes place in such a way that silicon cells are made in the form of a part vestanzen on tape will; The silicon cell is then filled with filler in a pressing process Verschenes epoxy resin system pressed in, with the connecting webs on the silicon cell are available as contact pieces in the form of bent legs. As the functional units are arranged ever more densely on the silicon cell, the associated ones must also be arranged Conductor tracks are made ever closer and finer The well-known contacting process is based on a single plug-in process in which the adhesion is achieved by means of a solder wave and fastening of the components is effected.

Ein derartiges Verfahren ist wegen der engen Anordnung (ler Kontakte zueinander problematisch, da erhebliche Schwierigkeiten auftreten, um die Kontakte der sogenannten Beinchen auf dei Oberfläche der Siiiziumzeile auf Leiterplatten als Verbindungsebene zu übertragen.Such a method is because of the close arrangement (ler contacts problematic to one another, since considerable difficulties arise in order to establish the contacts the so-called pins on the surface of the silicon line on printed circuit boards to be transmitted as a connection level.

Der vorliegenden Erfindung liegt die Aufgabe zugninde, eine verbesserte Kontaktierung für die Siliziumzellen zu finden, wobei eine feste Verankerung im Isolicrstoff zu gewährleisten ist.The present invention seeks to provide an improved To find contact for the silicon cells, with a firm anchoring in the Isolicrstoff is to be guaranteed.

Diese Aufgabe wird erfindungsgemäß durch die im Kennzeichen des Anspruches 1 genannten Merkmale gelöst.This object is achieved according to the invention by the features in the characterizing part of the claim 1 mentioned features solved.

In einer bevorzugten Ausführungsform der Erfindung werden die ausgestanzten, flach liegenden Siliziumzellen als Band auf eine nich ausgehärtete, mit bekannten Katalysatoren für eine stromlose Metalisierung versehene Klebharzschicht für die bekannte Additiv-Technik zur Herstellung von gedruckten Schaltungen aufgelegt und zusammen mit der Kleberharzschicht ausgehirtet und in einem sogenannten Transferverfahren auf einem Insolierstoffträger verpreßt. Dadurch erfolgt eine mechanische Fixierung der Sillziumzellen in der Harzschicht. Durch die katalytische Harzschicht können auf der Oberfläche Leiterzüge im Additiv-Verfahren hergestellt werden.In a preferred embodiment of the invention, the punched, flat lying silicon cells as a tape on a non-hardened, with known Catalysts for an electroless metalization provided adhesive resin layer for the known additive technology for the production of printed circuits and Hardened together with the adhesive resin layer and in a so-called transfer process pressed onto an insulating material carrier. This results in mechanical fixation of the silicon cells in the resin layer. Through the catalytic resin layer you can Conductor tracks are produced on the surface using the additive process.

Die hontaktierung zwischen den Leiterzügen auf der Oberfläche und den Verbindungsstegen der Siliziumzelle erfolgt über bohrungen, die als Durchkontaktierung hergestellt werden.The contact between the conductors on the surface and The connecting webs of the silicon cell are made via holes, which are used as plated-through holes getting produced.

Die im Isolierstoff fest verankerten Siliziumzellen werden im sogenannten Additiv-Verfahren verbindungsfest gemacht.The silicon cells firmly anchored in the insulating material are called Additive process made connection-resistant.

Die Erfindung wird im folgenden anhand der Zeichnung an einem Ausführungsbeispiel erläutert: In der Zeichnung ist schematisch eine Kontaktierung eines Silizium-Halbleiterbauelementes auf einer Leiterplatte dargestellt Der Isolierstoffträger 1 einer Leiterplatte ist mit einer EleL-harzschicht 2 versehen, die zur besseren Anschaulichkeit verhältnismäßig sehr dick dargestellt worden ist.The invention is illustrated below with reference to the drawing using an exemplary embodiment explained: The drawing schematically shows a contacting of a silicon semiconductor component shown on a circuit board The insulating material 1 is a circuit board provided with an EleL-resin layer 2, which for better clarity is proportionate has been shown very thick.

Die Verbindungsstege 3 des Silizium-Halbleiterbauelementes 1 werden an ihren Anschlußpunkten von einer von der Oberflächee der Harzschicht ausgehenden Bohrung 5 getroffen. I)ie von der Siliziumzellenoberfläche ausgehenden Verbindungsstege 3 verteilen sich igelförmig nach allen Seiten. Ihre Anschlußpunkte liegen dreidimensional verteilt in der iiarzscjiiciit und wri <ieii von Durchkontaktierungsbohrung verschiedener Linge getroffen.The connecting webs 3 of the silicon semiconductor component 1 are at their connection points from one extending from the surface of the resin layer Hole 5 hit. I) ie connecting webs emanating from the silicon cell surface 3 are distributed in the shape of a hedgehog on all sides. Your connection points are three-dimensional distributed in the iiarzscjiiciit and wri <ieii of via hole different Linge hit.

Auf der Oberfläche der Harzschicht 2 sind Leiterzüge G ausgebildet, die mit den Bohrungen eine leitende Verbindung bildn können; dazu werden die Bohrungswandungen, auf derlen Katalysatore zur stromlosen Metallisierung freigelegt sind, in an sich bekannter Weise metallisiert, so daß sie eine Durchkontaktierung zu schen den Verbindungsstegen 3 und den Leiterzügen 6 bilden können.Conductor lines G are formed on the surface of the resin layer 2, which can form a conductive connection with the holes; for this purpose the bore walls, on which catalysts for electroless plating are exposed, in itself metallized in a known manner, so that they have a via to rule the connecting webs 3 and the conductor tracks 6 can form.

Durch die dreidimensionale Verteilung der Anschlußpunkte ensteht ein ausreichender Abstand zwischen den Verbindungsstegen, so dan eine gegenseitige ungewollte Berührung bzw. Kontaktierung vermieden worden kann.The three-dimensional distribution of the connection points creates a sufficient distance between the connecting webs, so dan a mutual unwanted Touching or contacting can be avoided.

Die erfindungsgemäße Kontakierung kann selbstverständlich auch mit Leiterzügen erfolgen, die in mehreren Lagen in der Schaltungsplatte angeordnet sein können.The contact according to the invention can of course also with Conductor runs are made, which are arranged in several layers in the circuit board can.

Claims (4)

Patentansprüche Kontaktierung der Verbindungsstege eines in einer Einbett masse auf einer gedruckten Schaltungsplatte angeordneten Ilaibleiterbaueiementes, dadurch gekennzeichnet, dat die Anschiußpunkte der Verbindungsstege über leitend gemachte Bohrungen mit Leiterzügen auf der Oberfläche oder in mehreren Lagen der gedruckten Schaltungsplatte verbunden sind. Contacting the connecting webs one in one Embedding mass on a printed circuit board arranged Ilaibleiterbaueiementes, characterized in that the connection points of the connecting webs are conductive Drilled holes with conductor tracks on the surface or in several layers of the printed circuit board are connected. 2) Kontaktierung nach Anspruch 1, daduich gekennzeichnet, diln die Einbettmasse des Halbeiterbauelementes mit Katalysatoren zur stromlosen Metallisierung versehen ist.2) Contacting according to claim 1, characterized thereby, diln the Embedding compound of the semiconductor component with catalysts for electroless metallization is provided. 3) Kontaktierung nach Anspruch 1 und 2, dadurch gekennzeichnet, daß die Anschlußpunkte der Verbindungsstege in der Einbeitmasse dreidimensional verteilt angeordnet sind.3) contacting according to claim 1 and 2, characterized in that the connection points of the connecting webs distributed three-dimensionally in the one-piece mass are arranged. 4) Verfahren zur Herstellung einer Kontaktierung nach Anspruch 1 bis 3, dadurch gekennzeichnet, daß die Halbleiterbauelemente in eine mit Katalysatoren zur stromlosen Metallisierung versehene Kiebharzschicht eingebettet werden, die auf eine Transferunteriage aufgebracht ist, daß die Klebharzschicht gel,iirtet und zusammen mit dem Halbleiterbauelement im Transferverfa?iren auf einen Isolieratoffträger übertragen und mit diesem verpreßt wird.4) A method for producing a contact according to claim 1 to 3, characterized in that the semiconductor components in one with catalysts for electroless metallization provided Kiebharzschicht be embedded, the is applied to a transfer substrate that the adhesive resin layer gels, iirtet and together with the semiconductor component in the transfer process on an insulating carrier is transferred and pressed with this.
DE19782835015 1978-08-10 1978-08-10 Contacting system for semiconductor - embedded in compound on printed circuit board with conducting holes connecting to current supply leads Withdrawn DE2835015A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE19782835015 DE2835015A1 (en) 1978-08-10 1978-08-10 Contacting system for semiconductor - embedded in compound on printed circuit board with conducting holes connecting to current supply leads

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19782835015 DE2835015A1 (en) 1978-08-10 1978-08-10 Contacting system for semiconductor - embedded in compound on printed circuit board with conducting holes connecting to current supply leads

Publications (1)

Publication Number Publication Date
DE2835015A1 true DE2835015A1 (en) 1980-02-14

Family

ID=6046670

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19782835015 Withdrawn DE2835015A1 (en) 1978-08-10 1978-08-10 Contacting system for semiconductor - embedded in compound on printed circuit board with conducting holes connecting to current supply leads

Country Status (1)

Country Link
DE (1) DE2835015A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0592938A1 (en) * 1992-10-16 1994-04-20 AMEG Additive Metallisierung- Eentwicklungs und Anwendungsgesellschaft mbH Process for mounting and contacting electronic components on an insulating support

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5510139A (en) * 1992-01-16 1996-04-23 Ameg Additive Metallisierung-Entwicklunge-Und Anwendungssesellshaft Gmbh Process for assembly and bonding of electronic components on an insulating support
EP0592938A1 (en) * 1992-10-16 1994-04-20 AMEG Additive Metallisierung- Eentwicklungs und Anwendungsgesellschaft mbH Process for mounting and contacting electronic components on an insulating support

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