DE2831734B2 - Signal generator for generating sinusoidal output signals with a predetermined mutual phase position - Google Patents

Description

The invention relates to a signal generator of the type mentioned in the preamble of claim 1 Genus.

2 (i Such a signal generator is already known (IEEE Transactions on Audio and Electroacoustics, Vol. AU-19, No 1, March 1971, pp. 48-57), which generates two output signals that are phase-shifted by 90 ° Calculator with

r> a ROM memory and as a number generator Accumulator. With each phase step marked by the number generator, the computer simultaneously which belongs to? Sine value and cosine value are calculated and output to a digital / analog converter each. This solution requires a complex function generator.

Furthermore, a signal generator is known (DE-OS 22 31 458), in which the number generator consists of a Frequency register for selecting the output frequency and

f. consists of a modulo 10 "accumulator and periodically emits binary coded phase step signals to a locking device working as a function generator. Of the Read-only memory is connected to a digital / analog via an output register and a complementing device Converter connected. The modulo 10 "accumulator is made up of adders and registers, which receive a clock signal from a clock is supplied so that the input signals are linked to one another in the correct temporal relationship.

■> However, this signal generator only generates a single one sinusoidal output signal.

It is also known (DE-AS 21 18 065), a sinusoidal signal by repeated scanning in to transform amplitude modulated pulses and from them

> (i to form sinusoidal multiphase signals.

A known signal generator (DE-OS 23 58 009) uses a part of phase step signals by means of an adder to add a constant value to the phase step signals, so that on the one hand

V) a selectable frequency multiplication and on the other hand result in a selectable phase.

The invention specified in claim 1 is based on the object of providing a signal generator of the initially specified mentioned genus to improve / υ. dal! he

Wi is characterized by a simpler connection structure.

Further embodiments of the invention are claimed in sub-claims and in the ^F: igiircnbeschreibung described.

■ r> In the signal generator according to the invention is the Function transmitter easier to assemble. This means that the technical effort will then be comparative above all low if a larger number of output

gnalen is generated.

Two exemplary embodiments of the invention are explained below with reference to the drawing 1 shows a basic circuit diagram of a signal generator, F i g. 2 a diagram and

3 shows a basic circuit diagram of a further signal generator.

The one shown in FIG. 1 generates three alternating voltages Ur, L /? And i / r, each phase shifted by 120 °, and three alternating currents Ir, Is and I _T each phase shifted by 120 °. The current triangle Ig, Is, h is opposite the voltage triangle Ur, Us. i / rum shifted the phase angle φ , which can be preselected at an angle input member 10 and is output by this in binary-coded form. In the example shown, a second angle input member 11 outputs an angle value of 121 ° in a likewise binary-coded form. Depending on the position of a switch Ϊ2, which is shown symbolically in the drawing and can consist of several gates corresponding to the number of bits of the binary 'erased angle values, either the angle input element 10 or the angle input element 11 is connected to a first input 13 of an adder 14, the second input 15 of which is connected to the output of an accumulator 16 and whose output is connected to the input of the accumulator 16 on the one hand and to the input of a function generator 17 on the other hand six sample-and-hold circuits 19 to 24 is connected to each of the sample-and-hold circuits 19 to 24, a low-pass filter 25 to 30 is connected, each of which is followed by an amplifier 31 to 36. The amplifiers 31, 33 and 35 are voltage amplifiers and give the output voltage Ur or Us or iA from. The amplifiers 32, 34 and 36, which operate as current amplifiers, supply the output current / «or. / s or H-

A clock generator 37 generates clock pulses "with the frequency /" ". These arrive at a clock distributor 38,

which on the one hand clocks the accumulator 16 with clock pulses of the frequency /, = 4 ^ and controls the switch 12 and on the other hand clock signals f \ to ft with the frequency ^ -

the clock inputs of the sample and hold circuits 19 to 24 outputs, whereby these are clocked cyclically a

The accumulator 16 and the adder 14, together with the angle input members 10 and 11 and the switch 12, form a number generator which outputs binary-coded phase step signals Ph to the function generator 17, which is converted into binary-coded instantaneous value signals from the function generator 17 and from the digital / analog converter 18 in an analog signal! be reshaped. The number generator generates, as will be explained in more detail below, for each of the output signals Ur, Ir, Us, / s, Uy and Ij in cyclic order phase step signals Ph, which are converted into binary-coded instantaneous value signals from the function generator 17 and from the digital / analog converter 18 converted into a corresponding analog signal proportional to a reference voltage U _n -I and stored in the associated Ablast-1laltc circuits 19 to 24 in analog form until the next cycle. The functional over 17 therefore only outputs one momentary input within each phase step and can accordingly be constructed simply; z. B. a ROM memory is suitable as a function device 17. in

the for each occurring phase step signa! the associated instantaneous value of the sine function is saved is. Since only the sine function of the 1st quadrant has to be written into the ROM memory and the Sine values of the three other quadrants can be obtained by mirroring the 1st quadrant can, a relatively small storage capacity is sufficient.

In the following reference to the diagram of the I "i g. 2, the operation of the signal generator described is explained in detail. G In the F i. 2 are denoted by the numbers 0 to 7 individual phase steps. The different clock signals are, in turn, with f _a f _s and / Ί to 4. The line labeled ^ shows the position of switch 12 for the individual phase steps. Line Ph shows the respective value of phase step signal Ph at the output of adder 14 and line ·. ' A the value e '! Stored in the accumulator i5 in each case is carried.

To make it easier to understand, it is initially assumed that the switch 12 is permanently in the 121 ° position. With a clock pulse of the clock signal f _s in phase step 1, the phase step signal Ph assumes the value 0 °, this value is stored in the accumulator 16, the function generator 17 forms the associated sine value in binary-coded form and the digital / analog converter 18 in analog Form, at the clock input of the sample-and-hold memory 19 appears a clock pulse of the clock signal / ",, and the analog value assigned to the output voltage Ur is eir.gespeic iert in the sample-and-hold circuit 19. At the next clock pulse of the clock signal L ie at the phase step 3, the value 121 ° of the angle input element 11 is added to the old value 0 ° of the accumulator 16 in the adder 15, the new value 121 ° is transferred to the accumulator 16, and a corresponding sine value assigned to the output voltage Us is entered in the sample-and-hold Circuit 21. Βεί · η phase step 5, the sine value of 242 ° assigned to the output voltage i / r is transferred to sample-and-hold circuit 23 in phase step 7 the sine value of 363 ° = 3 ° assigned to the output voltage Uli is stored in the sample-and-hold circuit 19, etc.

If one considers the formation of the output voltage Ur on its own, for example, it appears that the number generator would do nothing other than increase the value of the phase step signal Ph by 3 ° for every sixth phase step. The Zalilengenera'cor works as a separate triangle number generator for each output voltage Ur, Us and Ut. At / around the sample and hold circuits 19, 21 and 23, step-shaped output voltages appear which approximate a sinusoidal curve and are each phase shifted by exactly 120 ° from one another. With the low-pass filters 25, 27 and 29, the jagged output voltages are smoothed and amplified with the voltage amplifiers 31, 33 and 35 to the required value,

The initial stioms h, L '.ind /; assigned sine values are formed in the next phase step after the calculation of the sine value of the output voltage Ur, i / _s or Ur of the corresponding phase, i.e. with phase steps 0.2, 4, 6 ... In the example shown, switch 12 changes at phase step 2 in the position ψ, the adder \ ', l carries out the addition 0 ° + ψ , the phase step i'h thus assumes the value ψ , the radio transmitter 17 outputs the associated sine value. at the clock input of the

Sampling Ilallc-Schallimg 20 appears a clock pulse of the clock signal / ·. and the analog value assigned to the output current //, · is stored in the sampling circuit 20. At the clock input of the accumulator 16 no clock pulse of the clock signal Λ appears in phase step 2. so that the value φ is not stored in the accumulator 16. In phase step 4, as can be seen from the drawing. the sine value of 121 ° + 9 assigned to the output current Is into the sampling 1 laltc circuit 22. in the phase step b of the output current /; associated sine waveforms of 242 "+ r / are stored in the sample-hold circuit 24 etc. The stair-shaped output spans of the sample-hold signals 20, 22 and 24 that arise in this way are smoothed with the low-pass filters 26, 28 and 30 and with the Current amplifiers 32, 34 and 36 in corresponding currents of the required

The signal generator described thus forms a voltage triangle Uh. Us. Ui and a current triangle In Is. Iu which rotate in the counterclockwise direction and are twisted against each other by the angle r / Sinuswcrlcs takes place accordingly later. As a result of the delayed sampling of the sine values of the output currents Ir, Λ and /; compared to the sine values of the assigned output voltages Ur. (A- and ''; the current triangle is not rotated by the angle (/. But in the example described by the angle q-0.5) compared to the voltage triangle .

The mentioned angle value of 121 of the angle input member Il is only to be understood as an example and depends on the desired fineness of the stepped curve of the analog signals at the output of the Sample and hold circuits 19 to 24. Of course can also be the angular value of the angle input member 11 be smaller than 120 ", so that the voltage and Turn current triangles clockwise. In a binary 8-bit system, this angle value is e.g. B. by the binary number 01010101 represented what an angle

256

- ~ 119.5 = corresponds.

In the example shown, the digital / analog converter 18 has a reference _voltage input 39 which is connected to a reference voltage source U rc i. The analog signal at the output of the digital / analog converter 18 is proportional to the reference voltage, so that the amplitude changes of all output voltages and output currents can be influenced jointly by changing the reference voltage. If the reference voltage input 39 can be connected to a plurality of adjustable reference voltage sources via a multiple switchover controlled by the clock distributor 38, the amplitude values of the output voltage Ur. Us and Ui and each of the output currents Ir. /·, and /; can be set independently of one another by changing the reference voltages. Automatic readjustment of the output signals based on their effective values is possible. when the voltage amplifiers 31, 3i and 35 as well as the current amplifiers 32, 34 and 36 are connected to an effective wcrtmeßgerät whose output signal controls the reference voltage sources. Automatic readjustment of the phase angle is also possible by using a voltage amplifier 31, 33, 35 and a ci _rn m _v; .F «ijr |. _; r 32 34 36 of the "! calibrated phase are connected to a phase angle measuring device, the output signal of which the angle input element 10 controls.

In the Γ i g. 3 have the same reference numerals as in FIG F i g. 1 towards equal parts. Instead of the sampling Ilaltc circuits 19 to 24 (Fig. 1), the signal generator according to Fig. 3 has digital read-write memories (RAM) 39 to 44, their memory inputs to the Futiktionsgeber 17 and their clock inputs to the Tal · 'distributor 38 are connected. | Each of the write I.csc memory 39 to 44 are followed by a digital / analog converter 45 to 50, the output of which is closed one of the low-pass filters 25-30 leads.

The signal generator according to the I · 'i g. 3 is in comparison somewhat more complex than that according to FIG. I, but is distinguished by the advantage. that the working speed the digital / analog converter 45 to 50 must be less high than that of the digital / analog W .jjdlers 18 (according to the circuit of Fig. 1).

The digital / analog converters 45 to 50 advantageously have reference voltage connections for connecting a reference voltage with which the amplitude values of the output voltages and output currents can be set or regulated. Furthermore, it is advantageous to connect an adder upstream of the function generator 17, which allows an angle signal to be added to the phase step signal Ph in order to additionally influence or readjust the phase angle of the output voltages and output currents.

The signal generators described are advantageously as a three-phase voltage and three-phase current generator used to calibrate electricity meters

For this purpose 2 sheets of drawings

Claims (10)

Patent claims: 1. Signal generator for generating sinusoidal output signals with a predetermined mutual phase position, with a number generator controlled by a clock, a function generator and at least one digital / analog converter in which the number generator outputs binary-coded phase step signals to the function generator, which are converted from the function generator into binary-coded instantaneous value signals and are converted into an analog signal by the digital / analog converter, characterized in that the number generator (10 to 16) cyclically generates phase step signals (Ph) assigned to each of the output signals (Ur; Ir-Us; Is; Ut; / ^) that each Output signal (Ur; Ir; Us; Is, Ur, h) a .rti is assigned to the digital / analog converter (18) or memory (19 to 24; 39 to 44) connected to the function generator (i7) and that a the clock generator (37) connected clock distributor (38) cycles the memories (19 to 24; 39 to 44). 2. Signal generator according to claim I, characterized in that the memory (19 to 24) are sample-and-hold circuits and that the digital / analog converter (18) all output signals (Ur; Ir; Us; / ·>; Ur, / ^ is mapped together. 3. Signal generator according to claim 1, characterized in: 2t that the memory (39 to 44) is digital Read-write memories are a common feature of every memory (39 to 44) a digital / analog converter (45 to 50) is connected downstream. 4. Signal generator according to one of claims I to 3, characterized in that the number generator (10 to 16) consists of at least one angle input member (10; 11), an adder (14) and an accumulator (16), that the angle input member (10 ; 11) to a first (13) and the output of the accumulator (16) to a / wide input (15) of the adder (14) is connected and dc ^r output of the adder (14) connected to the input of the accumulator (16) is. 5. Signal generator according to claim 4, characterized in that two angle input members (10; 11) via a switch (12) controlled by the clock (37) to the first input (13) of the Adding element (14) are connected. 6. Signal generator according to claim 2, characterized in that a reference voltage input (39) of the digital / analog converter (18) via a multiple switch controlled by the clock distributor (38) can be connected to at least two adjustable reference voltage sources. 7. Signal generator according to one of claims I to 6, characterized by three over one each Low-pass filter (25; 27; 29) to one of the memories (19; 21; 23) or one of the digital / analog converters (45; 47; 49) connected voltage amplifiers (31; 33; 35) for generating a voltage triangle and through three via each one low-pass filter (26; 28; 30) to one of the memories (20; 22; 24) or one of the Digital / analog converter (46; 48; 50) connected to a current amplifier (32; 34; 36) for generating a Slrom triangle. 8. Signal generator according to one of claims 6 and 7, characterized in that the voltage amplifier (31; 33; 35) and the current amplifiers (32; 34; 36) are connected to an effective value measuring device whose output signal controls the reference voltage sources. 9. Signal generator according to claim 7, characterized in that in each case a voltage amplifier (31; 33; 35) and a current amplifier (32; 34; 36) are connected to a phase angle measuring device, whose output signal controls the angle input member (10). 10. Use of the signal generator according to one of claims 1 to 7 as a three-phase voltage and Three-phase generator for calibrating electricity meters.