DE2746523C3 - Computer-controlled communications device - Google Patents

Description

It should be ensured that the control commands can no longer be influenced by signal lines within the device and that superposition of HF interference as a result of interference frequencies generated by query clocks is avoided without having to provide special interference suppression measures.

The object is achieved according to the invention according to the teaching set out in the characterising part of claim 1.

Advantageous developments of the invention are described in the subclaims.

The invention and further advantages resulting from its application are described in more detail below in an embodiment for a hi-fi device using the drawings. In the drawings shows

Fig. 1 shows an overall block diagram of a computer-controlled operating and tuning unit in a hi-fi device designed according to the invention,

Fig.2 a block diagram of the interconnection of device-based operation and remote control,

Fig.3a a circuit diagram of the device input keyboard,

Fig. 3b shows the transmitter part of a remote control connected to an input keyboard equivalent to that shown in Fig. 3a,

Fig. 4 is a block diagram of the visual display control.

F i g. 5 a DA converter for the tone control and

Fig. 6 is a block diagram of a computer controlled PLL frequency synthesis circuit.

The control unit for a hi-fi system described in more detail below has a microcomputer which is programmed in such a way that the following functions can be controlled via it.

NF part

1. Analogue functions. Bass, treble, balance, volume,

2. numerical display of the setting of the four analogue functions,

3. Switching functions: Buddy, Muting, Scratch, Linear,

4. Switching functions: Phono, Tape I, Tape 2. Ultra-short wave reception. Short wave, medium wave and long wave reception (FM, KW, MW, LW).

5. Volume reduction to a certain value,

6. Issue a mute command to suppress on/off and switch noises.

HF part

1. Control of a PLL frequency synthesis circuit for all ranges (FM, KW, MW, LW),

2. Switching from one reception tuner to another,

3. Control of a simple numerical display for frequency and set program,

4. Monitoring of the range limits so that the frequency bands with quartz stability are also adhered to

5. Acceptance of commands from manual tuning and automatic station search or from the keyboard when entering frequencies numerically,

6. Control of a program memory with 12 stations per waveband, a manual tuning for all four bands, an electronic search for all four bands and a numerically adjustable station for all four bands,

7. separate volume setting for AM and FM range and their storage,

8. Detection of frequencies that are outside the permissible reception range that is currently set, with numerical frequency input and display of the error and

9. Setting all multi-frequency information for the functions in a data memory so that when the device is switched off and on again, not only the set stations remain, but all NF functions are also saved and played back with the last set value.

The functions listed can be controlled in a computer-controlled hi-fi system that is created according to the example. With appropriate changes and additions to the software of the computer circuit, extensions or other space allocations for the control of other telecommunications devices, e.g. television sets, are of course also possible, whereby the hardware, which is also seen from the perspective of the invention, must be adapted.

In the overall block diagram of Fig. 1, reference number 1 represents the input keyboard on the device and 2 represents the input keyboard of a remote control, with the command signals from the remote control being transmitted to the receiver module 3 via infrared light. When each function key on the input keyboard 1 on the device is pressed, a coding stage 4 is activated via a matrix circuit, which converts each command into a word in 6-bit biphase code, which is read in serially via a common input A of the microcomputer 5. In the remote control 2, pulse processing takes place in the same way, with a coding stage also being activated when a function key is pressed, which converts the command into a word in 6-bit biphase code and sends this to a pulse output stage of the transmitter stage of the infrared transmitter. The infrared signals coming from the transmitter are fed to a selective preamplifier in the receiver stage 3, in which a first interference signal suppression takes place. The 6-bit biphase code present at the output of the preamplifier is also read into the microcomputer via the common input A.

Contrary to the state of the art mentioned in the introduction, there is no reading of a counter reading here, but the direct input of a specific control command is pulse code modulated. It is clear that this data input is the most interference-resistant, since the control command is applied as a multi-bit code word and is less likely to be distorted by external interference pulses and interference. Furthermore, no interference frequencies occur. The microcomputer is programmed in such a way that it can decode the applied 6-bit biphase code and calculate the required information from it for setting the function controller to be adjusted. This is done in such a way that for all variable values such as volume, balance, treble, bass or brightness and saturation in television sets, the words emitted by the coding stage in one cycle are counted directly according to the time the function key is pressed, with the counting from the counting position stored in the computer's central memory upwards in a positive direction or downwards in a negative direction. The

A command is given to make the corresponding memory register count a certain number of steps in a positive or negative direction. The multi-bit information for setting the digital function keys obtained in the computer itself through decoding and addition or subtraction or other arithmetic operations is sent via a data bus 6 to the information memory assigned to the function key pressed, e.g. to the 6-bit DA converter 7 for volume. The multi-bit information is simultaneously available in all other information memories. However, it is not read in because only the information memory 7 that is addressed by the computer is activated, whereby the address is decoded via the address decoder 9 and switched through via an address bus 10 to the information memory 7 to be activated. The information memory 7 (latch) holds the digital information entered, changes the written information if there is a change in the number combination, or leaves the data status unchanged. The ?- written information is stored as fixed information and is used to permanently set the function. Corrections due to analog deviations are not necessary, since the applied multi-bit information as a control variable is not variable and is susceptible to interference due to the short transmission time. Various digital-analog converters 7a, b and c are provided for the individually adjustable, variable variables: bass, treble, balance, volume, all of which achieve the same effect, namely the storage of the digital value 3η and the conversion of the digital value into an analog control value. They are activated individually via the address bus and the address contained therein. If such a command is not present, the applied multi-bit information from the microcomputer cannot cause a change in the stored digit position compared to the new one. In parallel to writing the multi-bit information into the addressed information memory, the value is saved in a central data memory 11, which stores the values of the last setting of all functions and retains them for a longer period when the device is switched off or when the power source 12 of the computer fails. When the device is switched on again, ie when the power source 12 is again connected to the computer and all other device functions can be performed, a special program is read into the computer that writes all functions to the last set function in the information memory and queries the central data memory 11 for this purpose. The time between the command input in the computer and the setting of the function controller is so short that it is beyond visual or acoustic perceptibility. The multi-bit information that is written into the addressed information storage via the data bus is written over the data bus in a few milliseconds, so that interference does not occur even with longer cable feeds to the individual information storage devices, which is not the case when transmitting analog values. Complex shielding measures are not necessary.

The same conditions have been set for the alphanumeric display, namely that the display result is not influenced by interference frequencies. For this reason, after the digital multi-bit information has been written into the addressed information memory of the function controller to be set, the computer outputs multi-bit information proportional to this setting with an address for the alphanumeric display, with an addressable information memory that can be read for the information to be displayed being connected in front of the alphanumeric display 14 or integrated into the display, into which the multi-bit information is written. In the exemplary embodiment, information memories 13a and 13Z> are also provided, via which, in addition to the illuminated display of the function activated, the switching is also carried out. This takes place via line 24 by controlling the individual electronic changeover switches. The alphanumeric display consists of a segment display with several digits and symbols, with a column of digits available for each variable to be set in order to ensure that all functional positions are displayed simultaneously.

In the exemplary embodiment, further inputs of the microcomputer are connected to an automatic tuning circuit and a manual tuning device. The operation of this arrangement will be described following the description of the PLL frequency synthesis circuit used with digital frequency display, which is controlled by the computer.

PLL frequency synthesis circuits with digital frequency display provide not only the advantage of precise frequency display but also the advantage of quartz-stabilized regulation of the receiver's oscillator frequency.

The basis of this type of circuit is the phase-locked loop (PLL), which creates a frequency synchronization between the quartz frequency and the receiving oscillator. To design the frequency synthesis circuit for frequencies from 600 KHz to approx. 120 MHz, i.e. from the longwave range to the ultra-shortwave range, it is necessary to use different frequency dividers for the individual frequency ranges. It has proven to be useful to set the frequency synthesis circuit in 1 kHz steps in the MW and SW reception ranges and in 10 kHz steps in the FM range.

Since there are no frequency dividers that can be programmed up to 120 MHz, a prescaler must be placed in front of the programmable frequency divider of the frequency synthesis circuit. In order to obtain the desired divider ratios with a maximum frequency of currently 2.5 MHz to be processed by the frequency synthesis circuit, it has proven optimal to assign a 50/51 to the FM and SW range and a 5/6 divider to the MW and LW range.

The variable prescaler 50/51 was chosen because with a fixed prescaler of 1:50 the reference frequency in the phase comparison circuit must be 200 Hz (10 KHz divided by 50) for FM or 20 Hz (1 KHz divided by 50) for SW in order to be able to implement 10 KHz or 1 KHz steps. Since the reference frequency is present as a noise voltage in the phase control circuit and must be filtered out, integration time constants of 200 or 20 Hz would result which would make rapid tuning from one end of the range to the other impossible.

In the designed frequency synthesis circuit, the lowest interference frequencies to be suppressed in the phase-locked loop are 1 or 10 KHz and thus 50 times higher.

The block diagram of a frequency synthesis circuit used is shown in Fig.6. The operation of the frequency synthesis circuit is briefly described using this block diagram. Part of the voltage of the receiver oscillator 71 or 72 passes through a crossover 73 and is divided down in the prescaler 74 and passed on to the synchronous dividers 75/76 programmable by the microcomputer. The output frequency of the synchronous divider 76 is freely compared in the phase comparator 77 with the reference frequency which is obtained by a switchable divider 78 by dividing the frequency of the quartz oscillator 79. The switching of the asynchronous divider 78 is also computer-controlled by entering the frequency range to be set. The phase comparator 77 supplies a direct voltage which adjusts the frequency of the receiver oscillator controlled via the AM/FM switch 80 until the divided frequency matches the reference frequency. During the counting process, the synchronous divider 75 switches the division factor of the variable prescaler from 50 to 51 or from 5 to 6. For this purpose, information is available from both the microcomputer and the programmable synchronous dividers 75/76 , which cause the switchover after a counting process when the frequency range is entered. For the desired reception frequency setting, the synchronous dividers 75/76 receive the appropriate multi-bit information from the microcomputer, which, returning to Fig. 1, is written into the assigned addressed information memories 15/16 via the data bus. The corresponding frequency is entered either by numerical input via a Zener keyboard via input A, whereby the input can be made either on the device or via the remote control, or by an electronic search which works as follows: If the function key "electronic search + or -" is _pressed after entering the corresponding command to the microcomputer, binary information is sent to the microcomputer via a matrix circuit and a coding stage 17, which in turn clocks frequency steps in the pre-programmed counting rhythm from an integrated or a clock generator and outputs multi-bit information in the selected reception range to control the programmable divider 75/76 in Fig. 7, which binary information is stored in the information memories 15 and 16, which must be addressed simultaneously. The set values cause the corresponding adjustments of the receiving oscillator 19 (Fig. 1) or the oscillators 71/72 (Fig. 7) in the PLL frequency synthesis circuit 18, which is shown in Fig. 7 using the detailed block circuit of the frequency synthesis circuit.

Manual adjustment is carried out in a similar way, whereby pulses are generated via an adjustment wheel 20 (Fig. 1) which is provided with a perforated disk. These pulses are generated by two photodiodes offset by 90° below a light source passing through the perforated disk and signal the direction of rotation, i.e. +/- setting. In a downstream pulse forming stage 21, the pulses present are processed and entered directly into the computer and added or subtracted from the actual value.

The microcomputer outputs digital multi-bit information for setting the PLL frequency synthesis circuit, which corresponds to the respective control value. This multi-bit information is read into the addressed information memory 15/16 via the data bus.

The microcomputer's calculation is necessary, regardless of the reception ranges described here, also for the reception ranges of television sets or other signal receivers, which is explained below using the radio reception range as an example. The binary information for the synchronous dividers 75/76, which are temporarily stored in the information memory 15/16 (Fig. 7), are not directly related to the reception frequency, since otherwise the hardware outlay, ie the individual coding stages, would become so complex that it would no longer be economically viable. The programmable microcomputer now achieves this using suitable software. The FM reception frequency 87.5 MHz will serve as an example for the following consideration.

In order to set the desired reception frequency, the programming inputs of the synchronous dividers A and B receive corresponding information from the microcomputer.

Receive frequency + IF
Oscillator frequency

87.5MHz 10.7MHz 98.2MHz

a = division factor of divisor A

b = division factor of divisor B

1-1OkHz (1) 1OkHz = reference frequency

= Division factor of the distributor

This is the case if Formula 1 is fulfilled.

The formula shows that the division factor a has a value of 1 and the division factor b has a value of 50, i.e. if a is increased by 1, the oscillator frequency changes by 10 kHz and if the division factor b is changed by 1, the frequency changes by 500 kHz.

For the frequency 98.2 MHz, 6=196 and a=20 We then get:

Z ₀₅₂ .=(20+50 x 196) x 10kHz=98.2MHs

The prescaler will divide the oscillator frequency by 51 for the time that divider A needs to count from 20 to 0 and then continue to work with the division factor 50. The switchover signal for the prescaler is provided by divider A.

The following equation corresponds more closely to the practical functional sequence, but delivers the same result:

+ (76x50)x10kHz=98.2MHz

The division factors a and b must be provided by the microcomputer as binary information.

13 128 DM _D32 D,b £ 14 D ₂ D, "•25b D >kj D ₄

a= 2OS

0 0 1 0 1 0 0 1 0 0 0 1 0 0

In parallel to the input of the individual frequencies, whether via the usual manual setting, via the fast or slower station search, calling up stored stations and direct numerical frequency input, all digital multi-bit setting information provided by the microcomputer is converted for the PLL frequency synthesis circuit for the numerical display and serially entered into the numerical display, provided that this is addressed via the address bus. In parallel, there is also a display of whether a correct frequency has been selected in the set reception range. If no correct frequency is selected, this signal is changed so that the operator is immediately informed that an incorrect setting 22 (Fig. 1) has occurred. The digital value is stored via information storage devices not shown in detail in block diagram 1, so that the actually set frequency value is always displayed, with an addressed switch between the MHz and kHz range also taking place.

The essential feature of the invention is that all data for setting are fed to the information storage devices via a common data bus, but only the addressed information storage device is set, so that few connecting lines between the function controllers to be controlled and the central computer unit are required. This ultimately also leads to a reduction in the connecting line in a communications device. Addressing is carried out in such a way that after or during the output of the multi-bit information into the data bus, further multi-bit information is sent as an address directly to an address decoder 9, which releases a specific line of the address bus 10 (Fig. 1). Only then is a current pulse sent by the computer and conducted via the address decoder 9 switched through this free line, which activates the addressed information storage device for storing the multi-bit setting information.

In Fig.2 it is highlighted that the output data of the infrared receiver after the preamplifier 3 are completely identical with the input data of the keyboard on the device 1, and that these output data are written into the microcomputer 5 via a common input A , whereby at least one additional input of the microcomputer can be kept free for other functions, e.g. manual tuning circuit.

Fig. 3a shows a circuit diagram of the input keyboard on the device, whereby the various functions are controlled via the keys 30 with the matrix circuit. In the coding stage 31, the applied control commands are converted into a binary code (6-bit biphase code) and, after amplification, are serially output via the output B , which is connected to the input A of the microcomputer. The coding stage 31 is clocked by an oscillator 32.

The same component is also used in the remote control, whereby the output signal is fed to the input C of the transmitter stage shown in Fig. 3b with the infrared LEDs 34/35. The transmitted and received pulses are amplified in a preamplifier 3, as can be seen from Fig. 1, and then read serially into the computer as a direct command value.

The following command list for keyboard input on the device is intended to illustrate the input commands and their coding.

command

No.

code
FEDCBA

Tasie

command

0 000000 1 00000 1 2 00001 0 3 0000 1 1 4 000100 5 000101 6 0001 1 0 7 0001 1 1 8th 001000 9 00 100 1 10 001010 11 001011 12 001100 13 001101 14 001110 15 001111 16 0 10000 17 0 1000 1 18 0 10010 19 0 10011

la Off Ib Phono Ic Tapes 1 ID Tapes 2 2a — Tuning ₍ 2 B + Tuning ' 2c Contour 2d Linear 3a + Bass 3b + Treble 3c R Balance 3d + Volume 4a —Bass 4b - Treble 4c L Balance 4d —Volume 5a FM 5b K 5c M 5d L

Search

Fortsc t/tower

command

No.

code

F i: 15 C B &Lgr; Button

command

20
21
22
23

24
25
2 B
27

28
29

32

48
49
50
51
52
53
54
55
56
57
58
59

0100 0101 0110 0111 1 000 OOl

0 1 10 10

01 10 1 1

011100 OUlOl

100000

0000 0001 0010 001 ' 0100 0101 0110 0 1 11 111000 111001 111010 111011

6a Program »1« 6b Program »2« 6c Program »3« 6d Program »4« 7a Program »5« 7b Program »6« 7c Program »7« 7d Program »8« 8a Program »9« 8b (Zero) ZERO »0« 81a Memory 85a Rumpel »One« 85b Scratch »On« 85c Mono 85d Muting »On« 86a Rumpel »Out« 86b Scratch »Off« 86c Stereo 86d Muting »Off« 87a Hand voting 87b Volume Low 87c comma 87d Decimal switch F

Fig.4 shows the alphanumeric display for the frequency setting, in which the multi-bit information is applied to each of the alphanumeric displays via an 8-bit data bus, but only the display that is activated via the address bus is changed, for which purpose an address decoder is connected downstream of the address bus, which controls the individual displays.

Fig. 5 shows a DA converter for a tone control, whereby the multi-bit information is applied to the information memory 7 via the data bus, provided that this is addressed via the address input D. The information memory directly connects a resistance matrix, at the output of which an analog voltage corresponding to the multi-bit information is applied, which is fed as a control variable to a differential amplifier 60, whereby the differential voltage is fed as a setting voltage to the analog controller 61.

The advantages offered by the invention lie in the linking and optimization of software within the computer with the hardware of the control and functional circuit. The device also allows the station to be selected in four different ways by making optimal use of the microcomputer's inputs:

1. Usual manual setting,

2. fast channel search,

3. Retrieving stored stations and

4. direct numerical frequency input,

because a PLL frequency synthesis circuit was chosen for tuning, which enables precise tuning and, for example, makes additional AFC circuits and the like superfluous from the outset. By arranging the control and function circuit according to the teaching of the invention, a microcomputer can be used economically to operate all device functions in a communications device, since standard digital ICs and no complex peripheral circuits can be used. Furthermore, all mechanical components are replaced by electronics, whereby only the keypad, which can also be designed as a sensor field, needs to be present.

When transferring the arrangement to television sets, it is only necessary to switch to a different divider ratio of the 40/41 or 16/17 prescaler; the other functions can be controlled in the same way.

5 sheets of drawings

Claims (16)

Patent claims: 1. Computer-controlled communications device, television, radio reception and hi-fi control device, with operating elements such as buttons, sensors and/or actuators arranged on the device and on a remote control transmitting wireless or wired signals, for controlling, switching on and changing over variable and fixed device functions, each operating element being connected via a matrix circuit to a coding circuit which encodes the command in a specific code and transmits it to a receiver circuit which stores the control command, converts it and switches it through to _electronic function controllers, characterized by the combination of the following features: 1. The coded commands from the local control and those demodulated by the remote control receiver have the same bit structures for the individual function controls. 2. The coding circuit (4) of the fixed control and the receiver circuit for the remote control are connected to the computer (5) via a single serial data bus. 3. The decoding of the binary coded instructions is carried out according to certain programs written into the computer. 4. The computer (5) outputs a 3&eegr; control command containing multi-bit information, which is fed via a data bus (6) to the information memories (7 a to 7 c, 13 a, 13 b, 15,16) (latch) of all function controllers. 5. The computer (5) sends multi-bit address information to an address decoder (9). 6. The addressed information memory (7 a to 7 c, 13 a, 13 b, 15, 16) is enabled by a control pulse (strobe pulse) via the address decoder (9) and a downstream address bus (10). 7. The information storage units (7 a to 7 c, 13 a, 13 b, 15, 16) are controlled exclusively via a Unibus. « 8. The activated information memory (7 a to 7 c, 13 a, 13 b, 15,16) stores the multi-bit setting information, which is retained until a new, different digital, addressed multi-bit information is present. 9. The respective multi-bit information stored in the information memories (7 a to 7 c, 13 a, 136, 15, 16) controls the associated electrical function controller directly or indirectly via digital-analog converters. 10. All multi-bit information is stored under the assigned addresses in a non-volatile, readable data memory (11) . 11. When the device is switched on, all information is read from the *>o data memory (11) by the computer (5) and written into the addressed information memories (7 a to 7 c, 13 a, 13 b, 15, 16). 65 2. Computer-controlled communications device according to claim 1, characterized in that both the commands issued by actuating the function keys or controls on the remote control (2) and the commands when actuating the control keys (1) on the device are each fed to a coding circuit (3, 4) of the same type via a matrix circuit, and that the signals encoded by the coding circuit of the remote control transmitter (2) are transmitted by wire or wirelessly by means of ultrasound or infrared light carriers, and that the received digital commands and the digital commands of the device-related control unit are read serially into a single input of the computer (5) via a common data line, the decoding of the encoded commands being carried out by the computer (5) according to certain written programs. 3. Computer-controlled telecommunications device according to claim 1 or 2, characterized in that after the multi-bit setting information has been stored in an addressed information memory (7a to 7c, 13a, 13ö, 15,16), the computer (5) calculates a numerical value corresponding to the set function and converts this into a code determined by predetermined programming of the computer (5) for the purpose of alphanumeric display and writes it via the data bus (6) into an information memory (13a, b) also addressed by the computer (5), which is connected to a display (LED display) which displays the entered multi-bit information numerically or alphanumerically, which is proportional to the value of the set function 4. Computer-controlled communications device according to one of the preceding claims, characterized in that the coding circuit is connected to a clocked transmitter stage which, when a function key is actuated to set a variable function (+ or -), repeatedly emits the coded command (word) at a specific rate, the number of individual words proportional to the actuation time corresponding to the analog value to be set, and that the words present during the actuation time are evaluated by the computer (5) as a setting value, and that the computer (5) emits calculated multi-bit information corresponding to the number of words present via the data bus (6) as setting information to the addressed information memories 5. Computer-controlled communications device according to claim 4, characterized in that each function key or each functional element is assigned an address identifier in the form of a binary code, which also forms the setting command. 6. Computer-controlled communications device according to one of the preceding claims in conjunction with an electronic station search with up and down nnrt AnAt r>h cypVpnnTpinhnf t HaR in _Oh , Computer (5) the waveband to be set is entered by pressing the corresponding function keys, that digital control commands are read into the computer (5) via free inputs by pressing further function keys (automatic search + or -) via a coding circuit (17), and that the computer (5) automatically generates pulses depending on the presence of the digital control command and transmits these after a certain program in a predetermined counting grid, and that the multi-bit information present at the output proportional to the counter reading is read via the data bus (6) into an addressed information memory (15, 16) of a PLL frequency synthesis circuit for setting the division ratios of a programmable divider (75. 76) of the circuit, and that the frequency of a voltage-controlled oscillator (71, 72) divided in the predetermined division ratio is compared in a manner known per se with a reference frequency in a phase comparison circuit (77), the DC voltage generated adjusting the voltage-controlled oscillator (71, 72) until the comparison frequencies are equal, and that when a transmitter worth receiving is found, the receiver circuit inputs a signal into the computer (5) depending on the transmitter level, which interrupts the search, and that only when a new digital control command the computer (5) triggers another search. 7. Computer-controlled communications device according to claim 6, characterized in that when a station search function key is continuously pressed and a station worth receiving is found, the computer (5) interrupts the internal clock count and automatically resumes it with a time delay. 8. Computer-controlled communications device according to claim 6 or 7, characterized in that during a search through all frequency ranges of the receiving device, the computer (5) switches the division ratio of a prescaler (74) connected upstream of the programmable divider (75, 76) of the frequency synthesis unit according to a predetermined program, and that the corresponding multi-bit information is written via the data bus (6) into an addressed information memory assigned to the prescaler (74). 9. Computer-controlled communications device according to claim 8 in conjunction with claim 3, characterized in that the multi-bit information which is read into the information memories (15, 16) of the frequency synthesis circuit (18) via the data bus (6) is stored and displayed in parallel or serially in addressed information memories of a numerical display (23). 10. Computer-controlled communications device according to claim 9, characterized in that the computer (5) transmits the last transmitted multi-bit information determining the division ratio of the programmable divider (75, 76) via the data bus (6) to the addressed information memory assigned to the display (23) according to a specific program after finding a transmitter capable of receiving the signal. 11. Computer-controlled telecommunications device according to one of claims 7, 8 and 9, characterized in that the station tuned by automatic tuning with the correspondingly displayed frequency is stored in a program memory (RAM) of the computer (5) by pressing special program keys, and that the stored frequency is read into the addressed information memories (15, 16) of the PLL frequency synthesis circuit (18) as multi-bit information by retrieval by means of program selection keys via the computer (5) and the data bus (6). 12. Computer-controlled communications device according to one of the preceding claims, characterized in that manual tuning is provided, which consists of a pulse transmitter (21) which, when the setting wheel (20) is actuated, emits a number of pulses corresponding to the rotation, which are read serially into the computer (5), counted and converted by the computer (5) into multi-bit information and read via the data bus (6) into the addressed information memories of the PLL frequency synthesis circuit (18). 13. Computer-controlled communications device according to claim 12, characterized in that the setting wheel consists of a perforated disk with holes or slots arranged on the circumference, below which two diodes are arranged offset by 90° from the perforated grid, which are illuminated by a light source arranged above the setting wheel, whereby the direction of rotation of the tuning wheel is signaled by the pulse sequence generated in the photodiodes, which is read serially into the free input of the computer (5), which outputs multi-bit information in accordance with the direction of rotation of the setting wheel determined by decoding, which is stored in the information memory of the PLL frequency synthesis circuit (18) and causes a change in the frequency in a positive or negative direction from the last stored one. 14. Computer, controlled communications device according to claim 13, characterized in that the computer is programmed for digital frequency input by pressing the function keys "Program selection" and "Reception range" and that the frequency to be set can be read into the computer (5) via an encoder using a ten-key keyboard and that the multi-bit information output is stored in the addressed information memories of the frequency synthesis circuit (18) and causes a change in the division ratios of the programmed frequency divider if the entered frequencies fall within the reception range that is selected and that an incorrect display occurs if the set frequency is outside the programmed reception range. 15. Computer-controlled telecommunications device according to one of the preceding claims, characterized in that the last set variable, optically or acoustically detectable function value is stored in the data memory (RAM) associated with the reception range and that when switching to another reception range this value remains stored and is set to the last set value when ^{the power} is switched on again. 16. Computer-controlled communications device according to one of the preceding claims, characterized in that the multi-bit information for the individually adjustable variable, optical and/or acoustic device functions is fed to a digital-analog converter, whose analog output information proportional to the set digital value determines the controlled function controller to the desired value. The invention relates to a computer-controlled communications device, television, radio reception and hi-fi control device, with operating elements, buttons, sensors and/or actuators arranged on the device and on a remote control that transmits wireless or wired signals for controlling, switching on and changing over variable and fixed device functions, each operating element being connected via a matrix circuit to a coding circuit that encodes the command in a specific code and transmits it to a receiver circuit that stores the control command, converts it and switches it through to electrical function controllers. In the trade magazine »Funkschau«, 1977, issue 17, pages 763 to 768, a television set is described in which all functions that can be set using a remote control are controlled by a microcomputer located in the television set. By pressing the buttons on the transmitter, different frequencies between 33.9 and 44.9 KHz are switched, each of which is assigned to a function (30 functions). The received frequencies are counted into 7-bit counters, the counter readings of which are queried by the microprocessor at a certain time interval and deleted after each query with a time delay by resetting the counters by the microcomputer. All remote control functions and the functions that can be controlled on the device itself, these are: power, program sequence selection, combined with automatic programming of the timer and the fine tuning controls for fine tuning of the selected station, are controlled by the microcomputer using an entered program. Two PSUs (Program Storage Units) are required as program memory. An electrically erasable memory, which is connected to the central processing unit (CPU) via an adaptation circuit, serves as memory for on/off, the switching commands, tuning voltage, fine tuning and range information for 19 programs as well as four analog values and four standardized analog values. The computer queries the counter readings of the receiver module of the infrared remote control and reads them into the program memory. At the same time, the display is controlled in multiplex mode for a second program memory unit. The television receives control signals from the microcomputer via the input and output of the first program memory, e.g. B. Area information, signals for AFC shutdown, etc. Parallel to the function control and numerical display, the data is stored in a data memory, which retains the data even when the device is switched off. The f>o variable setting values are controlled directly by the computer by feeding the control command to a D/A converter, which feeds the analog signals to the corresponding function controllers. In this well-known microcomputer-controlled device, the b5 microcomputer also serves as a timer, which can be programmed for a longer period of time for the functions of switching the device on and off. A major disadvantage of this computer-controlled device is that the input commands are repeatedly queried cyclically using the multiplex method. The query clock always generates interference frequencies within a broad frequency spectrum. This interference can only be eliminated with an economically unjustified effort to eliminate interference. The use of the control circuit in hi-fi devices or radio receivers of a general nature is therefore only possible to a limited extent or not at all. An infrared remote control system with pulse code modulation is known from the specialist magazine »Bauteile-Report« of Siemens AG, 14, 1976, issue 5, page 150, in which all commands from the remote control as well as those for operating the device are each sent to a transmitter, which converts the command into a 6-bit biphase code, with a start bit placed in front of the word, which allows the receiver to differentiate further. The advantages of this remote control, which no longer works purely on a frequency basis, are the higher information speed and the additional higher interference immunity through pulse code modulation in the biphase code. There is no interference from inflections, distortion noises and Doppler effects. Furthermore, higher transmitter peak power can be generated through intermittent operation. This remote control method therefore has significant advantages over the one mentioned in connection with the computer-controlled device mentioned above. As already mentioned, the transmitter modules used also allow parallel operation of the device, since the same output signals are generated for the same input commands. After electrical conversion, the infrared signals coming from the transmitter are fed into a selective bipolar preamplifier, where an initial interference signal suppression takes place. A command from the device's control unit can also be entered via a parallel input using a priority circuit. The receiver section has a program memory, via which fixed control variables can be called up, and an analog memory in which the analog values corresponding to the variable variables are stored and called up. The analog values present at the outputs are used to control the analog functions, e.g. volume, brightness, color saturation, etc. Another advantage of this infrared remote control system is that after the transmitter stage, i.e. also at the input of the receiver, binary-coded (in this special case: 6-bit biphase code) input signals with a start bit are present for the same functions from both the remote control and the device. However, the receiver module does not allow the various arithmetic operations that are necessary to control the possible multitude of functions to be added up. Based on this state of the art, the invention is based on the task of designing a computer-controlled communications device, e.g. a television, radio receiver or hi-fi device, according to the generic term of claim 1 in such a way that all device functions can be controlled both via the remote control and via the local control without all existing control inputs (parallel or serial) of the computer having to be occupied and that the logical linking of the control commands with the output variables to be controlled (fixed variables and variable variables) takes place via the computer,