DE2727369A1 - KILOWATT-HOUR METER WITH STOCHASTIC SIGNAL PROCESSING - Google Patents

Description

Eilowatt hour counter with stochastic signal processing

The invention relates to an electronic ELa- and / or high-phase energy meter with stochastic signal processing, which has a hultiplex input switch for the Spanmingen and the currents of the individual phases and a display device for the energy consumption and / or for the Has instantaneous performance.

To create an economical electronic three-phase current meter that meets the requirements for accuracy, reliability and service life, two measuring methods are available: The use of an analog-digital converter in Connection with a computer (z. B. according to patent application P 26 30 959-1) or a stochas ti see signal processing the input variables of current and voltage. As in the case of the known solution using a computer, the stochastic signal processing is characterized in that, after the analog input variables have been converted, the entire signal processing is carried out digitally. The following processing circuit parts are free of errors and drift and can be easily integrated into a large circuit, so that only the converter can contribute to a measurement error.

The invention is based on the object of creating a kilowatt hour meter with stochastic signal processing.

This object is achieved by the invention as it is presented in the characterizing parts of the patent claims.

In order to obtain such a stochastic kilowatt hour meter for three-phase networks, it was necessary to develop new methods for stochastic implementation and integration of the

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To create measurement results and to combine them with known digital signal processing devices. The essential Features of the invention are the non-linear stochastic implementation with the help of a digital multiplication process to control only one digital-to-analog converter, the use of a memory with an upstream adder as an integrator and a device for determining and displaying the instantaneous information.

The invention is explained in more detail with reference to the drawing, which consists of two figures. In it they show

1 shows the block diagram of a kilowatt hour meter with stochastic signal processing and the

2 shows the circuit arrangement of the analog-stochastic converter used.

As the clock or phase control of the electronic kilowatt hour meter is irrelevant for understanding the concept of the invention, this is only hinted at in the figures shown.

The kilowatt hour meter essentially consists of an input multiplexer HUZ, a noise generator RG, and a range determination device SRI, SR2, AD, a digital-to-analog converter DAV, a converter, a multiplier HOL, a mean value calculator VR and a display device AZ.

A large dynamic range of an energy meter can be reasonable can only be achieved with non-linear coding. The required small heat error, even with small input signals, requires that the variance around the zero point is minimal. For the same reason there must be offset voltage and offset current errors

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of the components connected to the input automatically be adjusted. As is well known, when the six input variables are sampled with a single-channel multiplexer MUX Time offset due to an interpolation or averaging method is compensated. In the present invention, it was necessary to find a method of compensation that would do that too works with non-linear coding of the input variables. From the function of the individual components of the kilowatt hour meter This procedure is clearly recognizable: The digital noise generator RG is used to convert the input variables a feedback shift register (patent application P 27 09 381.8), which has a digital-to-analog converter DAW Addressed serial farallel conversion. The output of the noise generator RG delivers digital noise words from z. B. seven bits. The converter characteristic consists of the positive and negative parts of the characteristic from z. B. eight sections, each in z. B. seven bits are stepped.

The digital noise generator RG supplies, for each scan, in addition to the 7 bits for grading the sub-areas, further z. B. 3 bits for the stochastic ^ selection of the eight areas of the converter characteristic. Since a product is formed from every two sample values, each of these values, however, in any one of the eight Areas may have been measured, the area must be saved for each scan and taken into account later when averaging will.

With this non-linear stochastic conversion, a number representation is made up of a mantissa (7-bit word) and an exponent (3 bit word) used. The exponents of the two values belonging to a product are added to give the exponent of the product to get. For this purpose, the 3 bits are cached SRI and once directly and once via three four-stage Shift register SR2 fed to a full adder AD,

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at its output the input to be controlled in the integrator with is identified by a 4-bit word. The memory SRi is connected as a shift register and delays the 3 bits by one Tact. The integrator VR has 15 areas or inputs, based on a conventional up / down counter, whereby its Structure from binary levels corresponds to the binary levels of the converter characteristic.

The eight areas of the converter characteristic, like the individual stages, must be selected with an evenly distributed frequency will.

A 15-bit digital-to-analog converter is used as the DAW digital-to-analog converter used with GMOS power switches, being indicative for the non-linear coding is that of the approx. 16,000 analog stages that the digital-to-analog converter could output, only about 1,000 steps actually used, d. H. addressed.

A multiplex-controlled comparator is used for positive and negative input signals, with an operational amplifier OP in a known circuit a reference voltage Uref, alternating in polarity, e.g. B. 10 V, into the digital-to-analog converter feeds. To keep the leakage currents small, the inputs of the GMOS analog switches are made by diodes on both sides bracketed against hatred. The smaller stages are designed with an H-2R network, otherwise the resistance values will be too high The associated analog switches are therefore designed as changeover contacts.

The analog switches are controlled by D flip-flops; This is necessary so that the control signals are constant, even for the time required for the arithmetic operation described below will be available:

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The turner seed line consists of eight sections, each section consisting of 128 steps. To any desired To select a specific stage in the entire characteristic curve, the range must first be specified and then the number the sub-level in the relevant area. No errors may occur at the seams between two areas; this is achieved by switching on the bit that corresponds to the end value of the previous range.

An essential feature of the invention is the combination of the 15-bit digital-to-analog converter with a binary shift multiplication, to ensure that the resolution decreases from small to large measured values, d. H. the smallest levels of the Digital-to-analog converters are only used in the lowest of the eight areas needed.

A shift register for the selection area SA of 15 bits in length, the first 7 are ^ß it parallel loadable, is loaded from the noise generator RG initially parallel with these 7 bits in the first stages. If there is no further arithmetic operation, these 7 bits are passed unchanged from the shift register BA via the buffer SF to the analog switches of the first 7 bits of the digital-to-analog converter DAW, so that one of the 128 levels of the lowest range is selected.

To get the second area, it is necessary to switch on the next 8th bit of the digital-to-analog converter; the The 1st bit can be omitted at the same time, since the resolution with the selected binary gradation of the converter characteristic is now reduced by 1 bit shall be. This is achieved by loading 7 bits + 1 offset bit into the first 8 bit levels of the Shift register whose content is shifted by 1 bit and zeros are loaded at the same time. The result is accordingly other areas, so that with the selected gradation 0 to 7 shifting cycles are required to cover the yarn area.

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The shift cycle required for this is generated by pressing the 3 Area bits are first recoded into 1 from 8-0ode in a binary / decimal decoder of the area control BS. The outputs of the decoder are connected to the parallel inputs of an assigned shift register. Depending on which When a one has been loaded into the shift register, 0 to 7 shift clocks are generated during serial shifting; around just as many bits are shifted in the area shift register BA then the 7 bits + 1 bit loaded there.

The analog-stochastic converter K (Fig. 1), its circuit arrangement shown in Fig. 2, consists of a two-stage comparator K1, K2. The first stage K1 is with an amplifier equipped, whose input stage contains field effect transistors, because of the large dynamic range to process very small currents are. The first stage K1 is clamped with two anti-parallel Schottky diodes DI, D2, and the second stage is K2 switched as a bracketed integrator.

The required accuracy can only be achieved if the offset voltage and offset current errors of the entire Comparator are regulated separately. The virtual zero point at the input of the analog-stochastic converter K (point DAV, Fig. 2) must be exactly on reference potential, otherwise the digital-to-analog converter would emit incorrect currents. There are therefore two zeroing phases are provided: In the first zeroing phase, all the analog switches of the digital-to-analog converter are turned off by resetting the upstream buffers SP (Fig. < switched off; the same happens with the input multiplexer MUX (FIG. 2) so that the comparator input is now open. Only if the offset current is exactly zero, the input of the comparator will remain unchanged in its potential; in the event of an offset current error a potential shift will occur at the output of the first stage K1. The possible error is signed

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correctly through an analog switch on a capacitor CI stored and fed back to the input of the comparator via a resistor R as a correction current. In the second Zeroing phase, the input is switched to reference potential via the input multiplexer; any error at the output of the comparator is again stored via an analog switch on a capacitor 02, which is connected to the second comparator input is connected and shifts its potential so that the zero point error is canceled. Both Loops are sampling controlled systems, so that after a certain settling time the errors can be reduced to arbitrarily small amounts are settled. The comparator can now only contribute errors due to thermal-dynamic effects.

The input multiplexer MUX consists of a GMOS analog switch for the input voltages converted into currents and from JFET analog switches for the input currents transformed via current transformers. A control meter with eight outputs selects the row according to the individual switches.

To form the continuous partial products necessary for the interpolation, first the three voltages and then the three currents are scanned, with additional zeroing phases being interposed. Two 4-bit shift registers SR3, SR4- are connected upstream of one input of the multiplier MUL, while the other input is fed directly from the comparator K and a D flip-flop. The flip-flop is necessary because one of the two comparator decisions made with each scan has to be buffered. If three voltage samples are first loaded into the four-stage shift register SR3, BBM-, followed by the three current samples and the second zeroing phase after a zeroing phase, then, as desired, e.g. _{B. at the moment when the value belonging to U R} appears at the shift register output, the value that has just been converted and belonging to Ip is simultaneously present at the other multiplier input. At the next multiplex clock appears on

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Shift register output Ug, while I _g is present at the other multiplier input, etc. When the current I _R appears at the shift register output, a new sample value for U _R is present at the other multiplier input. Each sample is therefore used twice, once before loading and once after leaving the shift register. This method can obviously be applied to any number of input quantities to be multiplied in pairs.

At the output of the actual analog / stochastic converter the up and down counting signals of the bipolar two-wire coding to disposal.

The averaging unit is usually used as an up / down counter executed, whereby in the present case one input would have to be provided for every 15 binary levels of the counter. Because such a Averaging with standard CMOS circuits only with an awkwardly large number of circuits can be implemented, an adder VR was constructed. It's made up of memory flip-flops to which full adders are assigned, as well as a control logic SL. The 15 inputs of the full adders are from EXNOR gates fed as a controlled amplifier / inverter. The one delivered by the input part of the device in the form of 4 · parallel bits Range information is provided by binary / deζimal decoders DC converted into a signal 1 out of 15. For subtraction, the complement is formed with the EXNOR gates, with each if the complement is formed, an additional 1 bit is inserted into the first stage of the adder VR.

The averaging unit MB also consists of a further four counting decades. The switchover of the counting direction of these last four decades takes place at the same time as the switchover of the EXNOR gates. This structure was chosen because a display of the instantaneous power with four-digit resolution is provided, which is not needed for an energy meter, by the

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but the test time can be shortened significantly, since the Can read instantaneous power directly and does not have to calculate it first from the energy display.

When operated as an energy meter, the four-decade CMOS counter counts the display unit AZ, the transfers from the averaging unit; it corresponds to the classic roller counter Ferraris meter.

When operated as an instantaneous power meter, an averaging time counter shows the count of the last four decades of the averaging unit with an auxiliary cycle backwards and forwards at the same time counted into the four-decade counter of the display and thus transferred there.

The input signal of the averaging unit is coded on two conductors and is converted into a clock signal by a gate arrangement and a counting direction switching signal is transformed.

All construction stages of the device with the exception of the comparator K and the resistor chain (R-2B network) of the digital-to-analog converter DAWs can be set up in any conventional large-scale digital circuit technology, with the use of analog scarf tern MOß techniques are preferable. According to the current one The state of the art can also be the resistor chain of the digital-to-analog converter in the form of Ni-Cr resistors on the circuit housed and aligned with the laser. Only the required fast comparators can be used do not directly implement integrated circuit technologies for digital circuits, d. H. not without additional process steps. The entire electronic three-phase meter can thus be integrated on a single large circuit, with the Resistors for the voltage inputs on a thick film or Thin film substrate can be accommodated together.

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Since both the voltage and the current inputs at the inputs of the multiplexer MUX "are clamped on both sides, is the electronic counter with appropriately high-voltage-proof dimensioning of the resistors "or current transformers against Voltage and current overloads are at least as safe as a Ferrari meter. The power consumption of the whole Counter is only a few mA when implemented in CMOS technology, so that the large circuit with a simple power supply unit without Transformer can be supplied.

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Claims (17)

HELIOWATT WERKE 1000 Berlin 12, June 6th, 1977 Elektrizitäts-Gesellschaft mbH Wilmersdorfer Str. 39 E 43 Go / sz 0577.29 Claims; Λ)} Electronic single and / or multi-phase energy meter with stochastic signal processing, which has a multiplex input switch for the voltages and currents of the individual phases and a display device for the energy consumption and / or for the instantaneous power, characterized in that the input signals (IR ... UT) as well as reference potential in a preselectable order to the input of a current comparator (K) are switched, the each egg τι input signal (IR. ..UT) twice with a comparison current from a digital-to-analog converter (DAW) when changing Polarity compares that the digital-to-analog converter is a 15-bit converter with an impressed reference voltage (Uref) that can be polarized and switched on by means of analog switches, that the digital-to-analog converter is made up of a pseudo-noise generator (RG) with a known per se feedback shift register is controlled that by means of a range control (BS) a non-linear, in several, e.g. B. eight ranges, stepped converter characteristic is generated for bipolar input variables and the further signal processing taking into account the non-linear converter characteristic is done in such a way that for each converted sample of an input signal, a certain range is stored that the range information from two samples to be multiplied is added and the averaging (MB) are supplied and the sampling and conversion of the six input signals (IR ... UT) is carried out in a multi-phase energy meter in such a way that, for. B. first the three voltages (UR, US, UT) are implemented, then z. B. a zeroing phase in which the 008881/0111 .2- ORlQlNAL INSPECTED The offset voltage error of the! Comparator (K) is determined and is regulated, follows, then z. B. the three streams (IH, IS, IT) are scanned and implemented, then z. B. this is followed by a zeroing phase in which the offset current error of the comparator (K) is determined and corrected Samples from a multiplier (MUL) for bipolar two-wire coding with an upstream shift register (SR3, SR4-) which are linked to one another in such a way that that they always contain the results of the previous four scans, thus continuously products of the individual Voltages and associated currents are generated in such a way that each sample value is used twice, and that the two-wire output signal of the multiplier (MUL) is fed to the averaging device (MB) whose Carries in an electronic cumulative totalizing counter indicate the energy consumption. 2) Electronic single and / or multi-phase energy meter according to claim 1, characterized in that the digital-to-analog converter (DAV) consists of nine binary graded evaluation resistors and a six-stage R-2R network with associated, at the input on both sides clamped to ground Analog switches exist, for the z. B. junction field effect transistors are used or which are designed as CMOS analog switches. 3) Electronic single and / or multi-phase energy meter according to claim 1, characterized in that to generate a non-linear converter characteristic with each multiplex clock of the house generator (RG) m bits (z. B. ten) taken in parallel, of which η bit (z. B. seven) are given in the lowest η stages of the shift register of the range control and then the η bits are shifted by as many bits with zero values in the shift register as indicated by the mn bits of the total of m bits. 809881/0161 4) Electronic single and / or multi-phase energy meter according to claim 1, characterized in that the comparator (K, Pig. 1) as a two-stage current comparator (K1, K2, Fig. 2) is executed, the first stage (K1) used field effect transistors in the input and on both sides with Schottky diodes (DI, D2) is in brackets and that the second stage (K2) is connected as an integrator bracketed on both sides. 5) Electronic single and / or multi-phase energy meter according to claim 1 and 2, characterized in that in one first zeroing phase the comparator input is connected to the reference potential via the multiplexer (MUX) during this Phase no further processing of the comparator output signal takes place, but that its value is approximately zero different output signal charges a capacitor (Oi, Fig. 2) to a compensation voltage via a controlled analog switch, which is fed to the second comparator input, causes the virtual zero point at the comparator input to be exactly on the reference potential. 6) Electronic single and / or multi-phase energy meter according to claim 1, 2 and 5 »characterized in that in one second zeroing phase the input of the comparator (K1, K2, Fig. 2) is enabled and the output of the first Stage (K1) stores a compensation voltage on a capacitor (02) via a controlled analog switch and that a current proportional to this voltage is passed to the input of the comparator (K1). 7) Electronic single and / or multi-phase energy meter according to claim Λ , characterized in that a reference voltage source (Uref) is used to feed the digital-to-analog converter (DAW), the sign of which is electronically without influencing the amount via a counter-coupled operational amplifier the gain factor unity is switchable. 809881/0161 8) Electronic single and / or multi-phase energy meter according to claim 1, characterized in that a full adder with complement generator and as averaging device (MB) a z. B. Four-decade forward-Z-backward counting chain is used and that the counter carry-overs are added up for the energy measurement. 9) Electronic single and / or multi-phase energy meter according to Claim 1 and 8, characterized in that for the purpose of measuring the instantaneous power, the content of the highest four decades of the mean value generator (MB) counted backwards after a specified averaging time and thereby is simultaneously counted into a four-decade forward counter for the display device (AZ). 10) Electronic single and / or multi-phase energy meter according to Claim 1, characterized in that the inputs of the Multiplexers (MUZ) are clamped against ground on both sides and thus protected against overloads. 11) Electronic single and / or multi-phase energy meter according to claim 1, characterized in that the outputs of the Current transformers are clamped to ground on both sides and that a changeover switch is used which either switches the output of a current transformer to the comparator (K) or on Mass lays. 12) Electronic single and / or multi-phase energy meter after Claim 1 to 10, characterized in that the entire electronic energy meter with the exception of the series resistors for the voltage inputs, the current transformers and the Display and power supply integrated on a single large circuit (e.g. an I * L large circuit) where the resistances of the digital-to-analog converter (DAV) are adjusted to their setpoints by laser trimming and the comparator (K) consists of an analog amplifier built with FMOS or HMOS transistors. • 09881/0161 13) Electronic single and / or multi-phase energy meter according to claim 1 to 12, characterized in that the for the Integration and control of the processes required reference frequency via a controllable oscillator (e.g. PCL ·) integrated on the circuit from the mains frequency is derived. 14) Electronic single and / or multi-phase energy meter according to Claim 1 to 13 «characterized in that the large circuit contains an integrated non-volatile memory in which the information about the energy consumed remains stored in the event of a network failure. 15) Electronic single and / or multi-phase energy meter according to claim 1 to 14, characterized in that ait exception the current transformer and the power supply of the entire electronic meter in hybrid technology on a thick film substrate is constructed, d. H. including the series resistors for the voltage inputs and including the display. 16) Electronic single and / or multi-phase energy meter according to claim 1 to 15 *, characterized in that the electronic meter on the existing display either the Energy consumption or the current power. 17) Electronic single and / or multi-phase energy meter according to claim 1 to 16, characterized in that the electronic meter alternates in a predetermined rhythm shows the energy consumption and the current output. • 09881/0101