DE2701612A1 - Rectangular pulse forming circuit - uses programmed unijunction transistor with its control electrode connected via resistor to reference voltage - Google Patents

Abstract

The pulse former supplies a rectangular output voltage in response to an applied input, and employs a programmed unijunction transistor (PUT1) across which the latter is applied. The control electrode (G) of the unijunction transistor (PUT1) is coupled via a resistor (R2) to a reference voltage (Vcc) and also delivers the rectangular output voltage. A current limiting resistor (R1) is connected in the anode circuit of the unijunction transistor (PUT1) and a capacitor (C1) is connected in parallel with its anode-cathode path. A buffer (10) may be connected between the control electrode (G) of the unijunction transistor (PUT1) and the output terminal (16).

Description

Pulse shaper

The invention relates to a pulse shaper for forming a rectangular shape Output voltage from an applied input voltage.

. In many electronic systems clock signals are required, to time control and synchronize the individual components of the system. These clock pulses can, for example, be obtained from a power supply system which supplies a sinusoidal alternating voltage. Here, however, the Clock pulses have a rectangular shape as far as possible to the controlled components of the To switch the system at defined times.

A known circuit arrangement is used for the purpose of conversion a sinusoidal input voltage into a square-wave output voltage CMOS inverter. However, such a CMOS inverter has a relatively low hysteresis and therefore a certain sensitivity to higher-frequency interference.

Furthermore, instantaneous voltage peaks of several 100 V, the the sinusoidal voltage are superimposed, destroy the CMOS inverter. To prevent this, In the known case, a complex protective circuit must be used.

It is the object of the present invention to provide a pulse shaper indicate, which has a simple structure and due to a pronounced hysteresis has sufficient immunity to interference. The solution to this problem succeeds according to the invention characterized in claim 1. Further advantageous refinements the invention can be inferred from the subclaims.

Based on one shown in the figures of the accompanying drawing Exemplary embodiments of the invention are explained in more detail below. Show it: FIG. 1 shows the circuit arrangement of the pulse shaper according to the invention and FIG. 2 a representation of the voltage curve at different points of the circuit arrangement according to Figure 1.

According to Figure 1, the pulse shaper consists of a programmable Unijunction transistor PUT 1, made up of resistors R1 and R2, a capacitor C1 and a buffer 10. An AC voltage signal is applied to an input terminal 12 and a reference voltage Vcc is connected to another circuit terminal 14.

The square-wave output signal is applied to an output terminal 16 removed.

The resistor R1 lies between the input terminal 12 and the anode A of the unijunction transistor PUT 1 and is used to limit the current to one maximum permissible value. The capacitor C1 is the anode-cathode path of the Unijunction transistor PUT1. connected in parallel. The resistor R1 and the capacitor C1 together form an RC filter, which reduces voltage peaks from the sinusoidal voltage filters out. The time constant of the filter formed by R1 and C1 is dimensioned in such a way that that, higher-frequency voltage peaks can be filtered out without any significant Phase shift of the sinusoidal voltage occurs.

The resistor R2 is between the connection terminal 14 and the control electrode G switched. The reference voltage Vcc applied to the terminal 14 is like this to be dimensioned so that they are at most two thirds of the apex amplitude of the sinusoidal AC voltage reached.

The buffer device 10 is between the control electrode G and the Output terminal 16 arranged. The pager 10 can be made by any circuit which is able to output the square-wave output voltage to the Control electrode G to be delivered in a form that is used for downstream, through clock pulses applied, circuits is suitable. With a suitable selection of the reference voltage Vcc it is possible in some cases to dispense with the buffer device 10, especially if the downstream circuits are CMOS circuits acts. In the case of downstream TTL logic circuits, the referring device is 10 required and can consist of a CMOS inverter, a comparator, a Schmitt trigger or any other suitable device for driving TTL logic circuits exist.

The programmable unijunction transistor PUT has the following Properties: As long as the anode voltage is lower than the voltage at the control electrode and has a positive value with respect to the cathode voltage, is the flowing anode current very low. If the anode voltage exceeds the control elec-.

trode voltage and this by a certain threshold voltage typically: exceeds 0.7 V, the unijunction transistor PUT ignites 1. The unijunction transistor PUT1 then draws as much anode current as required is to keep the anode voltage at about 1 V above the cathode voltage. For this reason, it is therefore necessary that the anode current through a suitable Limiting device is limited to a value in terms of the unijunction transistor PUT1 cannot cause any destruction. If the Unijunction transistor PUT1 is triggered, the control electrode current also increases momentarily by a few a few A to a number of mn.

In the ignited state, the unijunction transistor PUT1 remains conductive until the anode current drops below a holding current, which is typically about s pA is. If this value is not reached, the unijuction Trallsistor PUTl into the locked state. The anode voltage can then be set to a value between Zero and the control electrode voltage jump.

When the anode voltage has a negative value with respect to the cathode occupies, the unijunction transistor PUT: 1 remains like this.

long in the locked state, as the negative voltage is not the breakdown voltage of the conductor element exceeds.

This negative breakdown voltage, based on the cathode voltage, is typically around 30 V.

In Figure 2, the sinusoidal input voltage is at the input terminal 12, the voltage at the anode A and the voltage at the control electrode G are shown. At the beginning of the sinusoidal oscillation, the anode voltage is lower than the control electrode voltage. The anode current and the control electrode current are therefore very small. As the control electrode current is very low, there is a negligible voltage drop across the resistor R2 and the voltage on the control electrode G is essentially equal to the reference voltage Vcc specified.

When the anode voltage is the reference voltage Vcc plus the threshold voltage Vth of approximately 0.7 V reaches the unijunction transistor PUTi. Of the The anode current increases until the voltage drop across the resistor R1 is sufficient to reduce the anode voltage to approximately 1T. The control electrode current also increases and causes a voltage drop across resistor R2, whereby the voltage on the control electrode G is reduced to approximately 1V.

When the input voltage drops to a value through which the anode current is reduced to a value less than the holding current, the unijunction transistor arrives PUT 1 in the non-conductive state. For typical programmable unijunction transistors the holding current is approximately 50 tlA.

The input voltage assigned to this holding current is considerable below the reference voltage Vcc. For this reason, the circuit according to FIG 1 shows a certain insensitivity to hysteresis and interference.

When the input voltage is below that required for generating the holding current If the required value falls, the unijunction transistor PUT 1 and the control electrode current are blocked drops to a very low value. The control electrode voltage switches here momentarily to the reference voltage Vcc. This state prevails throughout negative half-wave of the sinusoidal alternating voltage and is only ended when when the anode voltage is again the reference voltage Vcc plus the threshold voltage Vth reached.

In a preferred embodiment of the present invention the reference voltage Vcc is 5 V. The alternating voltage applied to the input has an RMS value of 8V and a peak value of 12 V at one frequency from 60 llz.

The resistance of R1 has a value of 4.7K 2. which makes the maximum in the anode circuit of the unijunction transistor PUT1.

flowing current is limited to a safe value. The condenser C1 is selected so that, together with the resistor R1 for the RC element gives a time constant of approximately 500 ps. This creates momentary peaks filtered out within the sinusoidal alternating voltage without any significant Phase shift is caused in terms of the 60 Hz sinusoidal voltage.

In the present embodiment, in which the reference voltage Vcc has a value of 5 V, has the rectangular one Output voltage at the control electrode of the transistor PUT1 the appropriate voltage levels to CMOS logic circuits to be controlled directly. A buffer device 10 can therefore be omitted if it The circuits controlled by the pulse shaper are CMOS circuits acts. In the case of TTL logic circuits, however, the minimum control electrode voltage is of 1 V above the threshold value for the value "o" in TTL logic circuits. A buffer facility 10 is therefore required and can preferably be in the form of a CMOS circuit arrangement, such as for example a CMOS inverter.

In the present exemplary embodiment, this amounts to a holding current of approx. 50 pA assigned input voltage approx. 1 V.

This results in a hysteresis or insensitivity to interference of approximately 4 V.

In summary, it can be stated that the inventive Pulse shaper due to simple construction, low cost, immunity to interference and relative Insensitivity to voltage fluctuations or peaks in the sinusoidal Input voltage. An instantaneous voltage spike of several 100 V, which is superimposed on the sinusoidal input voltage, can in the worst case Ignite unijunction transistor PUT1 prematurely. Destruction of the switching element however, it is not caused by this.

For those skilled in the art it is obvious that certain modifications of the Circuit are possible without departing from the scope of the invention. Even though the circuit arrangement with a programmable unijunction transistor is described it should be noted that other switching devices that have the same properties such as a programmable unijunction transistor can be used. For example, the analogue made up of two transistors for the unijunction transistor Find use, where such an analog switching element by the designation "programmable unijunction transistor" is intended to be included.

Claims (6)

Claims / \ -1.) Pulse shaper to form a rectangular shape Output voltage from an applied input voltage, g e k e n n -z e i c h n e t d u r c h a programmable unijunction transistor (PUT1), via its Anode-cathode path the input voltage is applied and its control electrode is connected to a reference voltage (Vcc) via a resistor (R2) and at the same time supplies the square-wave output voltage. 2. Pulse shaper according to claim 1, d a d u r c h g e k e n n -z e i c h n e t that there is a current limiting resistor in the anode circuit of the unijunction transistor (PUT1) (R1) is arranged. 3. Pulse shaper according to claim 2, d a d u r c h g e k e n n -z e i c h n e t that the anode-cathode path of the unijunction transistor (PUT1) a Capacitor (C1) is connected in parallel. 4. Pulse shaper according to claim 3, d a d u r c h g e k e n n -z e i c h n e t that between the control electrode (G) of the unijunction transistor (PUT1) and an output terminal (16) is connected to a buffer (10). 5. Pulse shaper according to claim 3, d a d u r c h g e k e n n -z e i c h n e t that the time constant of the current limiting resistor (R1) and the capacitor (C1) formed filter is dimensioned so that on the one hand higher frequency Disruptions filtered out and on the other hand the phase of the input voltage is shifted only insignificantly will. 6. Pulse shaper according to claim 4, g e k e n n z e i c h n e t d u r c h a CMOS inverter as a buffer (10).