DE2650768A1 - ELECTRONIC CLOCK - Google Patents

Description

DIPL.-PHYS. F. FINALLY D-8034 Unterpfaffenhofen

PATENT ADVOCATE - post office box _S / _si

lT CHONCHEN, 84 36 38

TELEGRAM ADDRESS: _{PATENDUCH MÜNCHEN} CABLE ADDRESS: DIPL.-PHYS. F. FINALLY. D - UNTERPFAFFENHOFEN. P.O. BOX

TELEX: 52 173O

My file: B-4079

Kabushiki Kaisha Daini Seikosha Tokyo, Japan

Electronic clock

The invention "relates to an electronic watch according to the preamble of the main claim.

Electronic timepieces generally include a timing circuit and one Display unit which shows the time depending on the output of the timing circuit represents. The timing circuit has due to the port developments technology and the use of integrated circuits achieved small orders of magnitude, creating more space became available so that more electronic circuitry could be used inside such a watch. So it was already suggested, by using this additional space, not only the time in your own country, but also a different time To measure time independently in a watch; a device for displaying the time of a predetermined range is used for this purpose or country, which is very convenient and convenient for the user of the watch

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is useful. On the other hand, it is desirable for such an electronic watch to have a 12-hour display for displaying the Having time in your own country, whereas a 24-hour display Desired for the time display of a "particular region or country and it is not necessary to differentiate between morning and afternoon or morning and evening. if However, such a clock should measure two different times independently of each other and the time counted separately is to be displayed, it may be necessary to make the numbers or figures to be displayed on the clock face small, so that not only can reading the time become difficult, but it can also lead to errors in reading. About that In addition, different results arise in the manufacture and in the assembly due to a complicated design of the display unit Problems.

The invention is based on the object of creating an electronic clock which has a first time counter for a 12-hour measuring function and a second time counter for a 24-hour measuring function which has the stated disadvantages and difficulties avoids. According to the invention, this object is achieved by the subject matter of the main claim.

In the clock according to the invention, for example, the time of one's own country is determined by a first counter and the time Region or country measured by a second meter; the content of the time counter is shown by the display unit selectively displayed, i.e. one counter content is selectively displayed in each case. The electronic watch according to the invention includes thus two time counters, whereby the content of the two counters can be displayed selectively and with a different one Time measurement can be carried out independently of one another.

In the following, preferred embodiments of the invention are described to explain further features with reference to drawings. Show it:

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Fig. 1 is a block diagram showing the structure of an electronic watch according to the invention,

Fig. 2 shows a circuit of a specific embodiment for a 24-hour counter that counts the second time counter according to FIG. 1 represents

3 shows a time chart for explaining the operation of the 24-hour counter according to Fig. 2,

Fig. 4 shows a circuit of a special display selection circuit which can be used in the circuit according to FIG. 1,

Fig. 5 is a time chart for explaining the operation of the display selection circuit according to Fig. 4 »and

FIG. 6 is a circuit diagram showing a specific example of the gate circuit used in FIG.

Fig. 1 shows a block diagram of an electronic watch according to the invention. Denoted at 1 is an oscillator circuit using a solid-state vibrating element. The output signal of the oscillator circuit 1 is divided down to the normal or standard frequency signal, which can be, for example, a 1 Hz signal and is used as a normal signal for time measurement; the frequency divider circuit is denoted by 2 and consists of several frequency dividing stages. The normal signal of the frequency divider circuit 2 is fed to a first time counter 3, which consists of a second counter 4 »a minute counter 5 and an hour counter; the counter 4 forms a 60 counter and consists of up to 10 counters, the counter 5 also forms a 60 counter and consists of six to 10 counters. In addition, the output signal of the frequency divider circuit 2 is fed to a second time counter 7, which also consists of a seconds counter 8, a minute counter 9 ^and an hour counter 10, the seconds counter 8 being a counter that counts up to 60 and

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consists of six counters ", the minute counter 9 consists of six to 10 counting counters ". In contrast to the hour counter 6, the counts up to 12, the hour counter counts 10 to 24. The time adjustment or time setting is made possible by a time adjustment and Timing circuit 11 performed independently with respect to the first and second time counters 3 and 7, respectively. The content of the seconds counter is fed to a gate circuit 12 in BCD code, and the counter 4 'supplies a carrier signal to the minute counter 5 · Der The content of the minute counter 5 is in the BCD code of a gate circuit 11 fed? in addition, the counter 5 supplies a carrier signal to the hour counter 6. The content of the hour counter 6 is fed to a gate circuit I4.

The output from the second counter 8 of the second time counter 7 Content in the BCD code is fed to the gate circuit 12; in addition, a carrier signal is fed to the minute counter 9 from the counter 8. The minute counter 9 on the one hand gives its output as a BCD code to the gate circuit I3 and on the other hand a · carrier signal to the Hour counter 10. The content of the hour counter 10 is fed to gate 14.

The gate circuit 12 selects a specified data value from each second counter 4-8 of the first and second timers 3 »7 receives, in accordance with the selection signal of a display selection circuit 15» which will be explained below} the The selected data value is fed to a decoder and control circuit 16. The gate circuit 13 selects one of the counter contents from them by the two minute counters 5 and 9 of the first and receives second timers 3 and 7, respectively the mentioned selection signal and leads this content to the decoder U. control circuit 16.

The Gattar circuit 14 dial \ Similarly, one of the counter contents of the hour counter 6 and 10 and supplies this information to the decoder and control circuit 16. The counter contents of the first and second time counter 3 and 7 »which selectively the decoder and control circuit 16 are fed into a suitable

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Wise coded signal recoded for the time display, the time display being carried out by the display unit 17; this recoded Signal is amplified in predetermined! Dimension of the display unit 17 supplied. Me display unit thus represents the from the respective Time taken from the counter.

Fig. 2 is a circuit diagram of an example of a 24 hour counting hour counter 10 for the second time counter 7 shown in Fig. 1; the hour counter 10 contains six flip-flop circuits 18 to 23. The carrier signal, which is a time pulse, is sent from the minute counter 9 (Fig. 1) to the clock input C and C _{2 of} the flip-flops 18, 20 and applied to an input of a NOR circuit 28. The output (L _{o of} the flip-flop 18 is on

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one input of a NOR circuit 24 with two inputs is connected, the output of which is connected to the data input D _{1 ft of} the flip-flop 18; in addition, the output Q _{40 is} connected to a terminal 10A

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tied together. The inverted output (L _o is connected to the clock input C. _{n of} the flip-flop I9 and to one input of a NOR circuit 25 with two inputs, the output of the NOR circuit 25 being connected to the data input Dp _{0 of} the flip-flop Flops 20. The output Q. of the flip-flop 19 is connected to a connection or output 10B, while the inverted output Q._ is connected to the input D _1Q and to one input of the HOR circuit 25 Q _{20 of} the flip-flop 20 is connected to the second input of the NOR circuit 24 and to a terminal 10C, while the inverted output Q _{20 of} the flip-flop 20 is connected to the clock input C _{20 of} the flip-flop 21 and to an input of a NOR circuit 26 is applied.

The output Q _{21 of} the flip-flop 21 is connected to a terminal 10D, while the inverted output Q ". to input D_. of the flip-flop 21 and to the clock input C _{22 of} the flip-flop 22 is connected. The output Q _{22 of} the flip-flop 22 is connected to a terminal 10B, while the output Q _{22 of} the flip-flop 22 is connected to the clock input C _{2 of} the flip-flop 23 on the one hand and the input D _{22 of} the flip-flop on the other hand .

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The output Q _{2 of} the flip-flop 23 is connected to a terminal 10F, and the inverted output Qpjn is connected to the input D "of the flip-flop 23 and to the second input of the NOR circuit 26.

The output of the NOR circuit 26 is connected to an input of a NOR circuit 27 connected, which has two inputs and its output is applied to one input of a NOR circuit 28. The output of the NOR circuit 28 is connected to one input of the NOR circuit 27 connected and is also available with each reset input R of the flip-flops 18 to 23 in connection. The exit each flip-flop 18 to 23 changes at the point in time which a signal is applied to the respective clock input.

The mode of operation of the 24-hour counter 10 with the structure explained is described below with reference to the signal curve according to FIG. 3. To differentiate between the signals and the associated circuit parts, the signals in FIG. 3 are provided with the additional letter "a". The voltage signals identified in this way relate to the relevant circuit element; $ & denotes the carrier signal with a cycle duration of 1 hour and a pulse width of 0.5 seconds, which occurs at the output of the minute counter 9.

Before the occurrence of the first pulse of the carrier signal, which is emitted by the minute counter 9, ie after 0 o'clock and before 1 o'clock, the flip-flops 18 and 20 provide output signals with the logical value "0" and the output of the NOR- Circuit 24 »which is led to input DQ of flip-flop 18 corresponds to the logic value" 1 ". Thus, when the first pulse is output from the minute counter 9, the output of the flip-flop 18 changes to "1" and the inverted output thus changes to ¹¹ O. "Due to these changes, the output of the NOR circuit changes Since the inverted output of the flip-flop 19 assumes the value “1” at the time of the occurrence of the pulse from the minute counter 9, the output of the NOR circuit 25 is “0” Flip-flops 20 at the value "0", even if the mentioned pulse is supplied or occurs

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When the second pulse is emitted by the minute counter 9, changes the output of the flip-flop 18 is "0", since the output of the NOR circuit 24 supplies the signal "O", whereby the inverted Output changes to "1". Due to this change in the inverted output CL _ of the flip-flop 18 changes from "0" to "1"

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the output of the flip-flop 19 is "1", since its inverted output is "1". The inverted output thus changes from "1" to "0". On the other hand, since the input D _{? N} generates the signal "0" at the time of the application of the second pulse, ie the output of the NOR circuit 25, the output of the flip-flop 20 remains at the value "0".

When the third pulse is output from the minute counter 9, the output of the flip-flop 18 changes to "1" and the output of the NOR circuit 24 changes to "0". At this point in time, the signal at the input D " _{n of} the flip-flop 20, ie the output signal of the NOR circuit 25 changes to" 1 "; the output of the flip-flop 20, however, does not change.

When the fourth pulse is emitted by the minute counter 9, changes the output of the flip-flop 18 changes to "0" and the inverted output changes to "1". Due to these changes results at the output of the flip-flop 19 the value "0" and at the output of the flip-flop 20 the value "0" for the first time.

When the fifth pulse is emitted by the minute counter 9, changes the output of the flip-flop 20 changes to "0", while the output of the flip-flop 18 and I9 does not change. Hence changes the inverted output of the flip-flop 20 at this time from "0" to "1"; this change results at the output of the flip-flop 21 instead of the value "0" the first time the vert "1".

From the sixth to the twenty-third pulse of the minute counter the above-described effects are repeated in the flip-flops 18 to 20 and the output of the flip-flop 21 changes visually

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visible when the inverted output of flip-flop 20 changes from ¹¹ O "to" 1 "; the output of flip-flop 20 changes immediately when the inverted output of flip-flop 21 changes from" 0 "to" 1 " In addition, the output of the flip-flop 25 changes at the moment when the inverted output of the flip-flop 23 changes from "0" to "1". The state of the output signals of the flip-flops 18 to 21 between The time at which the twenty-third pulse of the minute counter 9 is applied and the time at which the twenty-fourth pulse occurs is thus such that the output of the flip-flop 18 has the value "1", the output of the flip-flop I9 supplies the value "1" and the output of the flip-flop 20 supplies the value "0", while the outputs of the flip-flop 21 and 22 have the value "0" and the output of the flip-flop 23 has the value "1"; the output of the NOR circuit 24 supplies the value "0" and the output of the NOR circuit 25 supplies the value "1." The output of the NOR circuit g 26, to which the inverted output of the flip-flop 20 and the inverted output of the flip-flop 25 are applied, supplies the value "0" and the output of the NOR circuit 28 supplies the value "0", whereby the NOR- Circuit 28, the output of NOR circuit 27 and the pulse of counter 5 are applied.

Although the inverted output of the flip-flop 20 changes to "0" when the twenty-fourth pulse from the counter 9 is output becomes, the output of the NOR circuit 26 changes to "1" because the inverted output of the flip-flop 23 remains "0"; thus changes the output of the NOR circuit 27 becomes "0". The output of the NOR circuit 28 becomes "1" at the same time when the twenty-fourth Pulse is terminated, i.e. at the point in time at which the twenty-fourth pulse falls and this output sets the flip-flops 18 to 23 return. The output of the NOR circuit 28, which resets each flip-flop 18 to 23, changes to "0", when the next pulse, i.e. the twenty-fifth pulse, begins and the resetting of the flip-flops 18 to 23 is interrupted. The subsequent functions or signals represent a repetition of the processes described.

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The 24-hour measurement is carried out in that the outputs of the flip-flops 18 Ms 21 and thus the counter contents for the units the number of hours from the outputs 1OA to 1OD, as well as the outputs of the flip-flops 22 and 23, i.e. the specified data for the tens digit of the hour digit are supplied from the outputs 10E and 1OF. The output from flip-flops 18 to 23, The specified data are generally not available in BCD code; the change of this specified data e.g. in the Display signal for seven segments for the purpose of display can thus be easily carried out.

4 shows a circuit diagram of an example of the display selection circuit 15 according to FIG. The connection 29A of the switch 29 is connected to a high voltage connection 30 of the supply source and the other connection 29B is connected to the clock input C ^ _{2 of} the flip-flop 32 via a circuit 31 for preventing switch bouncing. The output Q of the flip-flop 32 is connected to the first input 15-6 of the selection circuit I5 and the inverted output Q, ₂ is connected to the second terminal 15B of this selection circuit.

Referring to the timing diagram in Fig. 5, the operation a selection circuit 15 having the structure explained. In Fig. 5 with the additional letter "a" are the voltage signals the corresponding components (without the addition "a") the circuit of FIG.

If the output of the flip-flop 32 at the time of applying electric power to all of the measuring circuits including the display selection circuit 15 ¹¹ ″, the switching signal is generated by operating the switch 29, and this switching signal, which does not include contact bounce, is generated by the waveform 31a is output by the circuit 31. With this switching signal, the flip-flop 32 executes a binary operation

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Switching signal, the output of the flip-flop 3 ^{2 changes} to "1" and the associated inverted output signal changes to "0". The output of the flip-flop 32 changes to "0" as a result of the next switching signal and thus the output signal which is inverted to it changes to "1". In this way, due to the actuation of the switch 29, signals with reciprocal, different logical values appear at the outputs I5A and I5B of the circuit 15 and these two kinds of signals are the gate circuits 12 to I4 as display selection signals, ie as signals created to control the display.

FIG. 6 is a circuit diagram of a particular embodiment of FIG Gate circuit 12 in FIG. 1, the input being designated by 12A and 12B and being connected to the corresponding outputs I5A and I5B of the Circuit I5 according to FIG. 4 is connected.

The input 1ZA is connected to the input side of an inverter 33 with the control or gate electrode on the N-channel side of seven Transmission gates 34 *> is 40 connected; the output of the Inverter 33 is connected to the gate electrode on the P-channel side of the Transmission gate connected.

The input 12B is connected to the input of an inverter 4I and with the gate electrode on the N-channel side of seven transmission gates 42 to 48 in connection. The output side of the inverter is connected to the gate electrode on the P-channel side of the transmission gates 42 to 48. Each input of the transmission gates 34 to 40 is connected to those inputs (7 bits) which supply the counter content of the seconds counter 4 according to FIG. Each input of the transmission gates 42 to 48 is with those Connections (7 bits) connected, which supply the counter content of the seconds counter 8 according to FIG.

The outputs of transmission gates 34 and 42 are to the output 12C of the gate circuit 12, the outputs of the transmission gates

35 and 43 to output 12D, the outputs of the transmission gates

36 and 44 to output 12E, the outputs of the transmission gates

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37 and 45 to output 12F, the outputs of the transmission gates

38 and 46 to output 12G, the outputs of the transmission gates

39 and 47 are connected to output 12H and the outputs of transmission gates 40 and 48 are connected to output 121.

When the selected signal "1" is applied to the input terminal 12A and the signal "0" is applied to the input terminal 12B, the transmission gates become the transmission gates 34 to 40 switched to the ON state and transmitted the counter content of the seconds counter 4 to the outputs 12C to 121; if on the other hand the selected signal "0" at the input 12A and the selected signal "1" is applied to input terminal 12B are, the transmission measures 34 to 40 become in the OFF state spent and the transmission gates 42 to 48 arrive to the ON state, so that the contents of the second counter 8 are transmitted through the transmission gates 42 to 48 to the outputs 12C to 121 will. Since the selected by the selection circuit 15 shown in FIG Signal is applied to inputs 12A and 12B, the two will Contents of counters 4 and 8 are not transferred to outputs 12C to 121 at the same time. The structure of the gate circuit I3 according to Fig. 1 is the same as that of the gate circuit 12, while gate circuit I4 is similar to gate circuit 12, the number of transmission gates corresponding to the number of output bits of hour counters 6 and 10.

Since the electronic clock according to the invention has a first time counter for a 12-hour measuring function and a second time counter 7 for has a 24-hour measuring function "and there the contents of this Time counters can be displayed selectively in the display unit I7 by operating the switch of the display selection circuit 15, when doing the time measurement of their own country from the first time counter 3 and the time counting for a predetermined region or a predetermined country is carried out by the second time counter 7, the time of the own country can be shown by the 12-hour display in the same way as with conventional clocks and the second time display results from the 24-hour display immediately after actuation of the switch of the display selection circuit 15 »where

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the second display does not require a differentiation between the time display in the morning and in the afternoon. Since the display of the "two Counter contents is selectively executable by the display unit 17, it is possible to simplify the display unit 17 and the To make display delivering figures larger, whereby a more accurate reading of the time is possible.

Since the electronic watch according to the invention has a first time counter for a 12-hour time display and measurement and a second Time counter for a 24-hour time measurement as well as a display selection circuit for a selective display of the "two counter contents has, the time of one's own country can be determined by the first time counter and a second time indication, i.e. the time of a predetermined Selectively record a region or a country using the second time counter, with one for the time of your own country 12-hour display and a 24-hour display for the second display is provided, whereby no differentiation between the time information until noon and the time information after noon with respect to the second time display is required.

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Claims (1)

Claim Electronic clock with a first time counter and a second Time counter, characterized in that the first time counter (3) has a 12-hour time measuring function and the normal frequency signal the time measurement detects that the second time counter (7) carries out a 24-hour time measurement function and the normal frequency signals detected, and that a display selection circuit (15) is provided which selectively displays the counter contents of the first and second time counters in the display unit. 709820/0739 ORIGINAL INSPECTiO