DE2623588C2 - Multi-channel data display device - Google Patents

Description

The invention relates to a multi-channel data display device for the individual display of a large number of measurement data as separate single line representations of separate data channels on respectively assigned areas of the Screen, with an input part that the incoming Receives measurement data and supplies it to a computer for processing and storage, with one to the Computer-connected storage device, the screen being connected to a color control.

Such a multi-channel data display device is from DE-PS 18 08 245 known. There is a separate image repetition memory with its own light button control for each channel provided, which entails considerable expenditure on equipment. In addition, there is a free choice of colors not provided for in the arrangement described there.

The object of the invention is therefore in a multichannel data display device the type specified in the preamble to the modification options of the representation raise.

The solution according to the invention includes such a thing To train multi-channel data display device in such a way that the storage device has an image repeater for graphics and a character code memory holds that a sequence control is provided which on the one hand assigns the addressing of the areas of the screen Areas of the image refresh memory and, on the other hand, the corresponding selection of the read out Channels to be assigned to data controls that each channel has its own logic control to which one color generator stage is connected, and that each color generator stage is set to a selectable color value can be preset.

The task is achieved in a satisfactory manner with the multichannel data display device according to the invention solved, with versatile Einsaizgiichkeiten exist for a large number of channels. The special one contributes to this Structure with the common storage device, the sequence control and the formation of the respective a logic control connected color generation stage is called.

In a further development of the device according to the invention it is provided that the respective adjustable color generator stages are made up of diodes and potentiometers for setting the color display.

In doing so, he proves. to be appropriate if the respective graphic representations made up of vertical line segments with a defined starting point and a defined end point in the coordinate system are composed, which are supplied by the computer and from can be read out from the refresh memory via the respective registers.

In a further development of the device it is provided that the computer is connected to a monitoring control is that during the data exchange between computer and memory for stand-by operation of the Screen.

In the device according to the invention, the monitoring control is expediently with a multiplexer connected, which connects the computer and the screen to the memory, the sequence control is connected to the multiplexer and, on a control command, activates the multiplexer to display the screen disconnect and connect the computer.

Furthermore, it proves to be advantageous if, in the device according to the invention, the computer sends a distant signal generated before the actual command signal time for the sequence control, so that this one line segment ends and holds this until the end of the computer memory cycle.

A special embodiment of the inventive The device is designed in such a way that the memory for each channel contains start and stop data for the line segments contains that separate registers are provided for each channel that the sequence control via a Channel selector and an address memory is connected to the memory in order to transfer the data from the memory to transfer the registers that the channel selector to a clock generator and a synchronization generator is connected to supply the screen with timed signals that a register selector is connected to the channel selector of the sequence control to selectively select the registers for the data output to activate the respective channels that a comparator on the one hand to a picture clock counter and on the other hand is connected to the registers, and that the logic controller selectively receives the signals from the comparators to the respective color generation stage in order to add the data on the screen *. ilen.

Appropriately is at the research area Device connected an adder between the memory and the register, which is used to advance the Channels is controlled by the computer.

The computer is expediently connected to a character generator and a character memory, to selectively transmit characters on the channels. A character multiplexer advantageously connects the character memory with Jem calculator. A logic circuit is a further development of this device provided, which is connected to the graphics channel and the character generator, to generate characters and Display graphs in the same color. A decoder is expediently the character generator downstream.

It also proves to be advantageous if the character generator of the device according to the invention has a Has extinguishing device which is connected to the computer and via which its operation can be controlled and the Character generator can be reset to its starting position.

m further development of the device is provided that the Color generator stages with their control circuits have a manual or automatic Einiellbaren for have individual and separate setting of the preselected color. It also proves to be advantageous if a start control amplifies a line segment when it is switched on.

In the case of the multichannel data display device according to the invention, the color interface has individual preset ones Channels for the appropriate shaping and transmission of the control signals, the output signal from a suitable position and condition control Hbh. '. ngt. Three-beam control signals can be used in the Generated predetermined ratio and thereby a predetermined color signal are supplied, .Das for the special channel is typical. The SynchronizationSM-gnale are generated by the same synchronization generator as the Zcitsignale for the interface with the Storage device related, so that the coordinate signal is given and only the assignment of its Position for the respective kana! is controlled by the signal processing. The effort of coordinate information processing is minimized while maintaining the very desirable color separation control will.

The channels can be displayed on the screen at separate or superimposed locations.

den, with the associated graphical and alphanumeric data in appropriate colors for display be brought, namely by suitable linking in the logic control.

The invention is explained below with reference to the description of an exemplary embodiment and below Explained in more detail with reference to the accompanying drawing. The drawing shows in

1 shows a block diagram to explain the overall structure of the multichannel data display device; and in

FIG. 2 shows a detailed circuit diagram of the multichannel data display device according to FIG. 1.

Fig. 1 shows schematically a conventional color television set as a data display device 1 with a screen 2 for use in industrial processes or controls, for processing operating data, from Physiological data of a patient or the like. A simultaneous display of information in graphic form on display channels is schematically illustrated by four separate channel lines 3 shown. A beam switch-on control 4 is connected in such a way that it produces individual colors for each of the various channel rows 3 supplies. The color is used as the essential distinguishing feature that the channels can according to the device described here are superimposed on one another or arranged in some other way.

The cathode ray is straight with the usual and odd scanning lines 5 and 6, which are supplied via suitable synchronization controls, are deflected in the interlaced process. A small extended portion of the scan line 5 and only that Initial portions of scan line 6 are shown to simplify illustration. The screen 2 is with the horizontal scanning lines 5 and 6 rotated by 90 °, which are thus arranged vertically in reality. Graphic displays are represented by line segment 7 (strong steps of scan lines 5 and 6) respectively generated with only one predetermined starting point S and one end point 9. For example, the Invention find use in monitoring a variety of bodily functions of a patient. Electrodes 10 can be attached to a patient, and their connections 11 are connected to a suitable voltage transformer 12. The logic signals are generated via a special computer 13 and a synchronization interface 14 for creating and generating a visual display of the information on a particular associated channel.

In general, the signals are sequentially as a pattern in a frame repeat memory 15 with direct Access via a multiplexer 16 under the control of a computer 17 and a computer program unit 18 saved. The stored data are successively updated and entered in order to match the one connected to the screen 2 Control 4 through the appropriate operation of a line generator 19 designed as an interface for to control a computer-controlled operation in chronological order.

The computer 13 can be a small digital computer for recording, storing and processing the recorded data. A multi-channel analog / digital converter 20 is connected to the transformers 12 and generates corresponding digital output signals for the computer 17.

Although the illustration is only shown with four input channels. will usually be a larger number used. In a practical implementation, a unit with eight input channels was used, which is easy can be expanded to 32 input channels if a suitably designed memory is provided. the The program unit 18 continuously and successively acquires data and stores them in the frame buffer 15, the special Kunul line 3 and the horizontal interlaced deflection being maintained automatically. The multiplexer 16 is with the as

ίο Interface trained line generator 19 connected, which has a sequence control that synchronizes with the scanning lines 5 and 6 is operated to successively input the graphic data for each line segment 7, and which has an output,

The next is the beam switch-on control 4 activated to generate the line segments 7 having a predetermined color for each channel. One A second synchronization interface for the character area 22 is provided for generating selected ones alphanumeric displays on the preselected channel lines 3. The interface 22 has a character memory 23 that communicates with the computer 17 via a Multiplexer 24 and a character generator 25 is connected. A logical unit 26 in the form of a NAND Gatters provides an output signal for the beam switch-on control 4 for the selected channels of the same Color Fig. 2 shows a preferred structure for the graphics using the two interfaces 14 and 22 for the graphics area and the drawing area and will be explained in more detail below.

Referring now to Figure 2, there is a detailed block diagram of a preferred structure for operating the color coded Multi-channel data display device according to the invention posed, with a detailed representation and Description is given for the interface 14 for the graphics area. The interface 22 for the drawing area is briefly explained and on the interface 14 related for full understanding.

In Fig. 2, the computer 17 is connected via a data input bus 27 to the data to detect from the analog / digital converter 20 on a time base and the transformed information on a Data output line 22a to memory 15 to memory transmission. The usual breaker unit 28 forms the control logic and sends signals to the computer 17 in order to couple the analog / digital converter 20 and to detect the end of the cycle. A teleprinter 29 can also be connected to the computer 17 in order to

thus to carry out a data exchange controlled by the interrupter unit 28. The collective initiative g22a is also connected to the program unit 18 in order to create the necessary exchange of information, as well as with a peripheral data processing unit, for example a character generator 30, which of course is controlled by the computer 17 in the usual way, as indicated by the signal lines 31 and 32.

The information regarding the position of the lines and the channels on the screen 2 is between to the computer 17 and the program unit 18 via a memory data input line 33 and a memory address line 34. The various memory lines 33 and 34 are also through the multiplexer 16 with the corresponding address lines 35 of the memory 15 and the common memory data line 36 of the memory 15 and with the address line 37 and the memory address line 34 of the as Interface 19 trained line generator

humic n.

The computer 17 is able to create a priority control / u to connect to as desired the common memory 15 to obtain. A synchronization monitoring control 39 is interposed in order to provide the computer 17 with signals supply, and supplies a distant signal before the command of the computer 13 to the multiplexer 16 via this command to inform. The multiplexer 16 then supplies the signal to the line generator 19, the data momentarily to be held until the computer 17 has finished the data exchange or access cycle.

Line generator 19 is normally in operation and is generated by the output signal of a synchronization generator 40, as described below is controlled to send the memory data via lines 36 and 38, depending on the input address information on lines 37 and 35, to the Transfer of advertisement processing.

The memory 15 supplies the data for each channel line 3, and the computer 17 has separate signal processing channels with selected, common sequence control components. Each of the channels is constructed in the same way in order to control the beam switch-on 4 press to light up in a suitable manner the line segment 7 on the screen 2 and accordingly a preselected color track according to the detected Generate data. Since all signal channels have the same structure, only one of these channels is shown and described in detail.

The line generator 19 of the common memory 15 for the screen 2 is controlled by a sequence controller 41 which selectively and successively for the Transfer of information to a line on a line-by-line basis ensures.

The sequence controller 41 has a channel selector 42 and an address memory 43 to select the channels in repeatedly select and for the transfer of the data from the memory 15 to a suitable To provide storage stage 44, which has a pair of storage registers 45 and 46 for each channel and the Start point 8 and end point 9 for each line segment 7 receives and stores. A comparison or Reading stage 47 reads the stored ones one after the other Information and activates the three-beam color generation stage 48 to the preset color display for the to generate the read channel. The data display device synchronization generator 40 generates the necessary Synchronization signals for the various stages 42, 43, 47 and 48 and provides the appropriate timing of the data transfer and processing in the Generation of scan lines 5 and 6.

The synchronization interface 22 for the character area uses a separate character generator 25 which receives the character information and The driver signals for switching the beam on and off are generated via a separate internal process. the Sequence control can be similar to that for the graphic display.

The address memory 43 is shown schematically with an address selector 49 and a step circuit 50 serving for increasing or advancing the address. The address selector 49 is shown as a preset, hard-wired input to the address memory 43 and is connected to the synchronization generator 40 via a line 51 for a line synchronization signal for odd lines and via a line 52 for a line sync signal for even lines connected to each scan on the screen 2 by one selected starting address. The address selector 49 can be a presettable memory unit be carried out by the calculator for further automatic

Movement of the representation on the screen 2 as well as

for positioning on the screen 2 is driven.

The data for the start and end points 8 and 9

and the "F" and "N" buffer registers 53 and 54 become during a line scan and under control

ίο the sequence control 41 loaded. The coordination and the synchronization between screen 2 and memory 15 is achieved by channel and register selection output synchronization depending on the Signals from the synchronization generator 40 controlled

is ert. The sequence controller 41 has the as a counter formed channel selector 42 connected to a register selector 55; whose exit is via a Line 56 connected so that it successively activates the buffer registers 53 and 54 during the load cycle fourth, to temporarily save the data for the next The transfer to registers 45 and 46 must be saved. The channel selector 42 activates one after the other the "F" registers 53 to input the respective "zero" addresses. The F / N register selector 55 then becomes switched to the output connected to line 57 in order to activate address stepping 50, to switch to the next or "1" address in the address memory 43. The channel selector 42 leads through a new cycle and loads all N registers 54.

Step circuit 50 is driven to select address memory 43 for each scan line 5 and 6 to be arranged sequentially in order to transfer the data in the correct order to the storage registers 45 and 46, from the even field output of the register Selector 55 via line 57 to switch in a suitable manner from the one set of storage registers 45 to the second set of N storage registers while these are being loaded from the shared memory 15. The step shadow 50 is in motion set, via the signal line 58 from the synchronization generator 40 for channel selection, the synchronization generator 40 also via the line 58a is connected to the channel selector 42 to activate it. The stepper 50 is also connected to a Signal line 58b for the odd field connected, with signal line 586 from line 52 branches to advance the address in a suitable manner at the beginning of each odd line scan.

The channel selector 42 supplies a sequential channel selection, the memory address from the address memory 43 to the multiplexer 16 via a line 37 is delivered. The memory 15 is thus addressed via the line 35, and the related data is from the memory 15 via the output line 36 to a three-stage buffer 59 of the multiplexer 16. The three-stage buffer 59 is known per se and connected so that it transfers the data directly to the F and N buffer registers 53 and 54 via an 8- or 9-bit adder 60, which is optionally set by a latch 61 which is connected to the Data output line 22a of the computer is connected and via a control line 62 from the computer 17 is controlled.

The adder 60 is used to divide a Provide image display on the screen 2. Thus, the adder 60 is a conventional logic one Element that, when activated, is proportional

converts all data information with a given percentage and the representation on the top or bottom half of screen 2 slides.

The channel selector 42 thus counts consecutively or goes one after the other from channel 0 to channel 3 with the start address for each channel. The register selector 55 is activated by the completion of the first channel selection ^{sequence in order to select <4} .as the other or N buffer register 54 and at the same time toggle the address memory 50 to read the next address.

The channel selector 42 is driven by a clock 63, which is connected to this via a suitable on-off control gate 64 is connected. The normal state of gate 64 is to transmit the clock pulses and thereby sequencing the channel selector 42 each time the latter is turned on. That Gate 64 has a stop input which is connected to an output of the multiplexer via an erasure line 64e

16 is connected to the shared memory 15 for Communication with the computer 17 activated.

As stated above, the computer 17 has priority and can at any time with the memories 15 and 23 in Connect. If the character generator 25 is directly put out of operation or deleted, are each time the special display points are blanked or deleted. This is acceptable as the character information is shown only about every second and does not generate any detrimental flickering.

The graphic display is synchronized and the addressing and the channels are in agreement is held with the display and processing is desirably terminated at the end of a line read interrupted.

In the embodiment shown, the monitoring control 39 receives a distant signal before the computer request for the memory 15 and holds the sequence control 41 at the end of a line read cycle for deactivated a selected period of time long enough to enable the computer access cycle, whereupon the processing system is released again and continues with the next line. To this Wise is the computing power load by the computer

17 is always short enough and the time of the distant signal is correct large enough to enable the desired sequential display on the screen 2 is momentarily held in an interrupted state. The computer 17 ends an access or data exchange easily within the retrace time of the beam. The storage registers 45 and 46 are connected to the buffer registers 53 and 54 through lines 65 and 65a, and the data or information are transmitted at the same time for all graphic channel lines 3 at the end of each scanning line 5 or 6.

In the illustrated embodiment, a univibrator 66 of any suitable construction is compatible with the Discharge signal output line 66a of the synchronization generator 40 and activates the storage registers 45 and 46 when setting the buffer registers 53 and 54.

The actual transmission of information for the beam switch-on control 4 is through the scanning of the digital output of register 45 to turn on the scanning beam, and by the Sampling the output of register 46 to turn off the beam; that way it becomes Single line segment 7 is generated. After the outputs of the various registers 45 and 46 for each Channel have been scanned sequentially and have activated the beam, all line segments 7 are one Scan line 5 complete. The registers 45 and 46 are then used during the blanking and time of the Feedback updated for next scan line 5,

and the cycle is repeated. During each line generation cycle the buffer registers 53 and 54 are updated.

More precisely, the setting of registers 45 and 46 and thus the point of switching on and off

ίο of the display beam is determined by the activation a counter 67 to set registers 45 and 46. The counter 67 is any suitable counter with digital output and is shown in the preferred embodiment as one of the clock 68 of the Synchronization generator 40 driven counter.

The synchronization generator 40 is operated by the clock generator 68 with a vertical synchronization, wherein the blanking signal lines 66a. 66 /> connected to the data display device synchronization circuit 68 ″ are. The synchronization generator 40 also generates the various input or touch signals on lines 51, 52 and 58 to operate the interfaces to registers 53 and 54 in the appropriate Order to load.

The counter 67 is reset at the beginning of each scan line, for example as a result of the horizontal Blanking signal appearing on line 66a shown as the input reset line is. The output signal of the counter 67 and the output

Output signals of the registers 45 and 46 become continuous with the respective digital signal comparators 69 and 70 compared. The comparator 69 thus has a first input which is connected to the via a line 71 Output of the register 45 is connected. His second

The input is connected to the output of the counter 67 via a line 72. The outputs of the comparators 69 and 70 are combined in a separate logic controller 73 for each register pair and thus also for each individual channel row 3, and form a channel driver line 74 for one or a plurality of Color generation stages 48 to the color generation control 75 to generate the selected i-color for the Activate channel. Thus, the counter 67 is reset immediately at the start of a scanning line. Accordingly its input is at reference or zero level. The associated output of register 45 causes a Beam deactivation signal from the comparator 69 for the logic controller 73 via a channel line 76, and the Beam remains switched off. The counter 67 begins in

so synchronization with the movement of the scan line 5 count. When the count of the counter 67 of the setting of the register 45 equals, the comparator 69 determines the coincidence and delivers a beam switch-on signal via channel driver line 74. Furthermore, the level controls are specific to each individual channel interconnected in order to generate a specific color for the line segment 7. Thus the corresponding Line segment 7 is generated and held until comparator 70 causes the beam to be switched off. Of the Switch-off point 9 is generated by the output signal of the comparator 70, which has one input is connected via a line 77 to the output of the counter 67 and its second input via a Line 78 is connected to register 46. One

ß output line 79 is connected to the logic controller 73, and when the comparator 70 registers coincidence, the color generating stage 48 switches off the beam. More specifically, the logic controller 73 av for one

ZO Döö

Kanhi and has a pair of NOR gates 80 each having a pair of inputs, one of which one with each of the comparators 69 and 70 connected is. The outputs of the NOR gate 80 are connected to a third NOR gate 81, whose Output is connected to the channel driver line 74. The first comparison provides a switch-on or control signal on the channel driver line 74, which is fed via a suitable buffer inverter unit 82 for this channel will. The other channels are from separate comparator outputs driven, which are combined by simple, not shown logical units that the Generate control signals on the respective channel driver lines 74.

Thus, the illustrated channel driver line 74 can connect via the buffer 82 to a selected color control input line 83 or through the NAND gate 26 to another color control input line 84 will. Thus, the color generating stage 48 has a plurality of individual stages each having a similar structure are to generate dr ° i output signals, one of which on each of the three input lines 85 of the color generation driver 75 is connected. Each stage has a similar structure and one is described. the Color generator stage 48 has three separate potentiometers 86 with individually adjustable output taps 87. The setting of the taps 87 determines the output voltage and thus the proportion of color that is included the other two, similarly set colors is combined. The taps 87 sit with the controls connected by diodes 88 or other suitable means for separating the various signals from one another. By providing continuous or stepless control of the three primary colors, such as if it is achieved by a potentiometer, there will be a corresponding continuous color range for each of the canals.

In this way, the connection of each channel driver line is established 74 with a special color control input line 83 a color generation stage 48 and delivers one Presetting for the color of this channel. In Fig. 2 shows the representation of the input line connection with buffer 82 and NAND gate 26 the plurality of line connections, each channel driver line 74 is connected to only one of the input lines.

The device is preferably constructed so that the color control taps 87 are connected to exposed adjustment elements are connected for setting the desired channel color.

Furthermore, by using a suitable automatic color signal setting, the channel color programmed, remotely controlled or similarly adjusted.

When the line segment 7 is formed, the initial switch-on occurs in conventional color television sets usually not at full intensity. Thus there will generally be a slight delay while the beam intensity is built up to the strength set by the color generator stage 48 is. In the embodiment shown, an instantaneous auxiliary setting signal is sent to the intensity control of the data display device to improve the starting point and a continuous, even To achieve line intensity.

To this end, in the illustrated embodiment, there is a NAND-NOR unit 89 with each of the color control input lines 83 and 84 connected. The output of the unit 89 is via a controllable variable resistor C-O connected to a positive power supply. The tap 91 of the resistor 90 is directly connected to the Base line unit 92 of the data display device 1 via a wave-shaping capacitor-resistor circuit 93 tied together. The output of circuit 93 is via a Line 94 connected to the unit 92 of the data display device 1 to select the intensity of the initial Switch on to enlarge.

The wave shaping circuit 93 can of course also be used as a controller for the end point 9 of the line segment 7 can be used for optimal visual graphical representation. For example the waveform can be like this be chosen that they have a slow start and one

is gradual cessation generated to a gentle, visual Generate appealing line display for each graphical display channel. Furthermore, a suitable Circuit in any part of the output circuit, for example in the individual color generation controls, be included.

As mentioned above, the channel for generating characters is set up with the character generator 25, which has the necessary sequence for generating selected alphanumeric characters. The character generator 25 has an address line 95 which is connected to Gern common memories 15 or 23 via the multiplexer 24, as well as a character selection input line 96 which forms part of the data input from the memory. A decoder 97 connects the output of the character generator 25 to the various controls through an output channel line 98. The decoder 97 is connected to the line 96 and receives the simultaneous, color-channel-coded data which the channel driver line of the output channel line 98 selects in accordance with the memory data to receive the character . The memory 23 thus has the necessary encoded information for the particular character to be displayed, the channel and the channel location, the decoder 97 bringing the character to the appropriate channel color line on the line 96. This is in contrast to the graphic display, in which the sequence control provides for the succession of the various channel output signals. As mentioned above, the character channel ί > is an interface connection with the computer 17. Since the character generator 25 operates with a very fast cycle, the character generator 25 is decoupled when it receives a signal which indicates that the computer 17 is currently using the memory 15 contact

so will. Thus delivers the high speed of the character generator 25 a system which keeps the screen 2 in a standby state while the computer 17 is connected to the memory 15.

Furthermore, the present invention can of course be extended to include any number of channels to be provided for the temporal processing capacity of the system; it can still be enlarged in the double displays and sequence controls are used, which are connected to the one memory 15

eo are.

1 sheet of drawings

Claims (15)

Patent claims: 1. Multi-channel data display device for the individual display of a large number of measurement data as separate items Individual line representations of separate data channels on respectively assigned areas of the screen (2), with an input part (10, 20) that the receives incoming measurement data and feeds it to a computer (17) for processing and storage, with a storage device (15, 23) connected to the computer (17), the screen (2) on a color control (48, 75) is connected, characterized in that a) that the memory device (15, 23) contains an image repetition memory (15) for graphics and a character code memory (23), b) that a sequence control (41) is provided, on the one hand the addressing of the areas of the Bihlsshirmes (2) assigned areas of the Image refresh memory (15) and on the other hand the corresponding selection of the read out Controls the channels to be assigned to data, c) that each channel has its own logic control (47, 73) to which a color generator stage (48, 75) is connected, and d) that each color generator stage (48, 75) can be preset to a selectable color value. 30th 2. Data display device according to claim 1, characterized in that the respective adjustable Color generator stages (43, 75; 5 J, 87, 88) from diodes (88) and potentiometers. (86.87) to discontinue the Color representation built up sir V. 3. Data display device according to claim 1 or 2, characterized in that the respective graphic representations consist of vertical line segments (7) with a defined starting point (8) and a defined end point (9) are composed in the coordinate system that is provided by the computer (17) and read out from the refresh memory (15) via the respective registers (45, 46) will. 4. Data display device according to one of claims 1 to 3, characterized in that the computer (17) is connected to a monitoring control (39), which during the data exchange between Computer (17) and memory (15) ensure standby operation of the screen (2). 5. Data display device according to claim 4, characterized in that the monitoring control (39) is connected to a multiplexer (16), the computer (17) and the screen (2) with the Memory connects, and that the sequence control (41) is connected to the multiplexer (16) and activated on a control command the multiplexer (16) to decouple the screen (2) and the Connect the computer (17). 6. Data display device according to one of claims 1 to 5, characterized in that the computer (17) a pre-signal generated before the actual command signal time for the sequence control (41), so that this ends a line segment (7) and this until the end of the computer memory cycle holds on. 7. Data display device according to one of claims 1 to 6, characterized. - That the memory (15) for each channel start and Contains stop data (8,9) for the line segments (7), - that each channel has its own register (45, 46, 53, 54) are provided, - That the sequence control (41) via a channel selector (42) and an address memory (43) the memory (15) is connected to the data from the memory (15) to the registers (45, 46, 53, 54) to transfer, - That the channel selector (42) to a clock (63) and a synchronization generator (40) is connected to supply the screen (2) with timed signals, - That a register selector (55) is connected to the channel selector (42) of the sequence control (41), to selectively activate the registers (45, 46, 53, 54) for the data output of the respective channels, - That a comparator (69, 70) is connected on the one hand to an image clock counter (67) and on the other hand to the registers (45, 46, 53, 54), - And that the logic control (73) selectively the signals of the comparators (69, 70) to the respective Color generation stage (48, 75; 86, 87, 88) transmits in order to display the data on the screen (2). 8. Data display device according to one of claims I to 7, characterized in that between the Memory (15) and the registers (45, 46, 53, 54) an adder (60) is connected, which is used for advancing the channels from the computer (17, 59) is controlled. 9. Data display device according to one of claims I to 8, characterized in that the computer (17) is connected to a character generator (25) and a character memory (23) to selectively generate characters broadcast on the channels. 10. Data display device according to claim 9, characterized in that a character multiplexer (24) connects the character memory (23) to the computer (17). 11. Data display device according to claim 9 or 10, characterized in that a logic circuit (26) is provided. which are connected to the graphics channel and the character generator (25) is to display characters and graphs in the same color. 12. Data display device according to one of claims 9 to 11, characterized in that the character generator (25) is followed by a decoder (97). 13. Data display device according to one of claims 9 to 12, characterized in that the character generator (25) has an erasing device which is connected to the computer (17) is connected and via which its operation can be controlled and the character generator (25) in its starting position is resettable. 14. Data display device according to one of claims I to 13, characterized in that the color generator stages (48, 75; 86, 87, 88) with their control circuits (86,87,88) are manual or automatic Have the option of setting the preselected color individually and separately. 15. Data display device according to one of claims 1 to 14, characterized in that a start control (92, 93) when switching on a line segment (7) reinforced.