DE2458130C3 - Radio receiver or the like with a selective call evaluator - Google Patents

Description

45

The invention relates to a radio receiver or the like with a selective call evaluator Patent 24 20 507, which is a signal conditioning stage for the selective call to be evaluated, a highly stable pulse generator and contains a counter with a downstream evaluation circuit, the input of the Counter during gate times derived from a selective call to be evaluated with the pulse generator is connected and its counter reading has a certain bandwidth for each counting result and where the Evaluation circuit consists of a bistable circuit, the set input of which corresponds to that of the lower The counter output that marks the bandwidth limit and its reset input with the upper bandwidth limit marked counter output is connected and its output signal! the criterion for an in a gate time is correctly recognized selective call.

With this selective call evaluator, gate times in which one Evaluation takes place. It is assumed after a correct evaluation that the received Selective call was recognized. Here it can happen that the evaluation is wrong due to disturbances caused or that a garbled selective call is not recognized.

The invention is therefore based on the object, the radio receiver with selective call evaluator after To improve the main patent to the effect that the call and false call security is increased.

This object is achieved with the means specified in claim 1.

The advantage here is that, due to a small additional effort, a very large increase False call security is achieved. Also the evaluation of several consecutive different ones Calling frequencies are possible with the same accuracy. It is only necessary to ensure that the Counter is adapted in accordance with the calling frequencies in their storage capacity.

The invention is explained in more detail with reference to the exemplary embodiments shown schematically in the drawings explained. It shows

F i g. 1 is a block diagram of a selective call evaluator and

Fi g. 2 a selective call evaluator for a selective call with several successive different ringing frequencies.

In Fig. 1, a radio device 1 is represented by a block. At the output of the demodulator, not shown In the receiver of the radio device 1, the demodulated selective call signal is present and it will The selective call evaluator 3 is supplied via a connecting line 2. The selective call evaluator 3 has a Signal shaping circuit 4, a highly stable pulse generator 5, a counter 6, a bistable circuit 7 and a control circuit 8 and an OR circuit 22.

Furthermore, there is a digital counter, for example one made up of bistable circuits Counter 23 and an AND circuit 24 are provided.

The connecting line 2 is connected in the selective call evaluator 3 to the input of the signal shaping circuit 4. The signal shaping circuit 4 converts the sinusoidal selective call voltage into frequency-accurate square-wave pulses and generates gate times, during which pulses from the pulse generator 5 reach the counter 6 and advance it. The counting result is queried by the bistable circuit 7, the output signal of which at output 9 is then the criterion for a selective call correctly received within a gate time. The control circuit 8, influenced by the output signal of the signal shaping stage 4, resets the counter 6 and, via the OR circuit 22, the bistable circuit 7 again after each evaluation process. For this purpose, the control circuit 8 contains a circuit which generates a reset pulse with each falling edge of the square-wave pulses and feeds this to the counter 6 and the bistable circuit 7 with a slight delay. In the counter 23, the output signals of the bistable circuit 7 are added. When a certain total is reached, the counter 23 emits a control signal at its output 25, which is the criterion for a correctly received and repeatedly checked selective call. The counter 23 is then set to its zero position by its output control signal via the AND circuit 24 at the next reset pulse from the control circuit 8.

The bistable circuit 7 is in the manner described below with the outputs of the

Counter 6 connected. The outputs of the counter 6 are connected in such a way that the count result is one at the rightmost output in FIG. 1 is indicated by a signal and, for example, the counting result one hundred is pending at the leftmost output, that is, at the outputs there is an increasingly higher value counting result from right to left, as shown in FIG. 1 is indicated by the numbers 1 ... 100 in the block of the counter 6. It is now assumed that the typical counting result for the radio device 1 for the corresponding selective call is 50. Since a range is required for the counter reading for a variety of reasons, a count between 45 and 55 should be correct. In order to evaluate this bandwidth of 10 counting steps, the set input 5 of the bistable circuit 7 is connected to the output of the counter 6 indicating the counting result 45 and the reset input R is connected via the OR circuit to the output of the counter 6 indicating the counting result 55. It follows from this that the output 9 of the bistable circuit 7 only carries a signal when a count of 45 to 54 is present. This output signal is input into the counter 23, in which the output signals of the bistable circuit 7 that are present in the further gate times in the case of a correctly received selective call are added up. Finally, the counter 23 reaches its last position and a control signal appears at its output 25, which is a measure of a correctly received and recognized selective call. This control signal can then be displayed in the radio device 1 and / or processed further (not shown).

The capacity of the counter 23 is to be dimensioned so that the number of added output signals Dis to the appearance of the control signal at output 25 about half the number of the total possible gate times.

From the above description it can be seen that also a disturbed selective call can still be recognized correctly. In addition, short-term disruptions that resemble a selective call, not evaluated. This results in increased security against false calls and calls of the selective call evaluator.

In Fig. 2 shows only the counter 6, the bistable circuit 7, the counter 23 and a controller 17 of a selective call evaluator for a selective call with several successive different ringing frequencies. The controller 17 not only has the task of resetting the counters 6 and 23 to the bistable circuit 7 after a received selective call, but it also determines the order in which the call frequencies are checked within the selective call. This sequence corresponds to the code number of the respective radio device and can be changed in the controller 17 by certain measures, for example by re-soldering wire bridges. In addition to the controller 17, AND circuits 10, 11 and 12 are also provided, the first input of each of which is connected to an output of the counter which represents a lower bandwidth limit and the second input of which is connected to the controller 17. The outputs of the AND circuits 10, 11 and 12 are connected to the set input S of the bistable circuit 7. The reset input R of the bistable circuit 7 is connected to the output of an OR circuit 18, the inputs of which are interconnected with the controller 17 and the outputs of the counter 6 representing the upper bandwidth limits.

It is now assumed that the selective call to be evaluated contains three ringing frequencies / 1, / 2 and / 3 and that the code number is given by the sequence / 2, / 3, f \ . This means that only a selective call that has the calling frequencies in this order can be recognized. The code number is set in the controller 17 in that the same sequence is observed at the outputs of the controller.

The selective call evaluator works as follows: When the circuit is idle, the counters 6 and 23 and the bistable circuit 7 are in their zero position and the controller 17 has a control signal, i.e. a control signal, at its first output, which in this case is marked with (2) This means that only the AND circuit 11 receives a signal at its second input and, as a result, only a counter reading corresponding to the ringing frequency f2 can set the bistable circuit 7 via the AND circuit 11.

The output signal of the circuit 7 which then appears on the line 21 is input to the counter 23. The counter 6 has meanwhile been reset by the control circuit 8 and can check the ringing frequency! 2 again in the next gate time. When the counter 23 reaches its end position, a control signal appears on the line 26 which causes the controller 17 to mark only the second output, which is marked / "3. When switching from one output to the other in the controller 17 each time a short pulse is sent to the reset input R of the circuit 7 via the line 19 and the OR circuit 18 and via the line 20 to the reset inputs of the counters 6 and 23.

As described above, the ringing frequency fi is checked and then the ringing frequency f \ is checked. After the correct evaluation of the last ringing frequency, the controller again switches one step further and thus to its output terminal 13, at which a signal now appears that indicates a correctly received selective call.

There is a different number of gate times for the different calling frequencies. Therefore, the counter 23, should always have the same percentage of output signals from the circuit 7 cause a control signal at the output of the counter 23, be switchable in its capacity. This is in the F i g. 2 through a line 27 from the controller 17 to the counter 23 and through the representation of three Outlets indicated on him. The controller 17 activates according to its position and the calling frequencies the correct outcome in each case.

When using selective calls with the same number of periods of the calling frequencies, this Measure not applicable.

It should also be noted that only what is essential for the invention has been shown in the block diagrams and for a better overview because of, for example, the forced zeroing of the selective call evaluator in the case of an incorrectly received selective call through a generally known irrigable time circuit was waived.

1 sheet of drawings'

Claims (3)

Patent claims: 1. Radio receiver or the like with a Selective call evaluator, which has a signal conditioning stage for the selective call to be evaluated, a highly stable one Contains pulse generator and a counter with a downstream evaluation circuit, wherein the input of the counter during gate lines to derived from the selective call to be evaluated is connected to the pulse generator and its count is a certain for each count Having bandwidth and wherein the evaluation circuit consists of a bistable circuit whose Set input with the counter output marking the lower bandwidth limit and its reset input is connected to the counter output marking the upper bandwidth limit and whose output signal is the criterion for a selective call correctly recognized in a gate time according to Patent24 20507, characterized in that that the bistable circuit (7) is followed by a digital counter (23) which the The output signals of the bistable circuit (7) are added up in the individual gate times and the at Emits a control signal when a certain amount is reached. 2. Radio receiver according to claim 1, characterized in that upon delivery of the control signal the number of added output signals is approximately half the number of the total possible Gate times. 3. Radio receiver according to claim 1 for evaluating a selective call with several successive ones different ringing frequencies, characterized in that the counting device (23) of the control (17), which according to the code number of the radio device (1), the switch to the individual calling frequencies (Al, / "2, A3) caused in their storage capacity is switched so that for all ringing frequencies the same percentage the control signal is output from correct evaluations.