DE2442716C3 - Monolithically integrated NOR gate - Google Patents

Claims (1)

Claim: Monolithically integrated semiconductor circuit for a NOR gate in I ² L design, in which in a semiconductor base material of the first conductivity type, at least two oppositely conductive areas are arranged at a distance as emitter and collector zones of a lateral transistor structure, and are located in the collector zone of the lateral transistor structure there is at least one further oppositely conductive zone as the collector zone of an inversely operated vertical transistor structure, and in which the current flow serving as the output signal is tapped at the collector zone or at the collector zones of the vertical transistor structure, characterized in that the lateral transistor structure has several emitter zones (l \, h) to each of which an input signal (a. ^ is applied. b α + b α + b α 0 0 1 0 1 1 0 0 0 1 0 1 1 1 0 1 10 15th 20th The invention is concerned with the PL design of a monolithically integrated NOR gate, which the truth table 30th 35 enough. The designation I ² L is derived as an abbreviation from the designation used in English-language literature "Integrated Injection Logic" ab, see. "Philips Technical Review" (33) No. 3 (1973), pages 76 to 85. This interpretation principle is also called “Merged Transistor Logic”, see “1972 IEEE International Solid-State Circuits Converence, Digest of Technical Papers «. Pages 90 to 93. The main feature of this design principle is an injector, which is part of a lateral transistor structure with the current flow in a vertical, inversely operated transistor controls at least one collector lying on the semiconductor surface. The injector can in the equivalent circuit diagram are represented as an equivalent circuit transistor, the base of which is based on the emitter potential of the relevant vertical transistor and its collector is at the base of the vertical transistor. The collector zone of the Equivalent circuit transistor is identical to the base zone of the vertical transistor. Advantages of this design principle of the "integrated injection logic" (I ³ L) are a relatively low surface area of semiconductor material and the possibility of easy implementation of digital circuits with multiple collector transistors in normal planar diffusion technology without resistors and capacitors. Furthermore, there are no special power sources. b5 for example constant current sources. for the one / one transistors required, as the power is supplied via the existing injectors. The invention relates to an I ² L monolithically integrated NOR gate according to the preamble of the claim, as from DE-OS 20 21 824 or from the magazine "IEEE Journal of Solid-State Circuits" Volume SC-7. No. 5 (October 1972) page 341. The object of the invention is a space-saving solution to the problem of galvanic separation of the Input signals. This object is achieved by the invention specified in the characterizing part of the claim. The invention is explained below with reference to the drawing, 1 shows the circuit of the known NOR gate, the output signal of which at the base of a Inverter transistor is located, whose F i g. 2 shows the circuit diagram of the monolithically integrated NOR gate according to the invention and 3 thereof in section perpendicular to the surface of a plate-shaped semiconductor body as a detail a monolithic integrated circuit in PL design illustrate the NOR gate according to the invention. The invention is based on the known monolithically integrated NOR gate according to FIG. 1. Its output signal is applied to the base-emitter path of an NPN inverter transistor Tj. The input signals a and b are applied to the base electrodes of the transistors Ti and Tj. In the PL design, adjacent transistors of at least one transistor row receive a common injector, which is indicated in the equivalent circuit diagram as an equivalent circuit transistor located in front of each individual transistor. 2 shows the circuit diagram of the monolithically integrated NOR gate according to the invention with the injectors h and / 2 in the form of their equivalent circuit diagram transistors, to whose emitters the input signals a and b are applied. The collectors of the equivalent circuit transistors are connected to one another and are connected to the base terminal of an inverter transistor T, the emitter of which is at ground potential. FIG. 3 shows the PL design of the monolithically integrated NOR gate according to the invention with the normally P-conductive doped injectors I and I. The cable type in brackets can also be used. Since the inverter transistor T lying within the scope of the invention can also be designed as a multiple collector transistor, the two collector zones 2 and 2 'are inserted into the base zone 1 of this inverter transistor T. In the manufacture of the monolithically integrated solid-state circuit with the NOR gate according to the invention in accordance with the exemplary embodiment in FIGS. 3 is based on a P-conductive substrate 4 with an N + -conductive layer. The N-conductive epitaxial layer 5 is applied thereon, into the exposed surface of which the further above-mentioned zones are diffused. The highly doped layer 3 acts as an emitter of the multiple collector transistor. It is within the scope of the invention to have more than two injectors acting on an inverter transistor provided so that the PL design of a NOR gate is possible for three or more variables. 1 sheet of drawings