DE2428015A1 - ELECTRONIC PROGRAM GENERATOR - Google Patents

Description

£ LANDlS & GYRJ LAWDlS & GYR AG CH-6301 Zug, Switzerland

Electronic programmer

The invention relates to an electronic programmer, especially for a burner control unit, with several timers that can be switched on one after the other by a position counter, those made up of one resistance and one of all timers common capacitor, and with a threshold switch connected to the capacitor, which is at Achieve the Y / pus hold at a given capacitor voltage of the position counter and the discharge of the capacitor triggers.

In a known programmer of this type, the position counter consists of a binary counter, at the outputs of which not the desired program, but rather the respective position of the programmer is output in binary-coded form. This requires additional logic for decoding the output signals of the binary counter. The timelines of the well-known

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th programmer are each through the series connection of two resistors and a decoupling diode as well as through formed the capacitor common to all timing elements. Between the connection point of the two connected in series Resistors of the timing elements and the outputs of the binary counter is connected to a diode matrix, each position of the binary counter assigns one of the timing elements. The decoupling diodes prevent mutual influencing of the timing elements via the diode matrix. The threshold switch finally consists of a unijunction transistor circuit,

The invention is based on the object of a simple To create programmer of the type mentioned, which - with the exception of the resistors and the capacitor - completely can be produced economically in integrated circuit technology and the program without additional decoding logic directly outputs.

This object is achieved according to the invention in that the Position counter is a shift register whose clock input is connected to the output of the threshold switch that a transmission gate is connected in series with each resistor and the transmission gates are connected to the logic gates Outputs of the shift register are connected, that the threshold switch is a logic gate bridged by the capacitor and that another transmission gate controlled by the threshold switch is used to discharge the capacitor is arranged.

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An exemplary embodiment of the invention is illustrated below the single drawing figure explained in more detail.

In the drawing 1, 1 and 2 denote resistors which are each connected in series with a switch 3 or 4 between a positive voltage source U _D and the input of a threshold switch. The threshold switch 5 is a non-inverting logic gate bridged by a capacitor 6 and having a single input. The resistors 1,2 together with the capacitor 6 form timing elements. A switch 8 is provided for discharging the capacitor 6 via a resistor 7. The switches 3, 4 and 8 are so-called transmission gates.

The output of the threshold switch 5 is with a clock input 9 of a shift register 1O connected, which in the example shown consists of three stages with D flip-flopsi1,12 and consists. The Q output of flip-flop 11 is connected to the D input of flip-flop 12, the Q output of flip-flop 12 to the D input of flip-flop 13 and the Q output of flip-flop 13 with connected to the D input of the flip-flop 11. The clock input 9 of the shift register 10 leads to the Cl inputs of the flip-flops 11 to 13. The output of the threshold switch 5 and the Q output of the flip-flop 13 are via an .OR gate 14 to a Control input of switch 8 switched. The Q outputs of the flip-flops 11 to 13 are at outputs 15 to 17 of the program switch connected.

The control inputs of the switches 3, 4 are via logic gates 18 PA 1806

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to 22 connected to the outputs of flip-flops 11 to 13 in such a way that that according to the respective counting position of the shift register 1O, the switch 3, the switch 4 or both Switches are closed. The output of the threshold switch 5 is via an inverter 23 with one input each Logic gates 18 to 20 connected.

The program switch described works as follows:

To start the program switch, the flip-flops 11 to 13 are switched to the logic position 000 by applying a voltage pulse to a reset input of the shift register 10, which is not shown for the sake of clarity. The capacitor 6 is discharged at this point in time, the output of the threshold switch 5 is at logic 0, the outputs of the logic gates 18 and 21 are at logic L, the outputs of the logic gates 19, 20 and 22 are at logic 0, the switch 3 is closed and the switch 4 is open. The capacitor 6 is now from the voltage source U _n via the switch 3 and

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the resistor 1 is charged until the capacitor voltage reaches the threshold value of the threshold switch 5. The threshold switch then responds, its output goes to logic L, the switch 8 is closed via the OR gate 14, the Capacitor 6 is over the low resistance 7 quickly discharged again and the output of the threshold switch goes back to logic O.

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The short pulse emitted by the visual wave switch 5 appears at the clock input 9 of the shift register 1O and shifts it one place further into the logical position LOO, whereby a circuit, not shown in the drawing, connected to the output 15 is connected to voltage. The on The output of the threshold switch 5 pulse also reaches the logic gates 18, 19 and 2O via the inverter 23, whereby these are blocked during the overturning process of the shift register 10 and the discharging process of the capacitor 6

When the shift register 10 is in the logic position LCO, the outputs of the logic gates 19, 21 and logic L and thus both switches 3, 4 are closed. The process described above is repeated, but the capacitor 6 is now charged via the parallel connection of the resistors 1 and 2. The next pulse at the output of the threshold switch 5 shifts the shift register 1O into the logic position LLO, whereby a circuit connected to the output 16 is connected to voltage and only the switch 4 is closed via the logic gates 2O and 22, so that the capacitor 6 in the last Cycle is charged only via resistor 2. In the logical position LLL of the shift register 10, a circuit connected to the output 17 is finally switched on and the switch 8 is permanently closed via the OR gate 14, so that the capacitor 6 is discharged and the programmer is shut down.

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The advantages of the programmer described can be seen now easy to recognize. The desired program will be immediate at the outputs of the shift register 10, so that a separate decoding circuit for the program output is not required. With the exception of the resistors 1, 2 and the capacitor 6, the programmer can completely be carried out in integrated circuit technology. The fact that in individual positions of the shift register only one of the resistors and in the other positions two resistors can be switched on in parallel with η resistors all in all

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different times are formed. It is of course possible to have more than two resistors in individual positions to be switched on in parallel, whereby the number of possible combinations can be increased again. By conform de arrangement of the switches in series with the resistors and the outputs of the shift register Switched logic gates can set the resistors in any order and any combination gen of the shift register are assigned. For this purpose, it is preferably provided that the logic gates are freely programmable Form programming logic.

To achieve a low power consumption, the logic gates, the transmission gates and the shift register

preferably in integrated COS / MOS circuit technology , PA 1806

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(complementary symmetrical MOS technology). Finally, between the individual stages of the shift register and the outputs of the programmer advantageously switched to contactless alternating current switches (triac) or relays.

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Claims (5)

Landis & Gyr AG PATENT CLAIMS Electronic programmer, especially for a burner control unit, with several timers that can be switched on one after the other by a position counter, each consisting of one. resistance and a capacitor common to all timing elements, and with a threshold switch connected to the capacitor, the switching of the position counter and the discharge when a specified capacitor voltage is reached of the capacitor triggers, characterized in that the position counter is a shift register (1O) whose clock input (9) connected to the output of the threshold switch (5) is that a transmission gate (3; 4) and the transmission gates are connected in series with each resistor (1; 2) (3; 4) are connected via logic gates (18 to 22) to the outputs of the shift register (IO) that the Threshold switch (5) is a logic gate bridged by the capacitor (6) and that for discharging the capacitor (6) another transmission godet controlled by the threshold switch (5) (8) is arranged. ./. PA 1806 509 8 4 7/0299 2. Programmer according to claim 1, characterized in that that in individual positions of the shift register (1O) only one of the resistors (1; 2) and in the other positions at least two resistors are switched on in parallel. 3. Programmer according to claim 1 or 2, characterized in that that the connected between the transmission gates (3; 4) and the outputs of the shift register (10) Logic gates (18 to 22) a freely programmable programming logic form. 4. Programmer according to claim 1 or according to one of claims 2 and 3, characterized in that the logic gates (14, 18 to 23), the transmission gates {3; 4; S), the threshold switch (5) and the shift register (1O) are designed in integrated COS / MOS circuit technology. 5. Programmer according to claim 1 or according to one of the Claims 2 to 4, characterized in that a contactless alternating current switch is attached to each stage of the shift register (1O) or a relay is connected. LANDIS & GYR AG patent department HN / mb ■. . - - ·
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