DE2417371C3 - Multiple switching and alarming device - Google Patents

Description

frequency at which both the working and spare sides are used to control the one assigned to each side Switching contacts are assigned the same switching means and for which the respective criteria for the level and the synchronization on both sides are each fed to a monitoring circuit.

With phase-controlled oscillators and through the use of integrated circuits, it is economical Improved construction of support for carrier frequency systems possible. Downside to this The principle, however, is that in the event of an error in the phase-locked loop, a frequency is generated which is no longer synchronous with the control frequency. In order to recognize this faulty state, either the frequency deviation must be large enough so that it can be used in the TF system e.g. B. reported by the pilot or synchronous monitoring must be provided.

In the German Offenlegungsschrift * 21 43 072 are Phase-controlled oscillators of this type have already been described, in whose control loop the control voltage is applied simultaneously is monitored for their amount and their change over time in that time limit value detectors are provided, one of which is controlled via a differentiating element and which is connected via an OR element a bistable switch are performed, which emits an alarm voltage if the synchronism fails.

From the German patent specification 12 58 473 a device for switching a load from one is Operating carrier frequency generator on a substitute carrier frequency generator in electrical systems Carrier frequency communications technology known in which the operating carrier frequency generator and the equivalent carrier frequency generator are connected in parallel on the output side and one generator each by switching off its supply voltage is out of operation.

The object of the present invention is to provide a switching and alarming device for switching from operation to replacement with phase-controlled oscillators, in the event of synchronization failure or if the output voltage falls below a target value one of several to monitoring generators all operating generators with only one switchover to replacement can be switched.

The multiple switching and switching device of the type mentioned at the beginning is the solution this object according to the invention designed in such a way that the synchronization criteria in synchronous detectors are generated, which are arranged in front of the changeover contacts, while the criteria for the Levels are generated by rectifiers, which are connected downstream of the switching contacts, that the output of each Monitoring circuit is connected to a first input of each first NAND gate, that these inputs are connected to one another via oppositely polarized diodes, whereby the connection point forms the output for the alarm in the event of failure of the operating or replacement side (B alarm), that the second inputs of these first NAND gates are not connected on the operating and the substitute side, that the outputs of the first two NAND gates both to a first pair of terminals and to each an input of two second NAND gates are carried out that the outputs of this second NAND gate are connected to each other and the output for the alarm recording in the event of failure of the operating and replacement side (Α-Alarm) form that the second inputs of the second NAND gate with a third pair of terminals and are each connected to one input of two third NAND gates, the second input of which is not connected is, while the output of this third NAND gate is connected to the output of the rectifier, the actuating means for the changeover contacts and a second pair of terminals connected is, and that the spare-side terminal of the second ίο terminal pair with the operating-side terminal of the third pair of terminals and the replacement-side terminal of the third pair of terminals with the operating-side Terminal of the first pair of terminals are connected. These measures result in a digital Switching and alarming device with which several operating and backup generators at the same time can be monitored both for their output level and for their synchronicity, with if one of the above-mentioned incorrect criteria occurs in one of the oscillators, an I ^ circuit is set to standby operation is made.

The multiple switching and alarming device can also be designed in this way in a further development be that the unconnected inputs of the third as NAND gate with the respective output fourth NAND gates are connected so that one of the inputs of the two fourth NAND gates is connected to the outputs the first NAND gate and the other inputs of the fourth NAND gate with the inputs are connected by inverters that the inputs of the inverters are led to a fifth pair of terminals are, and that the replacement-side terminal of the fifth pair of terminals with the operating-side Terminal of a fourth pair of terminals, the terminals of which are connected to earth.

This arrangement avoids switching over when one of the generators is on the substitute side is also disturbed.

You also want to avoid an automatic switch back to operation when the switchover causing errors on the operating side is eliminated, the switching device can also be designed in such a way that that with the elimination of the diodes connecting the first two inputs of the first NAND gate each of the one input of two sixth NAND gates with the respective outputs and the outputs of these sixth NAND gate are connected to the second input of the first NAND gate that this second Inputs for operation and replacement are interconnected and the output for the alarm Form failure of the operating or the replacement side, and that the respective second input of the sixth NAND gate can be connected to ground via a switch.

The synchronous detector consists of an exclusive OR gate with two inputs, its one input is supplied with the control frequency in the form of symmetrical pulses and its second input via a flip-flop circuit with the resulting output pulse of the phase discriminators all phase-controlled oscillators to be monitored is fed, whereby the monitoring on Synchronicity is ensured in a simple manner with several oscillators at the same time.

To combine the phase discriminator pulses into a resulting output pulse, a NAND gate with several inputs can advantageously be used.
So that false alarm displays caused by phase

Inequality between the control frequency voltage whose second input is not connected during the

and the output voltage of the flip-flop circuit output of these third NAND gates 3, 3 'each with

can arise, can be avoided, the flip- the output of the rectifiers Gl, G2, the Konlak-

Flop circuit by means of a pulse that is generated in a th U _B and Ub and a second pair of terminals v, v '

Pulse generator circuit from the control frequency er 5 is connected. The spare clamp / of the second

testifies is to be synchronized. Terminal pair v, v 'is with the operational side

The exclusive OR gate can consist of four NAND terminals w of the third pair of terminals and the replacement

Gates are formed. To render harmless side clamp w 'of the third pair of clamps w, w'

of interference pulses caused by the phase shift of the terminal u on the operating side of the first

Control voltage connected to the output pulses of the pair of terminals u, u ' .

Phase discriminators in the phase locked loops If you want to avoid switching if one

arise, it is advisable to switch the generator on the replacement side is also disturbed,

Exclusive-OR gate a low-pass filter and on off so the unconnected inputs F, F '

switching element formed by two transistors. the third NAND gate 3, 3 'with the respective

On the basis of the exemplary embodiments, the output of the fourth NAND gate 4, 4 'is connected to FIG

F i g. 1 and 2, of the synchronous detector according to FIG. 3 become. The inputs of the two fourth NAND

as well as the diagram according to FIG. 4 the inventor gates must then be connected to the outputs of the first

application explained in more detail. NAND gate 1, Γ and the other input of the

F i g. 1 shows the principle of monitoring and the two fourth NAND gates 4, 4 'with the on-switch. Operating and replacement plug-ins are ao gang 1, Γ of the fifth NAND gates 5, 5 'connected the same. Cross-connections are to be used to differentiate. The input H, H 'of the fifth NAND is provided between the terminals u, ν and w . Gate 5, 5 'is in each case on a fifth pair of terminals r, Soll not switched to a faulty replacement ζ and the replacement-side terminal z' of the fifth terminal, the connection y is also required with the operating-side terminal y of the Hch. The switching criteria are processed in the fourth pair of terminals y, y ', whose terminals are connected to by NAND gates. Here they offer themselves because of their earth lying, guided.

high interference voltage protection the gates from the If you also want an automatic reset

FZH series (LSL). The switching criteria are to avoid operation when switching

can be seen in the table below. The cross-causing error on the operating side has been eliminated,

connections and the alarm lines is each 30 so there must also be two inputs

Zero potential is the switching criterion, while 1 the sixth NAND gate 6, 6 'with the respective output

OFF state identifies or, if there are no past, C, C and the outputs of these sixth NAND

binding is present at the input. Gate 6, 6 'with the second input B, B' of the first

Two outputs are connected to sub-NAND gates 1, 1 'for the alarm. This second

Different value provided: B-alarm, if 35 inputs B, B ' for operation and replacement are also

only one insert is defective; A-alarm, if both inputs are connected to each other, whereby the first inputs are A.

Records have failed or if an insert has failed A ' the first NAND gate 1, Γ separately to the

fall and there is no second one. A once monitoring circuits Ü, Ü ' are performed. the

Occurring alarm is recorded and can be the second input D, D 'of the sixth NAND-

can only be deleted by pressing the LT key. 40 gate can be connected to ground via switches LT, LT.

In Fig. 1 is the operating mode on the left and the mode of operation of the circuit is shown on the right

the replacement page shown. The operational oscillator OB feeds as shown in the following table.

The upper half of the table shows the respective transmission via the contact U _B. If this generator fails, it becomes the automatic side and the lower part becomes the replacement side. In the table switched to the substitute page, the one with the 45 individual columns lists the respective alarm substitute oscillator and the corresponding contact options. If, for example, none has the same structure as the operating page. Both alarms are displayed, which is synonymous with it, sides is also a rectifier Gl, G2 that all the generators are assigned on the operating side and on the replacement side. The synchronization criterion will be in order, for example at output C the synchronous detectors SD and SD 'are generated, which before 50 of the first NAND gate on the operating side the switching of the respective changeover contacts U _B and U _E is criterion zero, whereby the changeover contact u _B are ordered, while the criteria for the level is closed by. On the substitute side there is the above-mentioned rectifier Gl, G2, which generates output C, function criterion 1, so that the changeover switchover contacts are connected downstream. switch contact u _B of the replacement side is opened passage of the output of the monitoring circuit U, T '55 is operational each alarm, is obtained at the output to an input A of the first NAND of the gate 1 a logic 1 and thus opening of the UmGatters 1, 1 connected . In addition, Em-d.ese switch contact u _B while now the outputs via oppositely poled diodes rmteman- transition of the gate 1 'of the replacement page logically receives zero, the associated. The second inputs of this first, whereby the changeover contact u * of the substitute side NAND gate are each unconnected. The Aus 60 is closed . Further details can be found in the corridors C, C of the first two NAND gates in the following table for the respective alarm situation, both on a first pair of terminals u, u and on

one input each of two second NAND gates 2, a major advantage of the switching principle according to FIG. The outputs k, k of these NAND gates of the invention lies in the inclusion of the synchronizers being interconnected. The second input of the monitoring in the switchover criteria. Before the "changeover second NAND gate 2, 2 is each with a switching contact", the synchronicity is used as the criterion, input E, E 'of two third NAND gates 3, 3' and after »Changeover contact shows the deviation of the level connected to a third pair of terminals w, w ' from its setpoint. The expression »Shift-

contact «should not be limited to a mechanical contact alone. B. an over be the operating voltage of switched amplifiers. The control loop of each oscillator is designed in such a way that that it includes the whole oscillator part. Every mistake

leads to the alarm and switchover via the lack of synchronicity. Since also with this Umschaltpiinzip the oscillator does not have to be switched off, the oscillation and synchronization of the Oscillator not to impose any special time constraints.

Function table only at 0 Switching Operation and operation operation replacement replacement Alarm . only at 0 on replacement replacement alarm no alarm alarm alarm Switch on No alarm alarm Operating side none no replacement replacement no operation dashed. gate alarm Switching present alarm present unavailable 0 0 0 1 1 0 0 0 1 1 1 1 1 1 0 0 A. 1 1 1 1 1 1 B. 0 0 1 1 1 1 C. 1 1 1 1 1 D. 1 1 0 0 0 0 E. 1 1 1 1 1 F. 0 0 0 0 0 G 1 1 0 0 1 1 H 0 1 0 0 0 0 I. 1 1 0 0 0 0 K 1 0 1 1 1 1 A ' 1 1 1 1 1 1 B ' 0 1 1 0 1 0 C " T-H 1 0 0 1 D ' 0 0 1 1 0 1 E ' 1 0 0 0 1 - F ' 1 1 1 1 0 - G' 0 1 0 1 0 1 H' 1 Γ 1 K '

In Fig. FIG. 2 shows a simplified circuit arrangement which is essentially like the circuit arrangement according to FIG. 1 is built. It differs from this only in that the gates 6, 6 ' can be omitted, the inputs B, B' of the gates 1, Γ connected to these gates are not connected and instead the inputs Λ connected to the associated monitoring circuits U, U ' , A 'of the gates 1, 1' are connected to one another via oppositely coupled diodes D, D ' .

This arrangement is particularly advantageous if the switch back to operation is to take place automatically after the error has been eliminated .

The Circuit according to FIG. 3 that can centrally monitor many phase locked loops.

An alarm is passed on to the switchover when:

1. Non-synchronicity of a phase-locked loop, caused z. B. by failure of the control frequency, Failure of the phase-locked loop oscillator or a frequency divider.

2. Interruption of the necessary connection lines for synchronous monitoring between the synchronous detector and the phase locked loops.

Synchronous monitoring is also used

the bandwidth of the low pass in the phase locked loops is switched. This makes it possible to use the Make the capture area almost as large as the drag area.

The synchronous monitoring consists of a synchronous detector, which is followed by a switching stage for the alarm transmission to the switchover. The synchronous detector consists of digital circuits (TTL) in »low power technology«. The switching stage consists of a low-pass filter and two transistors with the associated resistors. In this way, the space and power requirements can be kept very small. The core of the synchronous detector consists of ;

the exclusive-OR gate 10 (four NAND gates 16,17,18,19) with two entrances. The control frequency fst is fed to one input (A) in the form of symmetrical pulses, while the second input (D) is fed by the resulting output pulse of the phase discriminators via a flip-flop circuit 11 sensor control loops of the oscillator, not shown fed. The resulting output pulse is created by combining the phase discriminator Pulse sequences of the phase locked loops in NAND gate 12 with a corresponding number of inputs to which the individual phase discriminators are connected. The output of the flip-flop sol be in phase with the control frequency to avoid false alarms. For this reason i

609 641/31

£ «* 1 / JII

the flip-flop circuit 11 is synchronized in phase (synchronization input B) by means of a narrow pulse which is generated from the control frequency fst via a pulse generator stage 24 (three NAND gates 13, 14, 15).

The logic sequence for the synchronous detector is shown in the pulse diagram according to FIG. 4 can be seen. Due to the phase discriminators in the phase locked loop, the resulting output pulse is at the output C of the NAND gate 12 and thus also on

The output of the flip-flop circuit is delayed relative to the control frequency fst. As a result, the exclusive OR gate 10 emits a short interference pulse at output E , which, however, due to the low-pass filter 20 in the switching stage 23, does not lead to an alarm being sent to the switchover.

One of the possibilities to suppress the glitch could be through a delay element in the Control frequency feed to the exclusive OR gate 10 done.

For this purpose 3 sheets of drawings

Claims (8)

Claims: 24,371 1.Multiple switching and alarming device for switching from operation to replacement in S phase-controlled oscillators, especially for carrier supply devices of carrier frequency systems, with simultaneous monitoring of the output level and the synchronicity of operating and replacement oscillators with the control frequency, at which both the operating and the replacement side the same switching means are assigned to control the switching contacts assigned to each side and in which the respective criteria for the level and the synchronization are fed to a monitoring circuit on both sides, characterized in that the synchronization criteria are generated in synchronous detectors (SD, SD ') , which are arranged in front of the changeover contacts (ü, ug) , while the criteria for the level are generated by rectifiers (Gl, G 2), which are connected after the changeover contacts (us, ue) , that the output of each Monitoring circuit ( Ü, V) with each a first input (A, as A ') of first NAND gates (1, 1') is connected, that these inputs are connected to each other via oppositely polarized diodes, the connection point being the output for the alarm in the event of failure of the operating or the substitute side (B alarm) forms that the second inputs of these first NAND gates are not connected on the operating and the substitute side, that the outputs (C, C) of the first two NAND gates are connected to a first pair of terminals (u, u ') and to one input each of two second NAND gates (2, 2') are performed so that the outputs (A ₁ K ') of these second NAND gates are connected to one another and the output for the alarm in the event of failure of operation - and substitute side (A alarm) form that the second inputs of the second NAND gate (2, 2 ') with a third pair of terminals (w, w') and with one input (E, E ') of two third NAND Gates (3,3 ') are connected, the second input of which is not connected, while the output this r third NAND gate (3, 3 ') each with the output of the rectifier (Eq, G2), the actuating means for the changeover contacts (ü, ü) and a second pair of clamps (v, v ') is connected, and that the replacement-side clamp (v') of the second pair of clamps (v, v ') is connected to the terminal on the operating side (tv) of the third pair of terminals and the replacement-side terminal (w ') of the third pair of terminals (tv, »ν') are connected to the operating-side terminal (u) of the first pair of terminals (u. u) (Fig. 2). 2. Mehrfachumschalte- and alarming device according to claim 1, characterized in that the non-connected inputs (F, FO of the third NAND gate (3, X) are connected to the respective output of the fourth NAND gate (4, 4) that the one Inputs of the two fourth NAND gates with the outputs of the first NAND gates (1, Γ) and the other inputs of the fourth NAND gates (4, 4 ') with the inputs (/, /') of inverters (5 , 5 ') are connected so that the inputs (H, H') of the inverters (5, 5 ') are led to a fifth pair of terminals (2, z') and that the replacement-side terminal (Z ') of the fifth pair of terminals is connected to the operating-side terminal 00 of a fourth pair of terminals (y, y'), the terminals of which are connected to earth (Fig. 1 and 2). 3. Vielfachumschalte- and Alarmierungsvornchtung according to one of the preceding claims, characterized in that with the elimination of the two first inputs of the first NAND gate connecting diodes each of the one input of two sixth NAND gates (6, 6 ') with the respective outputs ( C, C) and the outputs of these sixth NAND gates (6, 6 ') are connected to the second input (B, B') of the first NAND gates (1, 1 ') so that these second inputs (B, B ') are connected to each other for operation and replacement and form the output for the alarm in the event of failure of the operating or the replacement side (B-alarm), and that the second input (D, D') of the sixth NAND gate via switch ( LT, LT) can be connected to ground (Fig. 1). 4. multiple switching and alarming device according to one of the preceding claims, characterized in that the synchronous detector consists of an exclusive OR Gaxter (10) with two There are inputs, one input of which is the control frequency in the form of symmetrical pulses is fed and its second input via a flip-flop circuit (11) with the resulting The output pulse of the phase discriminators of all phase-controlled oscillators to be monitored is fed (FIG. 3). 5. multiple switching and alarming device according to claim 4, characterized in that that the resulting output pulses by merging the phase discriminator pulses the control loop in a NAND gate (12) takes place (Fig. 3). 6. Mehrfachumschalte- and alarming device according to claim 4 or 5, characterized in that the flip-flop circuit (11) means a pulse generated in a pulse generation circuit (24) from the control frequency is synchronized. (Fig. 3). 7. multiple switching and alarming device according to claim 4, characterized in that that the exclusive OR gate (10) is formed from four NAND gates (16, 17, 18, 19) (Fig. 3). 8. Vielfachumschalte- and alarming device according to claim 4, characterized in that that the exclusive OR gate (10) has a low-pass filter (20) and one of two transistors (21, 22) formed switching element (23) is connected downstream (Fig. 3). The invention relates to a multiple switching and alarming device for switching from operation to replacement in the case of phase-controlled oscillators, especially for carrier supply devices of carrier frequency systems, with simultaneous monitoring of the output level and the synchronicity of operating and replacement oscillators with the control