DE2400516C2 - Temperature compensated voltage stabilization circuit - Google Patents

Description

+ R ₃ AI _b3 -R ₃ AI _b2 (R ₃ IR <) AI _b2

enough,
whereby

45

50

A3 = ohmic impedance value of the third

Impedance;

Ra = ohmic impedance value of the fourth

Impedance;

A Vbe 3 = change in base-emitter forward voltage of the second transistor;

AIb 2 = base current change of the first

Transistor and

Ah 3 = base current change of the second

Transistor

and is connected between the base of the first transistor (Q ₂ ) and the connection (34).

The invention relates to a temperature-compensated voltage stabilization circuit according to the preamble of the claim.

In electronic circuit arrangements which consist of several separate integrated circuits exist, it is important that the bias network can provide a reference voltage whose Value is predictable and constant under all unfavorable conditions; that means that the Output voltage as a function of the supply voltage, the ambient temperature or the semiconductor parameters should be invariant. Although temperature-compensated voltage stabilizers of the type previously used have been equipped with devices for a long time, which temperature and voltage changes to compensate, no facilities are available to date to Vs £ changes and To compensate for base current f4) changes that result from process variables, with as Process variable denotes a deviation in the characteristic values, which is caused by the manufacturing process is conditional.

The principle of temperature compensation, which is used in TVECL drivers (Temperature and Voltage Compensated Emitter Coupler Logic), is based on the fact that two transistors, which operate at different current densities, have different base-emitter voltage fVfl £) temperature coefficients, so the change in base-emitter forward voltage versus temperature is different for the two devices; by coupling these two devices in a certain way, their differences can be used to cancel the temperature coefficient of a third device. Unfortunately, however, the earlier assumption that deviations in the value Vbe caused by manufacturing could be compensated for by the same circuit mechanisms which compensate for temperature changes tn is not correct. For example, in a normal TVECL circuit, the range of changes in reference voltage Δ Vref caused by process changes in Vbe can be represented by the following relationship:

= 1

dV _B

_BE

or

AV _RFF = A V.

BE

and can assume values from ± 20 mV to ± 40 mV. This is a very significant deviation if the Reference voltage is used to generate an ECL gate or the like (Emitter Coupled Logic = emitter-coupled logic) Logic), since the noise limit of normal integrated ECL circuits is of the order of magnitude is only 100-150 mV.

A circuit for generating a temperature-stabilized, constant reference voltage of the type described above is known from US Pat. No. 3,617,859. In contrast, the invention is based on the object of compensating for possible changes in the value beta, that is to say the quotient of Je and Ib, which can occur as a result of process variables, that is to say at least partially or, under certain circumstances, practically completely eliminating them.

According to the invention, in a temperature-compensated voltage stabilization circuit, the input described type intended for beta compensation (where beta is the ratio of the emitter current to the base current of a transistor) is an arrangement with the characterizing features of claim in insert the circuit.

A particular advantage of the present invention is that it uses the circuit according to the invention can be in order to deliver a reference voltage, the value of which can be predicted with sufficient accuracy, even if the various component elements differ slightly due to variables in the manufacturing process have electrical characteristics.

Circuits that serve to stabilize the voltage are also described in US Pat. No. 3,114,872, US Pat. No. 3,538,421 and US Pat. No. 3,721,893. In none of these circuits, however, is a fifth ohmic impedance present or suggested, so that the desired beta compensation of the subject matter of the invention with respect to process variables cannot be achieved with circuits of this type.

Further useful applications and advantages of the invention result for the Those skilled in the art from the following description of preferred embodiments of the invention with reference to FIG Drawing.

F i g. 1 of the drawing shows schematically a simplified embodiment of a circuit for delivery a reference voltage which has a beta (/?) compensation embodied according to the invention.

F i g. 2 schematically shows another embodiment of a circuit according to the invention for Generation of a reference voltage which is suitable for supplying two reference voltages.

F i g. 1 shows, in a simplified and schematic manner, an integrated circuit (IC) trained voltage stabilization circuit according to the invention. Although the individual elements of the Circuit are shown in the usual way as separate electrical components, it can be assumed that that these elements are only representative of the electrical properties which the various Have components of the integrated circuit.

The stabilization circuit, which can also be referred to as a pre-voltage driver, contains three outer contact points, namely a first terminal 12, to which a positive supply voltage potential is applied, a second terminal 14, to which a negative supply voltage potential - Vee is applied, and an output terminal 16 , from which the reference voltage Vref, related to terminal 14, can be tapped. The circuit is basically a voltage divider circuit which contains a passive resistor R \ between terminals t2 and 16 and which is in series with an active resistor R _a between terminals 16 and 14.

The part of the circuit which forms the active resistor contains an arrangement which can generally be viewed as a parallel connection of three series circuits 18, 20 and 22 between the circuit points 24 and 26. The first series circuit 18 contains a second ohmic resistance element, which is symbolized by the resistor R ₂ , and a device which carries current only in one direction, for which the diode Q _{1 is used} as an example. The second series circuit 20 contains a third ohmic impedance Rj, an npn-Transis'.or Q ₂ and a fourth ohmic impedance R ₄ . The collector 28 of transistor Q ₂ is connected to node 24 through resistor R ₃ , while its emitter 30 is connected to node 26 through resistor Ra . Base 32 of transistor Q ₂ is coupled to the junction of resistor R shown as node 34 ₂ with the anode of the diode Qi via an ohmic impedance Rx, which has a certain value, which will be dealt with in more detail below. The third circuit 22 consists of an npn transistor Qj, the collector 34 of which is coupled to the node 24 and the emitter 36 of which is connected to the node 26. The base 38 of the transistor Q ₃ is connected to the collector 28 of the transistor Q ₂ .

If one now assumes for the purpose of illustrating the relationships that the base resistance Rx is not in the circuit and therefore base 32 is directly connected to the circuit point 34, the value of the reference voltage V _RE f can be represented by the following equation:

Vref- included

It - ■

Vrf \

(D

(2)

a ₂

- Ratio of the collector current / _r2 to the emitter _{current / e2 of} the transistor Q ₂ I _b3 = beta current of the transistor Q ₁

V _BE3 \

V _BE2 L = base to emitter voltages of the

V _BE3 I speaking indexed transistors

Inserting equation (2) into equation (1) one obtains

Vref =

V _BEJ

(3)

If one differentiates equation (3) according to the first variable V _BE3 , it can be shown that

= 1

or

Λ V _REF = Δ V _BE3

(4)

(5)

This change, which is approximately ± 20 mV to ± 40 mV in a circuit of conventional design, now has one of considerable importance when the reference voltage is used to control an ECL gate as the The noise limit of integrated ECL circuits of the usual type is of the order of 100-150 mV.

The second variable that causes changes in the reference voltage is the base current. the Dependency can be represented in the following way:

Vref = (h-Ib ₂ ) R ₃ + Vbe 3 + h 3R3

(6)

Taking the partial derivative is the change in reference voltage

A circuit of the usual type will usually have the following values:

I ₃ = AmA I ₂ = 2 mA

R ₃ = 600 Ω

β NOM - 100, β min ■

Δ Vref is then about 8 mV. Therefore, when the two components of change are added together, the total change in Vref can be shown to be on the order of 28 mV to 48 mV.

Since ECL gates require two reference voltages, the above error must be multiplied by a factor of two will. In the case of an ECL gate of the usual type, a reduction in the noise limit of approximately 56 mV to 96 mV occur. If the original noise limit is 125 mV, it can be seen that it is Lowering the noise limit would have serious consequences.

Since it is known that a larger part of the value Δ Vbe, which is the result of process deviations, is a function of beta (β) , one can set

Δ Vbe = KAβ (9)

And since the part of Δ Vbe which is a function of Aβ is very large at the low current levels which typically appear on transistor Qj,

the greater part of - can thereby be eliminated

Λ VgE ₃

be that a resistor Rx is used at the base of transistor Q ₂ . If so, equation (1) can be written in the following way:

Vref =

(10)

The change in V _REr as a function of ^ _£ and I _b is then

K ₄

(H)

If V _{REF b} invariant as a function of I and V _BE is then d V _REF may be equal NUII gesetzi, and the equation (11) by solving for R _x are written as follows:

_R _

₃ + R ₃ AI _b3 -R ₃ AI _b2 (.R ₃ ZR ₄ ) AI ₁₁₂

(12)

If one now deselects a value of which satisfies the above equation, the changes in the reference voltage caused by Δ V _{ß £} and Ah can be eliminated. In examples of the type listed above, the values for R _x are generally in the order of magnitude of 250-1000 ohms.

In Fig. 2 shows an exemplary embodiment which illustrates the application of the invention to a circuit for generating two reference voltages. In this exemplary embodiment, in which the two bias voltages Vbb and Vcs are to be generated, the circuit according to FIG. 1 three transistors Q ₄ , Qs and Qt and an additional resistor Rs are also provided. In this circuit, the collector 140 of transistor Qa is connected to terminal 112 , while its base 142 is connected to the lower end of resistor Ri at node 144 ; its emitter 146 is connected to collector 150 of transistor Qs .

ίο The base 152 of the transistor Qs is coupled to the connection point 154 of the lower end of the resistor Rs with the collector 134 of the transistor Q ₃ . The emitter 156 of transistor Qs is connected to the top of resistor R ₂ . Also, the collector 160 of transistor Q _{6 is} connected to node 144 , while its base 162 is connected to node 154 and its emitter 166 is connected to the top of resistor R ₃ . The reference voltage Vbb is tapped at terminal 170 and the reference voltage Vcs appears at terminal 180.

The remaining part of the switching elements corresponds to this

previous embodiment. Merely for reasons of manufacturing technology it is shown that a as Diode-switched transistor Q, instead of the one shown in FIG. 1 used simple diode is available.

If, as in the previous embodiment, it is first assumed that the resistance Rx is absent and the process deviation is not compensated for, the change A Vbei is included in the reference voltage Vcs and the change Δ Vbe * is included in the reference voltage Vbb . Since process deviations in Vbe on the same semiconductor plate have the same sign, the values of Vcs and Vflfl will change by approximately the same amount as the process deviation Δ Vbe, and the reduction in the noise limit over the process change Δ Vbe is therefore approximately equal to Δ Vbe ₃ + A Vbea- At the usual current levels is

A V bei = A Vbea = 20-30 mV

(13)

If one uses the resistor R _x in the described manner at the base of the transistor Q ₂ in the circuit, the process deviations Δ Vbe as well as the voltage changes across the resistors Rj and R ₃ , which are caused by changes in the base currents of the transistors Q ₃ and Qa are considerably reduced. The resulting improvement in the noise limit will accordingly be between 30 mV and 70 mV, depending on whether the voltage driver is used in an integrated SSI or an MSI circuit.

Given the above relationship, it can be shown that

AVb

'At

(14)

The change in voltage across R _x caused by Aβ changes the current through R ₄ , and it is

"AT

-V ₈ E ₂ -

and

AI _R4 =

¹ U

(15)

(16)

The change in voltage across R ₃ caused by the change in voltage across R _x is

Then it will be

AV _R3 = AI ₁ ^ aR ₃
or

AV _R3 = - a - A

(17)

(18)

R ₄

D ₌

_b3

a AL

(23)

(24)

if

AV ,.

-A

Vbej,

(19)

One can therefore use the total value of R _x , which is used to compensate for the process variables

the effects of the process of V _{BE are} canceled. The following equation can therefore be established:

AV _x a ^

^r AT-

(20)

When choosing a value for Λ * from equation (14), Equation (20) can be satisfied.

In addition, since the adverse effects of AV _B ez can be eliminated, Rx can be sized so that the base current loading effects at Rz or R] are canceled. If the emitter currents of Q ₃ and Qa are equal to and significantly greater than Ieι , and if R _{3 is} equal to R] , then Alb ₃ R _{3 is} completely eliminated and AlbAR] is reduced by 50%.

If you bet now

Al ^ aR ₃ = -AI ₁₁₃ R ₃
and substituted

AIa ₄ = -Al ₁₁₂ (R _x ZR ₄ )

(21)

(22)

A V

_BE3

is required, from equations (14) and (24) as follows:

(25)

The first term in the above equation is general, but the second term depends on the emitter currents in transistors Q ₃ and Q * and the relative compensation desired at Vbb and Vcs. If J _{E3 is} not equal to / _{£ 4} , then Al _b3 R _{3 is} not equal to AIbARi, and AlbAR \ is not reduced by 50%. Accordingly, either AIb ₃ R ₃ or AI ₀₄ R _{1 can be} totally compensated, but not both terms. In most applications it will be more desirable that one term be partially undercompensated or the other partially overcompensated.

The invention thus achieves the essential features and advantages that the effects of VW process deviations (A V _{f E3} and Δ V _B eo) are limited or even eliminated and the A IbR effects are considerably reduced.

1 sheet of drawings

Claims (1)

Claim: Temperature compensated voltage stabilization circuit with - a first terminal for receiving a first bias potential, - A second terminal for receiving a second bias potential, which opposite the first bias potential is negative, - An output terminal at which a reference potential relative to the second bias potential is to be generated - a first ohmic impedance for coupling the first terminal to the output terminal, - a second ohmic impedance and one only in the direction of the second terminal conductive current conductors, which form a first series circuit, which the output terminal with the second terminal connects, - a third ohmic impedance, the collector-emitter path a first transistor and a fourth ohmic impedance which form a second series circuit which is the output terminal connects to the second terminal, - wherein the base of the first transistor to the connection of the second ohmic impedance and the unidirectional conductor is connected, - and a second transistor, whose base connects to the collector of the first transistor, whose Collector coupled to the output terminal and its emitter coupled to the second terminal are, characterized in that for beta compensation (beta = ratio of the emitter current to the base current einf.s transistor) a fifth ohmic impedance (R _x ) is present, -to which is approximately dimensioned so that it corresponds to the equation