DE2330577A1 - DECODER WITH LOGICAL CIRCUIT FOR USE IN A FOUR-CHANNEL STEREO SYSTEM - Google Patents

Description

•Day. H. «ITSCHIRUCH!> * l 7 Il ζ 7

• ν «, κ. eunscHHAÄÄ * «'^<' ^w * '*

Dr. rar. Mt W. RÖBBER ng. J. SCHHtBT-EVERS

ιMuMCHEM22, iwMfciiiti.ig June 15, 1973

Sony Corporation SO434

7-35 Kitaeliinagawa

6-ohoae

Shinagawa-ku Tokyo / Japan

Patents tanaeldang

Decoder with logic circuit for use with a four-channel stereo system

The present jfcraa message is a partial port setting the one on July 17, 1972 under the 5? itel multiple signal transmission device filed and parallel application file number 272 439 of the applicant »

The present invention relates to multiple signal transmission apparatus and, more particularly, to improved decoding and reproduction by a number
loudspeakers in order to give a harvester an extremely realistic multi-channel sound program.

3098 * $ 1/00 *

SO434

A so-called four-channel stereo system has been proposed so far been, in which four original sound signals (which conveniently from L-, Lg, E-, and Rg for

"Left front" and "lirie rear * ¹ " and "right front" and "right rear" respectively) are converted into signals of only two channels by matrix networks called encoders for transmission or recording on conventional two-channel media such as for FM multiplex transmission or magnetic tape recording "To reproduce the coded signals from the two channel media, they are decoded into four signals by matrix networks, which are called decoders"

The corresponding original sound signals Ly, Lj ,, Rp and R _R are preferably only reproduced by separate loudspeakers. In matrix four-channel stereo systems of this type, however, in addition to the corresponding original audio signals, another audio signal is reproduced from another loudspeaker at the same time in the form of crosstalk, which is obviously undesirable, since this worsens the separation of the signals.

It has been proposed to eliminate this undesirable crosstalk-only the use of logic circuits. Such a logic circuit is called a "wave matching circuit". The basis of the logical Wave matching circuit consists in that the signals arriving at opposite ends of the arm are made up of individual corner signals are reproduced, have the same amplitude and in quadrature or phase shift ratio to each other stand. The wave adaptation logic recognizes this state and makes the assessment that a pair of equal signals,

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if they are exactly 90 to each other and only at one end of the room are present, represent transmitted signals which are to be attenuated · By · the selection of correct transitions the decoi sier matrix becomes the quadrature or chamfer shift ratio changed to a relationship that forms an in or out state that is more easily identified is called the quadrature ratio. A problem with circuitry of this type is that the wave adjustment logic must be connected to the internal circuitry of the decoder and not just to the Input or output terminals of the decoder.

In recent years, attempts have been made in practice to construct such decoders, which as integrated circuits are easy to manufacture. However, the use of such wave matching logic circuits requires that additional connection clamps on the decoder of the integrated Circuit must be provided. The cost of the integrated circuit is more or less directly proportional the number of terminals required, allowing the use of certain wave matching logic circuits the prior art, which require extra connection terminals in the decoder of the integrated circuit, its cost elevated.

A prior art integrated circuit, waveform matching logic circuit, in which an attempt is made to overcome this disadvantage is disclosed in an article entitled "Discrete vs. SQ Matrix Quadraphonic Disc" published in the July 1972 issue of Audio on pages 18-26. In the waveform matching logic circuit described with reference to Pig. 10 of the article

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is written, the inputs to the logic circuit are obtained from the outputs of the decoder and used to control the gain of amplifiers with variable gain, which are separately connected to the outputs of the decoder. However, as will be explained in more detail below, the waveform adaptation logic circuit does not generate an output control signal for attenuating the output signals "from the decoder when a mid-front or mid-back signal is present. It is necessary to provide additional logic circuits which are called Front-Back- Circuits are known to enable these positions to be recognized An example of such a front-to-back logic circuit is in a CBS Laboratories paper "SQ Logic Decoder — Theory of Operation" by RG Allen and BB Bauer, dated May 1 1972. With such a logical Y'orn rear connection, however, it is no longer possible, in response to a middle front signal (Gj ₁ ), for example, to simultaneously adjust the amplification factors of the amplifiers of the left and right Yorn signals (Lj ₁ and R _p ) and at the same time to attenuate the signal C-, which is also present in the rear audio signal channels, without also the dominant signal e Lg and Rg to attenuate in the rear audio signal channels.

A description of another type of waveform matching logic circuit is a file number in copending or U.S. patent application filed July 17, 1972 272 439 given to the applicant. In this patent application a logic circuit is disclosed, the effect of which: on

30 9881/0962

Wave matching and amplitude comparison methods. In the waveform matching circuit as shown in Fig. 3 of this application, the unwanted pTSase-shifted bub-dominating signals are eliminated by the waveform matching circuit, but the center-front and center-back signals which ^; 1m quadrature relation to each other, are not eliminated.

To eliminate the unwanted center-front and center-back signals so that the wave matching circuit works properly works, would have to have a pair of iseit-constant circuits anyway be connected or switched with a very short time constant within the logic wave adaptation circuit, so that the mid-front and mid-back signals are alert integrated and then deleted by the differentiating parts of the wave adaptation logic.

The disadvantage of such a modification of the circuit in the above-mentioned patent application of the applicant is that the control signal, which is derived from the wave adaptation logic, is also delayed by the operation of the time-constant circuit and thus a rapid response is prevented. This contradicts the properties of the logic wave matching circuit for ¹ elimination of crosstalk or crosstalk.

The above and other disadvantages are overcome by the present invention of a multi-signal decoder of the type overcome which first and second signal objects L- or IL, receives which dominating liztkaMmm- and right-front-

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Signal components 0Jp) or (Ep) and javeils have sub-dominant left-rear and right-rear signal components (Ln) and (Rn), respectively, the signal components Lg being of essentially the same size and essentially in a lagging phase shift ratio or quadrature ratio to one another are in the signal mixtures Lm and Rm and the signal components R ₅ are essentially of the same size in order to be in an essentially leading quadrature or phase shift ratio to one another in the signal mixtures L _m and Rm, the signal mixtures L _m and 8 _{m being represented} by the Decoder are converted into first, second, third and fourth separate output signals, which predominantly contain signals L ™ baw, R _p or L _ß or R _ß. The first and second decoding output signals contain sub-dominating signal components of the signal L _B and R ₅ , which are in a quadrature relationship to one another and in opposite phase relationship to one another between the first and second output signals, the third and fourth output signals being sub-dominating signal components L_ and R 5 which are in a phase shift ratio. R_, contain low amplitudes, which are in the quadrature ratio between the third and fourth output signals and in the opposite phase relationship to one another. A variable transmission device, such as e.g. B. Variable gain amplifiers are connected to first, second, third and fourth output terminals of the decoder. A logical device for the reduction of crosstalk or crosstalk is provided, wherein it has a first logical device with a first, second, third and fourth input connection terminal which is separate from the

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first, second, third and fourth output terminal block of the decoder are connected accordingly, as well as a device for separately rectifying the first, second, third and fourth input signals to the first logic Means, means for subtracting the second rectified input signal from the first rectified Input signal for generating a first difference signal and for subtracting the fourth rectified Input signal from the third rectified Input signal for generating a second difference signal, and means for comparing the first and the second difference signal for generating first and second control signals of opposite polarity. Separate input terminals of a second logical device are connected to the first and second input terminals connected to the first logical device. The second logical device further comprises a device for generating a signal which represents the sum of the first and the second output signal, as well as a signal, which is the difference between the first and second output signals represents a device for the separate rectification of the latter sum and difference signals and a device to compare the amplitudes of the rectified sum and difference signals to generate a third and a fourth control signal of opposite polarity. Furthermore, a device is provided to the first and the third control signal and to combine the gain factors of the first and second variable amplifiers To control the gain, the inputs of which are fed with the first and second output signals of the decoder

3 (39881/0963

and for combining the fourth and second control signals to control the gain factors of a third and fourth variable gain amplifiers, the inputs of which are connected to the third and fourth Output signal of the decoder are fed. One Means responsive to the third control signal mixes the outputs of the third and fourth amplifiers with variable gain, while a device which is responsive to the fourth control signal, the Outputs of the first and second variable gain amplifiers mixed

In the embodiment of the invention described above, the first and second logic circuits are the a logical shaft adjustment aBD position or a front rear Logic circuit, fed with signals directly from the output of the decoder and require no connections to the internal circuitry of the decoder. The decoder can therefore be an integrated circuit with a minimum number of connection terminals compared to the circuits of this type with the prior art be manufactured separately. In a preferred embodiment according to the invention, the logic front-rear circuit contains furthermore, no side-constant circuits, so the circuit controls the wave adjustment logic to eliminate crosstalk does not interfere. The logic circuits can easily be in the form of a single Glass or crystal plate of an integrated circuit

309881/0963

can be made without time-constant circuits. Thus, the cost of manufacturing a system such as that in this application described, significantly reduced.

The use of the mixer device enables the Outputs of the amplifiers, the amplification factor of which has not been increased in response to a central signal, mixed in such a way that the central signal is deleted from the outputs in which it does not belong properly. As explained in more detail below, this feature enables the amplifiers with variable gain the signals L ^ and R_, for example, in response to a Signal C ™ erhSfc.% Will be while the outputs of the amplifier the signals Lg and Rg were mixed to produce the Signal CL · to be deleted from the rear channels.

In a preferred embodiment are separate amplifiers to control the gain between the input terminals and the rectifier device of the logic Shaft matching circuit switched. With this out- The front-rear logic input signals become the leading form directly from the output of a pair of the gain control amplifiers of the waveform adjustment logic circuit powered so that it is not necessary to use additional gain control amplifiers only to be provided in the logical front-rear circuit.

Accordingly, an object of the present invention is to provide an inexpensive multi-signal decoder, in which the separation between channels is improved.

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Another object of the present invention is to provide waveform matching and front-to-back logic circuits which only with the output terminals of a multi-signal decoder can be connected.

Another object of the present invention is to provide a decoding system for a multiple signal transmission circuit, in which both the logic circuits and the decoder are in the form of an integrated circuit can be easily constructed.

In summary, the invention relates to a logic wave matching circuit and a logic front-rear circuit for use in a four-channel stereo decoder of the type in which two mixed signals L ™ and R ™ converts four output signals, which dominate signal components ü-p ', ftp' »Lg ¹ and Rg * contain accordingly, each of the output signals further containing subdominating .Signalkomponenten from crosstalk or crosstalk. The logic wave matching circuit contains a number of pre-wave rectifiers for separately rectifying each of the four output signals, a first subtraction circuit for generating a signal which represents the difference between the rectified output signals HmL-r, ¹ and R ™ ¹ , and a second subtraction circuit for generating a signal , which represents the difference between the rectified output signals Lg ¹ and R _B '. The outputs are compared in a comparator, which generates a first and a second control signal, each of which corresponds to the difference between the difference signals, but opposite

_ ₁₀ _ 309881/0962

opposite pdarity is. The output signals L 'and R' are also fed to a summing device and a differentiating device, the outputs of which are separately fully rectified and applied to a second comparator. The outputs of the second comparator are a third and a fourth control signal of opposite polarity. The third control signal is added to the first control signal and applied to control the gain factors of a first and a second variable gain amplifier, the inputs of which are the output signals L * and Rp ₁ 'from the decoder. The fourth control signal is added to and applied to the second control signal to control the gains of a third and fourth variable gain amplifier, the inputs of which are the output signals Lg ¹ and Rg 'from the decoder. The third and fourth output signals, from the front-rear logic circuit, are also applied to. to control two semiconducting mixer devices which are connected between the outputs ctes of the first and second variable amplifiers and the outputs of the third and fourth variable amplifiers, respectively.

The above and other objects, features, and advantages of the present invention skid better from a consideration of FIG following a more detailed description of certain preferred according to the invention Embodiments in connection with the accompanying drawings can be seen; show in it:

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Fig. 1 is a schematic circuit diagram of coding and decoding circuits of the type to be used in the present invention;

FIG. 2 shows a schematic circuit diagram of a decoding device with logic circuit arrangements according to a embodiment according to the invention;

Figures 3 and 4 are waveform diagrams of output signals derived at junction 86 for use in the explanation of the operation of the circuit shown in Fig. 2;

Fig. 5 is a schematic representation of the sound sources of the original sound field used in the following description are described;

6 is a schematic view of the magnitude of the output signal from the rectifier 90 in the embodiment shown in FIG. 2 for various purposes arranged audio signal sources;

Fig. 7 is a waveform diagram for use in explaining the generation of a particular signal am Transition 86 in the embodiment according to FIG. 2;

Fig. 8 shows the phase components of a mid-back signal to explain the present invention;

9 shows a schematic representation of the size of the output signal from the rectifier 92. in the embodiment according to FIG. 2 for differently

309881/096 ^

arranged audio signal sources j and

Pig · 10 and 11 phase images of the output signals from the summing junction 150 and the subtracting junction, respectively 152.

Referring now more particularly to Pig · 1, that figure shows a quadraphony sound system with which the present invention is intended to be used. An encoder 18 receives left front, left rear, pike rear and right front signals (Lp), respectively. (Lg) or (Rg) or (Rq) at its * input terminals 10 or 12 or 14 or 16. It also receives a 0.5 part of a middle _{signal (C 18} ) at its input terminals 10 and 16, respectively and a 0.5 part of a central rear signal (Cn) at its input terminals 12 and 14, respectively. The encoder converts the input signals into two output signal mixtures, denoted by L_b and R ™, at its output terminals 20 and 22. The phase components of these signals are shown by the phase diagrams next to the corresponding connection terminals. These mixed signals can be characterized in a complex notation as follows:

- 0.707R ₃ + 3 (0.707Lg)
+ 0.707L ₃ - j (0.707R ₃ )

(if C »and C _{B are} not present)

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Decoded mixed signals can then be sent to any appropriate two-channel medium are applied, as shown by the channels 23 and 25 ^ which, for example, the two Surfaces of a V-shaped groove of a stereo recording, a two-channel magnetic tape or an FM multiplex radio channel

could be.

After recovery from the two-channel medium, the composite signals L ^ and R ^ are applied to two input terminals 30 and 32 of a decoder 34, respectively. Then the composite signals with pairs of networks 33 baw. 40 and 42 and 44, respectively, are out of phase with one another in order to arrange the phasing components of the composite signals in a manner which favors selective addition and subtraction, and thus derive four output signals, each of which contains a predominant component which corresponds to one of the original input signals. The fundamental phase shift angle ^ * introduced by the JF networks is a function of frequency

Thus, the network 38 shifts the composite signal L "by the basic phase displacement angle ^, while the ^ network shifts the composite signal L" by a phase angle of ψ + 90 ° and the network 42 shifts the composite signal R ^ by a phase angle of ] £ +90 and the network 44 shifts the composite signal R ™ by the basic phase shift angle ψ. The output from the phase shifter 38 is applied to an output terminal 62 and the output from the phase shifter 44 to an output terminal 68 from. A 0.707 part of the output of the phase shifter 38 with the 0.707 part of the output from the phase shifter 42

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added, whereupon the received signal is sent to an output terminal 66 of the decoder 34 is applied. Equal negative parts of the outputs of phase shifters 40 and 44, i.e. H. -0.707 of the outputs from phase shifters 40 and 44 are combined in a summing junction 46, where the received signal to the output terminal 64 of the decoder 34 is created.

The first, second, third and fourth output signals, which appear at the output terminals 62, 64, 66 and 68 of the decoder 34, contain predominantly the original signals Lp, L "or Rg and R _p and various (-3dB) components of a Large of 0.707 of the other signals as represented by phaser groups 54, 56 and 58 and 60, respectively. These phaser groups are labeled L _p ^f , LgJ or » Eg 'and R- *.

Referring now specifically to Pig. 2 is the audible reproduction of these signals by an inventive Circuit described. The signals appearing at the output terminals 62, 68, 64 and 66 are applied to the inputs of the Gain control amplifiers 70, 76 and 72 and 74, respectively, are applied. The outputs from the gain control amplifiers 70, 76 and 72 and 74 apply to full wave rectifier circuits 70, 80 and 82 and 84, respectively. The task of the rectifier circuits consists of the negative Eliminate voltages so that a signal with a phase difference of 180 ° is the equivalent of a phase difference of 0 ° for symmetrical signals.

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SO434 Λ,

The output from the full wave rectifier 80 becomes the output of the Vad path rectifier 70 into a differentiating transition 56 subtracted. The difference signal output of the junction 36 is to a full level rectifier 90 by a time constant circuit 95 applied. The output from the Voü / vegrectifier is to a cut-off or Clipping circuit 96 applied. The output from the clipping circuit 96 goes to the positive input terminal a differential amplifier 94 is applied. The output from the full wave rectifier 84 is derived from the output of the Full wave rectifier 82 in a differentiating transition 88 subtracted. The differential signal output from the differential transition 88 is sent to a volumetric wave rectifier 92 applied by a constant circuit 96.

The voltage rectifier output from rectifier 92 becomes through a cut-off circuit 98 to the negative input terminal of the amplifier 94 Full-level rectifiers 78, 80, 82 and 84 are combined in a summing junction 151, the output signal being used for controlling of the gain factors of amplifiers 70, 76, 72 and with variable gain is used. The amplifiers Gain control 70, 72, 74 and 76 are selected to be identical or very similar To have gain factors over the control characteristics. The elements 70-94 incl. Form a logical one Wave matching circuit A.

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The elements described above generate a first control signal at the positive output terminal of the differential amplifier §4, this signal being applied to a summing junction 106 through a time constant circuit 104. A second control signal with a polarity opposite to the first control signal is generated at the negative output terminal of the differential amplifier 94 and applied to a summing junction 116 by a second time constant circuit 114. The output from junction 106 is applied through a limiter 108 to the gain control terminals of variable gain amplifiers 100 and 102, respectively. The inputs to amplifiers 100 and 102 are the signals appearing at outputs 62 and 68, respectively, of decoder 34.

The second control signal is passed from transition 116 a limiter 118 to the variable gain control terminals to a control amplifier 110 and 112 applied with variable gain. The entrances to the amplifiers 110 and 112 become out of the output terminals 64 or 66 of the decoder 34 derived. The outputs from amplifiers 100, 102, 110 and 112 will be the speakers 120 and 122 and 124 and 126 respectively. These speakers are in the left front, right front, Left back and pike back corner of a front room arranged.

It is assumed that the crosstalk components of Lg and Rg are not included in the output ^{signals η L-, 1} and Rp ¹ that appear at output terminals 62 and 68, respectively, a signal that is either positive (L «over-

- 17th

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steps EL ·) or negative (R ™ exceeds L- ), is, appears at the output of the transition 86. Since the middle front signal components of the signal (C ^) in the signals L ^ * and R 'are the same phaser "and the same amplitude they are deleted in transition 86, so that no mean forward signal appears at the output of transition 86

The difference signal from the transition 86, after rectification by the forward rectifier 90, is a positive signal. If the audio signal thus appears at the (one) left front position, as shown in FIG. 5, a relatively large positive signal appears at the output of the rectifier 90 (FIG. 6). If only one middle front signal is predominant (position BlTr. 2), no signal appears at the output of the rectifier 90. If a right front tone signal (Eg ₁ ) appears (the third position), a relatively large positive signal appears at the output of the rectifier 90. It can thus be said that when the original sound is between positions gins and two (left front and middle front), the control signal applied to the positive terminal of differential circuit 94 changes on line 130, as in FIG Fig. 6 shown. When the original sound is between the second and third positions (middle front and right front), the control signal varies on a line 132.

On the other hand, if the left front and right front signals (Lh and Rp) are not included in the signals Ln ^f and R _p 'and only the crosstalk components Lg and R ₃ ^ are included, only one positive signal appears

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Small size at the output stage of the rectifier This small positive signal represents the differences between the components Lg in the signals L 'and R' which are in a phase difference of 90 ° from one another. The combined signal Bg, as in Pig. 7, has a generally triangular wave shape. A similar signal is generated by differentiating the 90 -phase difference from Rt, -Bub-dominating signal components. Thus, referring to Figures 5 and 6, a small positive signal will appear from the output of rectifier 90 if only the right back signal is generated in position i _t. When the Tonia appears in the center rear position or fifth position, no output signal appears on the rectifier 90, and when the signal appears in the left rear position or the sixth position, a small positive signal appears again at the output of the rectifier 90.

It can thus be said that the phaser component C-o by the subdominating components of Rg -and L-g in the signals L- * and R "'combined into a whole is. However, these two signals Cg, which are combined to form a whole, are of the same amplitude and from the Phase each other (as shown in Pig. 8) so that they can be deleted in transition 86.

If the original signal is between positions three and four (right front and right rear), position four and five (right rear and middle rear) or position five and se, # ig _; (middle and left rear), then 4as varies at the output stage of the rectifier

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ters 90 appearing control signal on a curve, as is described by the lines 134, 136 and 138, as shown in FIG. Therefore, the two center front and center rear signal components contained in signals L 'and tt · ™' are deleted in transition 86, a feature which is important in the operation of logic circuit A. A similar result is achieved for the signals L ^ ¹ and Rn ¹ ;.

The amplitude characteristic of the output signal which appears at the output of the rectifier 92 is inPig. The crosstalk components of the center front and center rear signals (C ™ and CV,) contained in L- ^ ^{1 and R 'are canceled in transition 88 in a manner similar to that described above.} Thus, if the signals are predominant only in the left front or right front positions, only a relatively small amount of positive control signals will be generated at the output of rectifier 92.

By suitable selection of the time constants in the time constant circuits 104 and 114, it is possible to reduce this small voltage which is present when only the crosstalk components in the signals L-, ¹ , R ™ ¹ »Ii-d ^{1 un (} 3 · Ro ¹ , and this small voltage is reduced to zero. Since the output signals from rectifiers QO and 92 are applied to clipping circuits 96 and 98, respectively, clipping levels can also be selected (shown by line HO in FIG. 6), to cancel the sub-dominant signals Thus, the input signal applied to the positive input of amplifier 95 represents the

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Difference between the half component L "in the Signalge mixed Lj * and the main coaponent R ^ ₁ in the signal fi ^, ¹ , d. H,:

a,

Similarly, an input signal applied to the negative signal of the amplifier 94 becomes the difference between the main component L »in the signal Lo * and the main component Rq in the signal Rp ^{1 by appropriately selecting the cutting level of the cutting circuit 9β *} represent,. or?

^L B

^R B

Hit these two input signals can make the output signals also refer to the positive and negative terminals of amplifier 94

; _{t m} I. -L B. - R-D i B.

These signals are applied to gain level control amplifiers 100, TG2 *, 1TO and 112 as described above. The two signals have opposite polarities, which

- 21 -

are determined as follows. If the absolute value of the difference between L ₁ -, and R "is greater than the absolute value of the difference between Lp and Rg, namely if

^J B

so then the polarity of the signal at the positive output terminal of amplifier 94 is such that the gains of amplifiers 100 and 102 are increased while the polarity of the signal at the negative output terminal of amplifier 94 is maintained of the opposite polarity to the gains the amplifiers 110 and 112 to decrease accordingly. Signals that would otherwise be reproduced through the speakers 124 and 126 are consequently not heard by the listener, wherein Nebenspreehsig- nalkomponenten L "and H ,, in which the signal L ₅ ¹ and H" included ', are substantially eliminated , Similar results are obtained in the other channels. That is, if the absolute value of the difference between the signal components Lo and Rn is greater than that. .aba & ute value of the dif-

Yy x)

rence between L- ^ ₁ and

is, d. H. if

- R ₃₃ ¹ p - ^R F | ^L B

then an output signal is obtained at the negative output terminal of the amplifier 94, which has a polarity that is such is that the gains of amplifiers 110 and 112 can be increased, with the control signal at the positive

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OS434

The output terminal of amplifier 94 is of the opposite polarity to reduce the gains of amplifiers 100 and 102. This substantially eliminates the crosstalk component signals of Lg and H ₃ in signals L ^ ₁ ¹ and R _{p '.}

In order to underline the important features of the above-described logic level adjustment circuit A once again, it should be noted that since the components L, -, and R ₅₁ in the signals L ₁ J, 'and R *, respectively, are in phase, the contained therein iiittelvorn signal Cj, is deleted in the transition 86, similarly due to the fact that the center rear signals contained in the signals L _p 'and R · G. are out of phase, they are also deleted in transition 86 (since a phase difference of 180 ° appears as a phase difference of zero after rectifying the Vdtt path). In a similar manner, the signal components are Ln and Rp

or the signals Lv. ¹ and R ,, ¹ in phase, so that the signal CL · LIittelhinten contained therein is deleted in the transition 83, as well as the central front-signals C ™, mutually out of phase and are contained therein. This makes it unnecessary to provide a time constant circuit or circuits between the respective rectifiers 78 and 90 and the junction 86 and between the respective rectifiers 82 and 84 and the junction 88.

Y / ie explained above, generates the wave matching logic circuit A no output control signal for the center front or center rear signals. Since the middle front signal for the Attaching solo voices or instruments is particularly popular, it is necessary to add an additional, logical Provide front rear circuit arrangement B, which this

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Recognizes positions. The outputs from the amplifiers 70 and 76, which represent the signals 1 ^, 'and R ^, ¹ , are fed to the inputs of a summing junction 150 and a subtracting ^ junction 152 in order to produce a sum signal 154 and a difference signal I56, respectively as shown in FIGS. 10 and 10, respectively. The sum signal 154 is fully rectified by a rectifier 158 and integrated by a parallel RC circuit 162 before it is sent to the positive. Input terminal of a differential amplifier 160 is applied. The differential signal output from subtraction junction 152 is rectified by rectifier 164 and integrated by parallel RC circuit 166 before being applied to the negative input terminal of differential amplifier 160. The circuits 162 and 166 act as time constant circuits. The elements I50, 152, 158, 164, 162, 166 and 160 contain or form the logic front-rear circuit B.

The output signal from the positive Klönme of the amplifier 160 forms a third control signal which is added to the first control signal in the summing junction 106. It is also applied to the gate electrode of a field effect transistor 170, its drain and suction electrodes between the Outputs of the amplifier 110 and 112 are switched. The field effect transistor 170 acts as a mixer for mixing the Outputs of amplifiers 110 and 112 in response to the third control signal. That at the negative output terminal of the amplifier 160 derived output signal forms a fourth control signal, which with the second control signal

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added in the Suramierübergang 116 and also to the gate electrode a field effect transistor 172 is applied, the sink and suction electrodes .between the outputs the amplifiers. 100 and 102 are connected so that their Outputs are mixed in response to the fourth control signal.

It should be noted here that the signal components Ly and R_ in the summing signal 154 (Pig.10) are in phase, but the signals Rg and Ln are out of phase. Thus, a mid-back signal C _B (if any) is cleared in transition 150, but a mid-front signal (if any) is none the less preserved. On the other hand, in the difference signal 156 (FIG. 11), the signal components L ₅₁ and R ™ are out of phase, but these signal components Lg and Rg are in phase, so that if the Hittelvorn signal is present, it is deleted in transition 152 and the mid-rear signal C ₃ , if any, is obtained.

If there is a Hittelvorn signal, a Signal with a polarity that increases the gain of amplifiers 100 and 102 at the positive output signal 160 appears if

V ⁺ V

this third control signal being the gain control the amplifiers 100 and 102 is applied, and thus their amplification factors increase and the volume of the To reduce tones that appear in the LinJfövorn and right anterior

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Speakers 120 and 122 are generated. The third control signal is also applied to the gate electrode of the field effect transistor 172, so that the ^{means of signals contained in the signals L--, 1} and R- ^ ¹ are mixed and canceled. A signal of the opposite polarity is developed at the negative output terminal of amplifier 160, which lowers the gains of amplifiers 110 and 112 and renders field effect transistor 172 essentially non-conductive.

On the other hand, if the middle back signal is present, a signal of a polarity which increases the gain of amplifiers 110 and 112 appears at the negative output terminal of amplifier 160, this fourth control signal causing the gain of amplifiers 110 and 112 to be increased and mixing the signal outputs from amplifiers 110 and 112 so that the center-rear signals ^{contained in signals L ™ 1} and R 'are canceled. A signal of the opposite polarity is developed at the positive output terminal of amplifier 160, which reduces the gain of amplifiers 100 and 102 and makes field effect transistor 170 essentially non-conductive . power.

Thus, the circuit elements of the decoder 34 according to the present invention can be formed on only one semiconducting substrate. The circuit elements of the logic wave adjustment circuit A and the logic's front-rear circuit B can also be limited to only one

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OS434 "

semiconducting carrier material without external time constant circuits are formed. This makes the production of the decoding tone ignalsy st ems in the form of an integrated circuit much easier.

Eliminate the mixing pelde effect transistors 170 and 172 connected to the front-rear logic circuit B. Central signal from the (rear or front) channels, in which they do not belong legally, simultaneously if the Gains the amplifier receives in the correct (front or rear) channels and the gains the amplifier ii the wrong (rear or front) channels be reduced. In contrast to certain logical front-rear circuits, this according to the invention permits Signal mixing feature the lowering of the gain factors of the amplifiers in the wrong channels in such a way that aie are smaller than those in the prior art circuits so that the dominant signals are not too is reduced to a level that is barely audible or less frequent

The terms and expressions used here are only used for For purposes of description and not limitation, the use of such terms and expressions is used It is not intended to exclude equivalents of the features described and illustrated here or parts thereof, various modifications being possible within the scope of the appended claims.

309881/0962

Claims (8)

Patent claims Four-channel stereo system decoding device for converting a first and a second composite signal 1 ™ or R ", which contain dominant left-front and right-front signal components (L ^) or (R"), each of which has side-effect left-back and right-hand intensity signal components (Lt ₃ ) or . (Rt ₃ ) if present, the signal components L _x , have essentially the same size and are essentially in a quadrature or phase shift relationship to one another in the signal mixtures Lm and R, p and the signal component Ln in one of the signal mixtures Lm or R _{m is} in leading relationship to component L ^ in the other signal mixtures L _m and R _m and the signal components R _{ß have} essentially the same size and are in an essentially quadrature phase shift _{relationship to one another in signal mixtures Ln 1} and R _m, respectively and the signal component Rg in one of the signal mixtures Ιφ or R _m in the lagging ratio to the signal component Rg in _m the other signal mixtures L and R _M G-KEH-fc i ⁿ four separate output signals, which are referred to from first, second, third and fourth output signal, which predominantly signal component Lj _1, Rp or Lg and Rg included, with a deconding matrix with a first and a second input terminal to which the mixed signals L _m and Rm are applied, a first, a second, a third and a 309881/0967 - 28 - fourth output terminal to which the first, second, third and fourth output signals appear, with a number of phase shifting networks and a number of combining networks which are connected between the input terminals and the output terminals and connected to one another and are operative by substantially equal amounts of signal components L_, R ₅₁ , L ₅ and R ₅ as dominant signals in phase with each other to the first, second, third and fourth output terminal, the dominant signals Lp and R- are each accompanied by signal components Lg and Rg, which one : have low amplitude and are in quadrature relationship, the components Lp accompanying each of the dominant signals L- and R ₅₁ being in opposite phase to the components accompanying the other of the dominant signals and Rp, the dominant signals and Rg are each accompanied by signal components L-, and Rp, which are low Amp have litudes and are in quadrature relationship, and the _{components accompanying each of the dominating signals I 5} and Rg are in opposite phase to the signal components Rp accompanying the other of the signals Lg and Rg, with a first, second, third and fourth variable transmission means ageschlossen to the first, second, third and fourth Ausgangsklennne the decoding matrix, characterized by a first logic means having a first, second, third and fourth input terminal that with the first, second, third and fourth output terminal - 29 - 309881/0962 of the decoding matrix, the first logic device having first, second, third and fourth rectifiers for fully rectifying the signals appearing at the first, second, third and fourth input terminals of the first logic device, a first subtracting device for subtracting the second rectified signal from the first rectified signal to generate a first difference signal, a second subtraction device for subtracting the fourth rectified signal from the third rectified signal to generate a second difference signal, a first comparator device for comparing the size of the first and second difference signal to generate a first and a second control signal, a second logic device having means for receiving the signals applied to the first and second input terminals of the first logic device, a Combine! one device for combining the signals received by the first logic device , a third subtraction device for subtracting the signal received from the second input terminal of the first logic device from the signal received from the ex ^ fcen An output terminal of the first logic device is received, a fifth and a sixth rectifier for full-wave rectification of the output signals derived from the combining device and the third subtracting device, respectively, and by a second comparison device for comparing the magnitude of the output signals which are derived from the fifth and the third subtracting device sixth - 30 - 309881/0962 Rectifier means are derived, and for generating a third and fourth control signal, and by means for transmitting the first, second, third and fourth control signals for controlling the first, second, third and fourth variable transmission means. 2. Mehrfahsignaldecodergerät with a matrix device for receiving a first or a second Signalge », mixed L ™ or IL ₁ , which dominate left front and right front signal components (Lp) and (R“) contain and subdominating left back and right back - have signal components (Lns or Rg), the signal components L _ß having essentially the same size and the signal component "; Lg in the signal Lm in an essentially lagging quadrature relationship to the signal component L" in the signal R "and the signal components R, , have essentially the same size and the signal component R ^ in the signal R "is in a substantially leading quadrature relationship to the signal component Rg in the signal R", where the mixed signals Lm and R ™ are further converted into a first, Second, third and fourth separate output signals are used, which predominantly _{contain signal components Lj 1} , Ry, L _ß and R _ß , while d contain signal components of the signal Lo and EU which sub-dominate the first and the second output signal and which are in a quadrature relationship to one another, the signal component L _B in each first and second output signal in opposite directions - 31 - 309881/0962 Phase to the signal coraponent Rg in the other first and second output signals and the third and fourth output signals contain sub-dominant signal components L ^ ₁ and R- of smaller amplitude, where they are in a quadrature relationship to one another, and where the signal component L- in every third and fourth output signal is in the opposite phase to the signal component Rp in the other third and fourth output signal and a first, second, third and ■ fourth variable transmission device is provided, each of which has separate input and output terminals, characterized by a logic wave adapter with a first, second, third and fourth input terminal, means for supplying the first, second, third and fourth output signals to the inputs of the first, second, third and fourth variable transmission means and to the first, second, third and fourth input terminals of the first log ic device, the first logic device further comprising means for separately rectifying the first, second, third and fourth signals applied to the respective input terminals of the first logic device, means for subtracting the second rectified input signal from the first rectified input signal for generating a first differential signal and for subtracting the fourth rectified input signal from the third rectified input signal to generate a second differential signal, a device for comparing the magnitudes of the first and the second differential signal for generating a first and a second control signal of opposite polarities, a second logical front 309881/0962 SO434 43 Rear device with a device for generating signals which represent the sum and difference of the signals which are applied to the first and second input terminals of the first logic device, a device for comparing the magnitudes of these sum and difference signals for generating a third and a fourth Control signal of opposite polarity, means for combining the first and third control signals for simultaneously controlling the transmission characteristics of the first and second variable transmission means, means for combining the second and fourth control signals for simultaneously controlling the transmission characteristics of the third and the. fourth variable transmission means, means responsive to the third control signal for mixing the outputs of the third and fourth variable transmission means, and means responsive to the fourth control signal for mixing the outputs of the first and second variable transmission means zx Mix. 3. Multiple signal decoding device, characterized in that that the first, second, third and fourth variable transmission means amplifiers with variable Has gain whose gain factors are controlled by the corresponding control signals. 4. Device for decoding two channels of audio information in the mixed signals L- or R ™, whereby the signal L-, a left front signal (L ^) contains a predetermined Has amplitude and a zero reference phase, as well as a " ³³ " 309881/0962 Left rear signal (Lg) with a -SdB relative amplitude and a -90 ° relative phase, and a right rear signal (Rn) with a -ßdB relative amplitude and a zero reference phase, the signal (Η _β ) being a right front signal ( R "), which has a predetermined amplitude and a zero reference phase, a right rear signal - (Rn) with a -BdB relative amplitude and a + 90 ° relative phase and a left rear signal (I» -q) with a -ßdB Relative amplitude and a 180 ° relative phase, the decoder having a phase shifter matrix device for converting the mixed signals L _m and Rm into a first, second, third and fourth output signal, which have predominant signal components Lp, Rj ₁ , Lg and Rg , each being at a zero relative phase angle and the first output signal furthermore a -ßdB signal component R _ß with zero relative phase and a -BdB signal component L ₅ with -90 ° relative phase and the second output signal a -SdB signal component R _ß with + 90 ° - re relative phase and a -SdB signal component L _ß with an i80 ° -relative phase, the third output signal containing a -3dB signal component L ^ ₁ with +90 and a -SdB signal component, with I80 ⁰ -relative phase and the fourth output- contains a -βdB signal component L "with .0 ° relative phase and a -SdB signal component R _p with -90 ° relative phase, and with formerly first, second, third and fourth amplifiers with variable gain, the inputs of which with a first, second, third and fourth output signals are fed from the phase shift matrix device, characterized by a first logic device with a first, second, third and fourth input terminal, an input _ 34. 309881/0982 direction to feed the first, second, third and fourth output from the phase shift matrix means to the first, second, third and fourth input terminal of the first logic device, a first, second, third and fourth rectifier, corresponding to the first, second, third and respectively fourth input terminal of the first logic device for full-wave rectification of the corresponding output signals which are fed to the first logic device, a first differentiating device for subtracting the fully rectified second output signal from the fully rectified one first output signal for generating a first difference signal, a second differentiating device for subtracting the fully rectified fourth output signal from the fully rectified third, output signal for generating a second Difference signal from a fifth device to the fully rectified of the first difference signal, a sixth device for full-wave rectification of the second difference signal, a differential amplifier device to compare the magnitudes of the fully rectified second difference signal with the fully rectified first difference signal for generating a first and a second control signal with opposite polarity, a second logical device with a fifth and a sixth Input terminal connected to the first and second input terminal of the first logic device are, a first summing device for combining - 35 - 309881/0962 kidney the signals that are applied to the fifth and the sixth input terminal to a first sum signal to generate a third differentiator for subtracting the signal applied to the sixth input terminal is applied, from the signal that is applied to the fifth input terminal of the second logic device is applied, and to generate a third difference signal, a seventh full-wave rectifier for full wave rectification of the first sum signal, An eighth V ο Uwe ggle ich establishment facility for full wave rectification of the third differential signal, a second differential amplifier for comparison the size of the first fully directional sum signal with the size of the third fully rectified differential signal for generating a third and a fourth control signal in opposite polarities, means for adding the third control signal with the first control signal for generating a fifth control signal, a device for supplying the fifth control signal for simultaneously controlling the gain factors of the first and the second Amplifier with variable gain, one Means for combining the fourth control signal with the second control signal to produce a sixth Control signal, means for supplying the sixth control signal for simultaneous control of the gains of the third and fourth variable gain amplifiers, one first mixer device which responds to the fourth control signal responds and between the outputs of the first and second variable gain amplifiers is switched, and by a second - 36 - 309881/0962 SO434 3 Mi s rather device which responds to the third control signal responds and between the outputs of the third and fourth variable gain amplifiers is switched. 5. The combination according to claim 4, characterized by a five-tone, sixth, seventh and eighth variable gain amplifiers that are between the first, second, third and fourth input terminal of the first logic device and the first, second, third and fourth output terminals of the phase shift matrix device are switched by a second summing device, which is connected to the outputs from the first, second, third and fourth full path rectifier device for generating a combined seventh control signal is fed to the gain factors of the fifth, sixth, seventh and eighth amplifier to control variable gain simultaneously. 6. Apparatus according to claim 4, characterized in that the phase shift matrix device is fabricated as a first integrated circuit, and that the first and second logic devices are fabricated as a second combined integrated circuit are. 7. Combination according to claim 4, characterized in that the first and the second mixer device have field effect transistors, their sink and suction electrodes with the corresponding outputs of the amplifier " ³⁷ " 309881/0962 different degrees of amplification it is connected, and its Control electrodes are fed with the corresponding fifth and sixth control signals. 8. Combination according to claim 4, characterized in that that a first, second, third and fourth device for audible reproduction of the outputs of the first, second, third and fourth amplifier with variable gain in left front, right front, Left back and pike back positions of a listening room are provided. The patent attorney - 38 - 309881/0962