DE2230842A1 - Device for reproducing quadrophonic sound - Google Patents

Description

CBS C-1100

U.S. Serial No: 155.976

Filed: June 23, 1971

Columbia Broadcasting System, Inc, Stamford, Connecticut, V.St.A.

Device for reproducing quadrophonic sound,

The invention is related to the subjects of the following patent applications by the applicant: P 21 26 480.2 (corresponding to U.S. Patent Application 44,196 filed June 8, 1970); P 21 26 432.4 (corresponding to US patent application 44,224 dated June 8 1970); P 21 39 098.7 (corresponding to US patent application 81,858 dated October 19, 1970); P 22 04 098.8 (corresponding to US patent application 112,168 of February 3, 1971); P 22 08.099.5 (corresponding to US patent application 118,271 of February 24, 1971) and P 22 09 Ä24.2 (Corresponding to U.S. Patent Application 124,135, filed March 15, 1971.

The invention relates to systems for recording and playback four separate channels of information to and from a medium with only two independent tracks and concerns specifically a device for reproducing such information and its representation in four loudspeakers, in such a way that a listener it gives the impression that the sound heard comes from a corresponding number of separate sound sources. The invention more specifically relates to a decoder for improving the naturalness of reproduction in decoding the sound from one matrixed quadrophonic recording, which corresponds to the Procedure in accordance with the above-mentioned German patent application P 22 09 424.2 (US patent application 124,135) or a similar method has been recorded on a two-track medium.

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In brief, a matrixed quadrophonic recording usually contains four independent channels of information L-, L, _Rf and R, which are reproduced through separate loudspeakers in the left front, left rear, right front and right rear corners of a projection room should. These four information channels have been accommodated in the recording by means of a so-called quadrophonic encoder on two channels. An encoder suitable for this is shown in FIG. 8 of the aforementioned patent application P 22 09 424.2, but the decoder described here can also be used for the reproduction of signals, as with coders with a different structure, for example the coder from German patent application P 21 26 432.4 ( U.S. Patent Application 44,224), have been encrypted. The encoder generates two composite signals, ie two mixed signals, which can be recorded on a two-track medium such as a magnetic tape or a record using conventional recording technology. The two output channels, which are referred to in the following as R ™ and L ", can be recovered from a record using a conventional pickup or sent directly from the encoder and fed to a decoder, which converts them into four new signals, each with a dominant component. each of which corresponds to one of the original signals L-, L,, R, and R ^ sent to the encoder, but with a different phase position from the original signals.

An essential feature of the decoder is a combination of all-pass phase shifters, usually used in groups of two or more, to shift the components of the two composite signals so that they can be combined by addition and subtraction. Each phase shifter in a group effects a basic shift by a phase angle V _;

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which is a function of frequency, and a phase shift by an additional angle Δ which is substantially constant over the frequency range of interest. The angle Δ is normally 0 to 90 °, although other values can also lead to the same results, as will become apparent from the following description.

The nature of the coded signals and the importance of the phase shifters can be demonstrated with a brief description of the encoder shown in FIG. 8 of the aforementioned patent application P 22 09 424.2, which is shown here again as FIG. The encoder has four inputs 10, 12, 14 and 16, to which four input signals L 1, L 1, R 1 and R, are fed, which are shown as in-phase signals with the same amplitude. The full amount of the signal L ~ is added in a summing circuit with an amount of -0.707 of the signal R ^, and the output of the summing circuit leads to a phase shifter 20, which brings about a reference phase shift ψ which, as mentioned above, is a function of Frequency is. The full amount of the signal R- at the input terminal 16 is added in the summing circuit 22 with an amount of 0.707 of the signal L ^ at the input terminal, and the resulting output signal passes through a phase shifter 24, which also causes the reference phase shift ψ. The signal L. also arrives at a phase shifter 26 and the signal R arrives at a phase shifter 28, these two phase shifters causing a phase shift of ψ + 90 °. It should be noted here that the notation used here for the phase shifts relates to delay angles; However, as long as a certain notation is consistently retained, it makes no difference to the operation of the device whether the phase angles are lagging or leading. The full amount of the signal appearing at the output of the phase shifter 20 is added in a summing circuit 30 with an amount of -0.707 of the signal appearing at the output of the phase shifter 26 to give a at the output terminal 32

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To generate composite signals L ™. Similarly, the full magnitude of the signal from the phase shifter 24 is added in the summing circuit 34 with a magnitude of 0.707 of the signal coming from the phase shifter 28, the latter component being positive in this case. The signal emerging from the output terminal 36 is the composite signal Rj. The signals L _T and R _T can be recorded on any two-channel medium such as a two-track tape or a stereo disc for later playback, or they can be transmitted via FM multiplex radio.

The mixed signals appearing at the output terminals 32 and 36 are shown as vector groups 38 and 40, which are can be expressed in complex notation as follows:

L _T = L _f - o, 7O7R _b + do, 7O7L _b (1)

R _T = R _f + O, 7O7L _b - ά o, 7O7R _b (2)

In order for the recording to be reproduced via two loudspeakers using a conventional stereo record player is to achieve a more natural sound, the vector 0.707 L ^ in the vector group 40 should be the same Trailing vector in vector group 38 while vice versa the vector 0.707 R ^ in the vector group 38 corresponds to the corresponding Vector should lag behind in group 40.

The German patent application P 22 08 099.5 (US patent application 118,271 / describes a device for decoding the signals L _T and R _{T shown in FIG} γ + 0 ° and the other phase shifter of each pair introduces a phase shift of W + 90 °.

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Because of the relative phase shift by 90, the two vector groups at the outputs of those phase shifters that receive the signal L ^ ₃ are shifted by 90 ° to one another, as are the vector groups at the outputs of the phase shifters acted upon by the signal R ™. Thus, the vectors at the outputs of the four phase shifters are in a suitable phase position in order to obtain four separate output signals from them by means of selective addition and subtraction, in each of which one of the original signals L ~, L ·. Rj ₃ and R ^ for playback via four corresponding loudspeakers is dominantly included. These decoded signals are not the "pure" or discrete original signals, but each is "watered down" by two other signals. If, however, all four channels of the original program contain music in harmony and the four decoded signals are reproduced via respective loudspeakers in the corners of the projection room, then there is sufficient "mixing" of the sounds in the room for the listener, so that the entire sound effect corresponds to the sound consisting of four discrete channels is very similar and the original four-channel program is simulated in a credible manner.

However, there are cases in which the impression of greater independence or purity of the decoded signal is desired is. If z. B. If the original sound only appears in one or two channels, it is desirable to set the gain factor in the channels not acted upon by the original sound automatically to attenuate, whereby the separation of the active channels is improved. In addition, it is advantageous if the decoder between differentiates front and rear, especially when it comes to medium front and medium rear signals. In the Patent applications P 21 26 432.4 (US patent application 44,224), P 21 39 098.7 (US patent application 81,858) and P 22 08 099.5 (US patent application 118,271) describes three different logic and control devices for emphasizing signals,

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It is an important object of the present invention to provide better quadrophonic reproduction naturalness received than it can be achieved with the methods described above, and at the same time the circuit technology required for this to simplify.

These and other tasks are carried out according to a characteristic of the Invention solved with an improved logic, which the gain factors of the four output amplifiers of the decoder depending on the signals appearing in the decoder controls in such a way that the four-channel Playback is increased. It is a feature of the decoder that regardless of the "direction" one is assigned to the encoder Originally drawn signal is the dominant signal when played back at the output for the correct loudspeaker appears and unwanted side effect signals from other channels the same and either in phase or around 90 ° out of phase. The logic is designed to compare the voltages in adjacent channels with one another and control signals for reducing the gain factors of the output amplifiers of these channels are generated when the voltages are in phase or out of phase by 90 °, so that the side effect signals are eliminated. This means, the logic senses the presence of side effect signals and causes the gain factors to be increased accordingly the correct output amplifier so that the acoustic contributed by the active speakers Overall performance remains unchanged.

Regardless of changes in the level of the program, signals of essentially constant amplitude are used to compare the Voltages in adjacent channels are obtained by adding two decoder-derived signals that are the composite input signal

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and the signal mixture L ^ which is phase-shifted by 90 ° with respect to its phase position at the input, are supplied to associated control amplifiers which contain a device for keeping their output amplitude constant. The output signals of these additional control amplifiers are selectively added and subtracted in order to obtain two additional signals, likewise of essentially constant amplitude, which are similar to the two signals generated in the decoder and which are finally fed to two of the four loudspeakers. The four signals generated in this way are rectified separately, and the resulting waveforms are compared in pairs in, for example, two subtracting circuits, the outputs of which are in turn rectified. One of the rectified outputs is subtracted from the other to produce a signal of one polarity or the other which is indicative of the presence of side effect signals. Signals of one polarity control the amplification factors of the control amplifiers belonging to the two "front" loudspeakers in synchronism, and signals of the opposite polarity control the two "rear" loudspeakers in synchronism.

The ability of the logic to distinguish between "front" and "rear" signals is enhanced by comparison of the constant amplitude signal from one of the control amplifiers described above, preferably from the one with the signal mixture Rrj, loaded control amplifier, with the output a third additional control amplifier (whose output amplitude is also kept essentially constant is), which receives the composite signal L ™. The comparison happens by forming the sum and the difference of the two output signals, separate rectification of the sum and of the difference signal, and forming the difference between the two rectified signals. That part of the latter

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Difference signal which is above a predetermined value is compared with that of the one described in the previous section Wave-comparing logic (wave-matching logic) generated control signal added to the output-side control amplifier to apply.

According to another feature of the invention, discrimination of the decoder between front and rear without the use of a logic and control circuit thereby improved that one mixes the signals of some of the output channels of the decoder with signals of the other channels. To be more precise becomes a fraction of the signal in the "left front" channel with the "right front" signal and an equally large one or some other fraction of the signal in the "right front" channel mixed with the "left front" signal. In a similar way In each case, a partial amount of the signal in the "left rear" and "right rear" channel is converted to the full amount of the signal mixed on the other channel.

Other objects, features and advantages of the invention as well as details of the construction and mode of operation of the invention Equipment can be found in the following description and the attached drawings.

Figure 1 shows the scheme of an encoder for encoding the four original signals in two signal mixtures, the has already been dealt with in connection with the basis of the invention;

FIGS. 2 A and 2 B together result in a schematic drawing of a decoding device according to the invention;

FIG. 3 shows in a diagram the output of the logic distinguishing between the front and the rear of the logic in FIG device shown. ^ when a constant signal is "panned" in a full circle;

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FIG. 4 shows in a diagram the output of the wave comparator Logic of the device shown in Figure 2 when a constant signal over a full circle is "panned";

FIG. 5 shows in a diagram the values of the phase vectors for the four channels as a function of the direction angle for eight positions of a "swiveled" signal

FIG. 6 shows a series of vector diagrams for explaining the mode of operation of the decoder shown in FIG in the case of the channel mixing according to the invention.

The decoder according to the invention shown in FIG. 3 is similar in many respects to the decoder described in the aforementioned patent application P 21 26 432.4, of which in turn certain details are described in patent application P 22 08 099.5 (US patent application 118 271). The decoder input signals, _{labeled L T} and R _m and shown as vector groups 38 and 40, are applied to input terminals 42 and 44. The signal L _m arrives in parallel with two all-pass phase shifters 46 and 48, one of which causes a phase shift of W +0 and the other of which causes a phase shift of Ij) + 90 °. In a similar way, the signal Rm arrives at two all-pass phase shifters 50 and 52, the phase shift of which is T + 90 ° and Y + 0 °. The four phase shifters produce four signals on output lines 54, 56, 58 and represented by groups of vectors 62, 64, 66 and 68. In order to distinguish these signals from the encoded input signals and to indicate that they have passed through a group of phase shifters with a common phase shift y , the designations of the components of the phase shifted signals are provided with an apostrophe-like prime.

The signals appearing on lines 56 and 60 are each multiplied by a factor of 0.707 and added to a summing

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circuit 70 added to one another in order to generate a new signal at the output terminal 71 thereof. The signals on lines 54 and 58 are each multiplied by a factor of -0.707 and added to one another in the summing circuit 72 in order to generate a second new signal at the output 73 thereof. In the case of the decoder according to patent application P 22 08 099.ü (US patent application 118,271) the signals on lines 54, 71s 73 and 60 in associated amplifiers 74, 76, 78 and 80 are amplified and then fed to respective loudspeakers 82, 84, 86 and 88, where they are reproduced as tones whose composition corresponds to vector groups 90, 92, 94 and 96.

According to a feature of the present invention, use is made of the new finding that the naturalness of reproduction of a qaadrophonic sound is improved if the outputs of some of the channels are mixed with the outputs of the other channels prior to amplification. This mixing is done by four summing circuits 98, 100, 102 and 104, each of which adds the signal from one channel to a fraction of the signal from another channel. More precisely, the summing circuit 98 adds a partial amount η of the signal appearing on the line 60 with the signal on the line 54, and the output of this summing circuit is applied to the amplifier 74. In a similar manner, the summing circuit 100 adds a partial amount n ^{1 of} the signal on the line 54 to the signal on the line 60, and the resulting sum is fed to the amplifier 80. The summing circuit 102 adds a partial amount m of the signal on the line 73 with the signal on the line 71 and outputs the resulting sum to the amplifier 76, and the summing circuit 104 adds a partial amount m ^f of the signal appearing on the line 71 with the signal the line and gives the formed sum to the amplifier 78. It is

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practical and in many cases also satisfactory to make the fractions n, m and m ¹ equal to one another, but they can also be different in other cases. In general, it has been found that satisfactory results can be achieved with values for the fractions m and η between 25 % and 50 % , but other fractions can also be used. At this point it should be pointed out that the vector groups 90, 92, 94 and 96 are shown for the sake of clarity for the case that the fractions m and η have the value zero. The effect that the admixing a portion of the "left" output to the "right" channel, and vice versa ktorgruppen to the corresponding V _s on the front and rear speakers, is described later in connection with Figure 6, when the compensation of the in Figure 2 device shown is explained.

The phase vector groups 90, 92, 94 and 96 which characterize the sounds emitted by the four speakers 82, 84, 86 and 88, and which in a screening room are usually arranged so that the signals LJ, LJJ Rg and RJ are in the left front , the left back, right back and right front corners contain dominant signals ^L f * ^L b ^v ^ b ¹ ^ ^{10 R} f * ^The said vector groups also contain "side effect" signals from two other channels. These side-effect signals, as they occur in the matrix arrangement described up to now, are relatively less disturbing, but the quality of the quadrophonic sound reproduction is improved if the gain factors of the channels that exclusively carry side-effect signals are reduced in a controllable manner. This can be achieved by using variable gain amplifiers for amplifiers 74, 76, and 80 instead of fixed gain amplifiers and their gain factors depending on one of an electronic logic device

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supplied control voltage changed. Different shapes an electronic logic suitable for this purpose are described in some of the patent applications mentioned at the beginning. The present However, according to a further feature, the invention relates to an improved and simplified logic device which will be described below in connection with the improved matrix shown in Figure 2A.

The electronic logic according to the invention is shown in FIG. 2B and generates control signals for the control amplifiers by processing three developed from the matrix of FIG. 2A Signals, preferably those appearing on lines 60, 56 and 54. The reasons why this three signals are selected in preference to the others will become apparent in the course of the following description. Around to ensure that the signals to be processed by the logic, regardless of the signal strength of the Program are relatively uniform, the signals appearing on lines 60, 56 and 54 are initially transmitted essentially the same high-pass filters 110, 112 and 114 sent, which suppress frequencies below about 50 Hz that should not normally be detected by the logic. The filter pass-through curve above the cut-off frequency preferably runs in such a way that the control effect of the logic as well as possible the loudness perception of the ear for different Tones is adjusted. The signals coming from the filters are fed to the inputs of the associated control amplifiers 116, 118 and 120, their gain / control voltage characteristics are completely the same or very similar. It can be seen that the lines 60 and 56 represent the amplifiers 116 and 118 supplied signals from the outputs of the All-pass phase shifters 52 and 48 come so that the corresponding components of the composite signals Rm and Lm around 90 ° out of phase with each other. Due to this phase shift, the addition and subtraction of the

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signals supplied by the control amplifiers 116 and 118 receive two new signals, the properties of which are advantageous for the desired effect of the logic. Specifically, a partial amount of 0.707 of each of the signals provided by amplifiers 116 and 118 and appearing at points 130 and 132 are fed to a summing circuit 122 for addition to one another so that a new signal represented by vector group 124 is generated at its output in which the component Li is dominant. Similarly, in another summing circuit 126, a partial amount of -0.707 of the signal coming from the amplifier 118 is added to a partial amount of 0.707 of the signal supplied by the amplifier 116, so that another new signal, represented by the vector group 128, appears at the output of this summing circuit. in which the component R ^ is dominant. At the same time, the signal at point 130 has the dominant component R £ and the signal at point 132 has the dominant component Ll.

The four signals just described are rectified with rectifiers 134, 136, 138 and 140, respectively. These are preferably full wave rectifiers, each with a time constant circuit 142, 144, 146 and 148 is provided which have a short settling time on the order of a millisecond and a longer decay time on the order of causes about 20 milliseconds. The four rectified signals are combined in a summing circuit 150 added, and the sum signal is the control inputs 116 a, 118 a and 120 a of the control amplifier 116, 118 and 120 are supplied. The shown feedback of the sum of the rectified signals automatically and simultaneously regulates the gain factors the amplifier as a function of changes in the strength of the processed signals such that the

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14-223084?

The amplitude of the rectified signals is kept essentially constant.

Although only the signals from amplifiers 116 and 118 are used to generate the gain control voltage are, by applying this voltage to the control input 120 a of the amplifier 120 and its output level held essentially constant.

The circuit arrangement described for the feedback of the control amplifiers 116, 118 and 120 for keeping constant the output signals is not the only possible embodiment, the same purpose can also be used with others Measures are met without departing from the scope of the invention. For example, it is possible for all four rectified signals to use a single time constant element and / or to use an OR element to achieve the Select the strongest of the four signals and apply it to the control inputs of the three control amplifiers.

In summary, the control circuit described so far works in such a way that it selects the signals represented by the vector groups 68, 64 and 62 for the logical operation and keeps them all at a relatively constant level. In two of these vector groups, namely in groups 68 and 64, the signal components 0.707 L 'and 0.707 Rl are either in phase or out of phase. As in patent application P 22 08 099.5 (US patent application 118, 271), the disclosure of which is incorporated herein by reference, these signals can be used in a wave-comparing device to determine whether either a component L £ or a component RL is present. As already mentioned, by adding and subtracting these two signals in circuits 122 and 126, two new signals are obtained by the vector

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gate groups 124 and 128 shown. Signals in which the components 0.707 Lt and 0.707 Ri are also either in phase or are out of phase and can thus be used to determine whether a component LI or a component

J.

Rl is present.

According to the principle of the "wave comparison" described in patent application P 22 08 099.5 (US patent application 118, 271) to determine the presence of the components L £, R ^, LI. or RI are the four signals that are sent to rectifiers 134, 136, 138 and 140 are also fed to the rectifiers 152, 154, 156 and 158, which are preferably are full wave rectifiers. The rectified output signals of these elements are then paired in the subtracting circuits 160 and 162 are subtracted. In particular, the rectified signal appearing at point 132 in circuit 160 is different from that at point 130 appearing rectified signal is subtracted, and the rectified signal represented by the vector group 124 Signal is subtracted from the rectified signal represented by vector group 128 in circuit 162.

In the drawing, the rectifiers 152 to 158 are deliberately shown without RC elements to indicate that these rectifiers have a small time constant as desired. If ideal phase shifters were available, one actually needed no time constant terms, because the waves to be compared are then perfectly aligned with each other would be. Because of the imperfection of the circuits, these rectifiers are used with a relatively small one Time constant that lies between a fraction of a millisecond and a few milliseconds and is in the Practice is formed by the capacity of the connecting lines.

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The output signals of circuits 160 and 162 are in turn rectified by rectifiers 164 and 166, which are preferably also full wave rectifiers and have time constant elements 168 and 170. The resistance and capacitance values of these elements are chosen so that a rise time of about one millisecond and results in a decay time of about 20 milliseconds. Of course, these values can vary over a wide range without significantly impairing the effectiveness of the invention. The output signal of the rectifier 166 is in a subtracting circuit 172 from the output signal of the Rectifier 164 is subtracted, and the difference signal appearing at output 174, which represents the contribution of the Wave comparing logic to the control signal for the control amplifier 74 to 80 from Figure 2 A is to a Input of a summing circuit 176 applied.

The mode of operation of the wave-comparing logic, the details of which are described in patent application P 2,1 08 C99. "(US patent application 118,271), is briefly as follows: For example, if one or both of the signals L ^ and R ^ are present, then results in Vv ^r elle comparison of the rectified signals in the circuit 162, a zero signal at the output, because the said signals present the same amounts at the outputs of circuits 122 and 126 in detail. Since the signals L ^ and R ^ at the points 130 and 132 differ completely and are incoherent, the wave comparison of the rectified signals fed to circuit 160 does not result in cancellation, so that an output signal is present there Output 174. Other signal

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conditions can result in a correlation and cancellation in the circuit 160 so that there is a zero output, while at the same time the signals applied to circuit 162 are incoherent and thus generate an output signal, so that the output of circuit 172 is negative in polarity Has. The signal provided by circuit 172 (which can be positive or negative) becomes an input of the Summing circuit 176 (the other input to this circuit will be discussed later), and the output this circuit is fed to the transfer members 178 and 180 in parallel.

The transmission element 178 is a network which allows a control signal to pass through without changing its sign, and whose transmission function is designed in such a way that overdriving of the control amplifiers 74 to 80 is avoided. The transfer element 180 is the same as the transfer element 178 with the exception that it reverses the sign of the signal fed to it. Therefore, the output signals provided by the transfer members 178 and 180 for a given input signal are of the same magnitude, but of opposite polarity. The output signal of the transfer element 178 reaches the control inputs of the control amplifiers 74 and 80 via the line 179, and the output signal of the transfer element 180 goes via the line 181 to the control inputs of the amplifiers 76 and 78 the transfer element 178 without a change in sign, and when applied to the control inputs of the amplifiers 74 and 80, it increases their gain factors and cancels the signals LU emitted by the loudspeakers 82 and 88. and R ¹ I an. At the same time, the positive signal from the output of the circuit 176 in the transfer element 180

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inverted, so that when applied to the control inputs of the amplifiers 76 and 78, their gain factors are reduced, as a result of which the side-effect signals in the associated loudspeakers 84 and 86 are attenuated. Conversely, if one or both of the signals Ll and RL are present, a finite control voltage is established at the output of the rectifier 166 and a zero voltage at the output of the rectifier 164, which results in a negative control signal at the output 174 of the circuit 172 (and 176) . The positive control signal formed by the sign reversal in the transfer element 180 increases when applied to the control inputs of the amplifiers 76 and 78 their gain factors and raises the signals LM and Rj reproduced by the loudspeakers 84 and 86! at. At the same time, the negative control signal from circuit 176 reaches the control inputs of amplifiers 82 and 88 without reversing the sign through transmission element 178 and reduces the gain for the "front" loudspeakers.

The control amplifiers 74 to 80 are preferably subject to time constants such that their gain factor at Applying positive rising control signals can grow rapidly and when the gain control signal is decreased falls relatively slowly, as in the aforementioned patent application P 22 08 099.5 (US patent application 118,271) is described.

The mode of operation of the present wave-comparing logic is similar to that in the patent application just mentioned described. However, the use of amplifiers 116 and 118 with automatic gain control is different, to generate signals of substantially constant amplitude for wave comparison, and the manner in which the output signal of the wave-comparing logic with

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the output of a second logic circuit interacts to better separate the "front" and "rear" To achieve signals as described below.

The logic used in the present device to separate "front" and "rear" is in some respects similar to the corresponding logic according to the previously mentioned patent application P 22 09 424.2 (US patent application 124,135), so that reference is made here to the content of this patent application can be taken. The signals for this "front-rear logic" are derived from the outputs of the automatically controlled amplifiers 116 and 120, one of which is common to the amplifiers for deriving the signals for the wave comparing logic. The amplifiers 116 and 120 provide output signals with a relatively constant level, which correspond to the vector groups 68 and 62. The signals Li. And Rt. In these two vector groups are in phase, so that when a "front middle" signal is applied to the L ^ and the R _f input of the encoder shown in FIG. 1, the same amounts of such a "front middle" signal appear simultaneously with the components Ll and Rl in the two groups of vectors mentioned. As described in the last-mentioned patent application, the addition and subtraction of these vector groups, in the case of the presence of a "middle front" signal, produces a stronger overall signal when added and a weaker overall signal when subtracted. If, in the other case, a "middle rear" signal is fed to the coder according to FIG. 1 at the inputs for L ^ and R ^, the corresponding signals in the vector groups 62 and 68 appear out of phase, so that a weaker overall signal is produced with addition and with subtraction gives a stronger overall signal. These differences in the amount of the output signals are used in accordance with the cited patent application to determine whether the

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2U decoding mixed signals R ", and L", a "middle front "or a" middle rear "signal is present.

For this purpose, the output signals of the control amplifiers 116 and 120 become two inputs of a summing circuit 190 and also applied to the two inputs of a subtraction circuit 192, in which the output signal of amplifier 116 is subtracted from the output of amplifier 120. That at output 194 of the summing circuit appearing sum signal and the difference signal appearing at the output 196 of the subtraction circuit each rectified in an associated rectifier 198 or 200. The two rectifiers are preferred Full-wave rectifier and provided with time constant elements 202 and 204. The output of the rectifier goes to a positive input and the output of rectifier 200 goes to a negative input a subtraction circuit 206, which at its output 208 emits a differential signal which can fulfill a logical function.

The front-back logic described so far and its mode of operation compensate for the corresponding arrangement the patent application P 22 09 424.2 (US patent application 124,135) with one important exception. According to the older application, the voltage input of the front-back logic was logarithmic Controlled amplifiers, and since such Ver. are more subject to certain limitations in practice, they limited the sensitivity and control range for signals with strongly fluctuating levels. The usage of amplifiers 116 and 120 with automatically controlled amplification factor to maintain a high, essentially

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constant signal level improves the effectiveness of the Front-back logic.

The embodiment of the front-rear logic described here also differs from the embodiment described earlier by the important fact that the output the subtraction circuit 206 is connected to rectifiers 210 and 212 connected in anti-parallel, and that the output this rectifier circuit after suitable amplification is applied in an amplifier 214 to the other input of the summing circuit 176. The rectifiers 210 and 212 are biased (not shown) in such a way that they act as double limiters and only those are applied to circuit 176 Pass front-rear control signals that exceed a predetermined amplitude. The purpose and the mode of action this double limitation is explained below.

To better understand the need for the slicer and how to properly adjust it, it must be remembered that the front-rear control logic ^{is intended to work properly not only for the "middle front 11} and" middle rear "signals, but also for other types of signals, which may be contained in the mixed signals L _T and R ™ fed to the decoder, must not have any undesirable effects. As an example, consider the case where a signal is swung over all inputs for the four corners of the encoder according to FIG The effect of such a signal can be calculated if one takes into account the fact that a "middle front" signal C _f (direction angle 0 °) as an amount 0.707 C _f both on the left front (L ~) and on the right front (R _f) input of the encoder is displayed. When the signal is turned to the right, the left front signal falls to zero and the right front signal increases to the value one,

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according to the cosine respectively. Sine function. If the "pan" is continued from front right to back right, the input signal of the front channel of the encoder becomes smaller according to the cosine function, while the input signal of the right rear channel increases according to the sine function. It continues in a corresponding manner if the signal is swiveled from the rear right to the rear left and then to the front left. The total signal input power of the encoder remains constant because the sum of the sine square and cosine square is equal to one. The amplitudes of the _{signals generated at the outputs L 51} and R ™ of the encoder have been calculated for an input signal swiveled in the manner described. This can be used to calculate the output voltage generated by the front-rear logic. The results of these calculations are listed in Table I below, to which the following explanations are given:

a) in the first column the direction angle of the pan is given in degrees, where 0 ° is the front center, 45 ° right in front, 35 ° right behind, 180 ° mean the rear center, etc.

b) the second column shows the relative signal voltage the terminal L ™ and its phase position,

c) the third column shows the relative signal voltage at the terminal R _T and its phase position,

d) the fourth column gives the absolute value of the vector sum of the right and left signals L ^ and R ~,

e) the fifth column gives the absolute value of the vector difference of L _T and R ^ ₁ (absolute values were used in the calculation because the quantities corresponding to the vectors are rectified before subtraction, which is equivalent to obtaining an absolute value),

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f) the sixth column gives the difference between the values the sum column and the difference column (which corresponds to the signal at the output of the subtraction circuit 206 in FIG B corresponds).

TABLE I.

Direction Lm output R ^ output | L, „+ RJ
angle ^{A ll λ}

0 ° 0.707 at 0 ° 0.707 at 0 ° 1.414 22.5 0.383 - 0 0.924 - 0 1.307 45 0 - 0 1,000 - 0 1,000 67.5 0.271 -180 0.963 - 16.3 0.707 90 0.500 -180 0.866 - 35.2 0.542 112.5 0.635 -180 0.757 - 59.6 0.707 135.0 0.707 -180 0.707 - 89.9 1,000 157.5 0.707 -202.6 0.707 - 67.4 0.540 180 0.707 -225.1 0.707 - 44.9 0 202.5 0.707 -247.6 0.707 - 22.5 0.540 225 0.707 -270.1 0.707 - 0 1,000 247.5 0.757 -300.5 0.653 - 0 1.225 270.0 0.866 -324.8 0.500 - 0 1.305 292.5 0.963 -343.7 0.271 - 0 1.225 315.0 1,000 - 0 0.000 - 0 1,000 337.5 0.924 - 0 0.383 - 0 1.307 360.0 0.707 - 0 0.707 - 0 1.414

0.00 +1.414

0.54 +0.766 1,000 0.0

1.225 -0.518

1.305 -0.763

1.225 -0.520 1,000 0

1.305-0.765

1.414 -1.414

1.305 -0.768 1,000 0

o, 707 +0.518

0.541 +0.764

0.707 +0.518 1,000 0

0.541 +0.766

0 +1.414

The data given in Table I are shown graphically in Figure 3, with the solid circle indicating the signal amplitudes 1 means. It can be seen that the diagram has two large lobes or lobes 220 and 222 at 0 ° and at 180 ° and two smaller lobes 224 and 226 at 90 ° and at 270 °. The two larger corners have a Maximum of 1.414 and are arranged so that they are consistent highlight the front and rear signals.

209853/0887

The smaller tips at 90 ° and 270 ° are undesirable and actually harmful to the effect of the front-back logic, because they have the ability to shift a "sideways" signal forwards or backwards, depending on the direction of arrival of the signal, which is obviously an undesirable one Effect is. Measures are therefore taken to eliminate the side lobes 224 and 226, which is caused by the Diodes 210 and 212 formed double limiter happens. The diodes are biased so that they form a voltage block that suppresses all signals, their amplitude is equal to or less than the maximum amplitude of the side lobes. The effect of the double limiter is indicated by the dashed line Circle 228 indicated, indicating that all signals have an amplitude below that indicated by the circle amplitude shown can be suppressed. Because of the double limitation also the amplitude of the desired main lobe signals is decreased, the output of the slicer in amplifier 214 must be amplified before it goes to summing circuit 176.

The voltage generated at the output 174 of the wave-comparing logic is calculated using a similar calculation and the results are shown graphically in FIG. As in the diagram of FIG. 3, the means The solid circle shows the voltage value 1. The diagram according to FIG. 4 has four symmetrical lobes 232, 234, 236 and 238, whose maxima have the value 1 and are at 45 °, 135 °, 225 ° and 315 °. Superimposed on the diagram and drawn in dashed lines are those parts of the lugs 220 and 222 from FIG. 3 that are not suppressed by the double limiter and are marked with 220 'and 222 *. The latter Lugs practically "fill in" the dead or zero areas between the lobes of the signals from the wave comparator Logic for the signal directions "front" and "rear". It should be noted at this point that the gain factor

209853/0887 -25-

of amplifier 214 is adjusted so that the wave comparing logic and the front-to-back logic are properly matched in their interaction. To the sum of the signals generated by the wave-comparing logic (the effect of which on the control amplifiers 74 to 80 has already been described), the signals from the front-rear logic represented ^{by the lobes 220 ″ and 222 f are added.} The resulting sum signal is fed to the control inputs of the control amplifier via the transmission elements 178 and / or 180 in order to obtain an improved separation between the "front" and "rear" signals.

Looking at vector diagrams 90 to 96 in FIG. 2A, it can be seen that the decoding matrix is completely symmetrical. This symmetry makes it easier to maintain the balance, e.g. between the primary sound energy from the concert podium and the energy perceived from the hall. This essential feature of symmetry can also be seen when the signals from Table I are fed to the decoder. Table II below shows the relative Voltages and phase angles of the signals appearing at the outputs for the four loudspeakers 82 to 88. not What is shown in the table is the fact that the total power level remains perfectly constant at 3 dB regardless the direction angle of the "swiveled" signal.

- 26 209853/0887

- 26 TABLE II

Directional exit f. Exit f. angle front I ks rear left

Exit f.
front right

Exit f. Rear right

O 0.707 at 360 ° 22.5 0.383 - 360 45 0.000 - 360 67.5 0.271 - 180 90 0.500 - 180 112.5 0.653 - 180 135 0.707 - 180 157.5 0.707 ~ 157.1 180 0.707 - 134.4 202.5 0.707 - 111.7 225 0.707 - 89.1 247.5 0.757 - 58.9 270 0.866 - 34.8 292.5 0.963 - 16.1 315 1,000 - 360 337.5 0.924 - 360 360 0.707 - 360

0.707 at

0.707 -

0.707 -

0.653 -

0.500 -

0.271 -

0.001 -

0.383 -

0.707 -

0.924 -

Φ, ΟΟΟ -

0.962 -

0.866 -

0.757 -

0.707 -

0.707 -

0.707 -

315.4 °

337.7

360 0.0 0.0 0.0 0.0 0.0 0.0 0.0

360

343.8

325

300.8

270.6

293.1 315.4

0.707 at 360 ° 0.924 - 360 Φ, 000 - 360 0.963 - 343.8 0.866 - 325.1 0.757 - 301.1 0.707 - 270.9 0.707 - 293.3 0.707 - 315.6 0.707 - 337.8 0.707 - 360 0.653 - 360 0.500 - 360 0.271 - 360 ο, οοο - 360 0.383 - 360 0.707 - 360

0.707 at

0.707 -

0.707 -

0.757 -

0.866 -

0.962 -

Φ, 000 -

0.923 -

0.706 -

0.381 -

0.001 -

0.272 -

0.501 -

0.654 -

0.707 -

0.707 -

0.707 -

134.6 ^C 112

269.5 59.2 35 16.3 0.1 0.0 0.0 0.0 180 179.9 179.9 179.9 180

157.3 134.6

It can be seen that for the directions 45

135 °,

225

and 315, which correspond to input signals R ~, R, L- and L ,,

b ^{D x,} the relative voltages at the associated loudspeakers have the value 1, while they have the value 0.707 in the respective opposite loudspeakers, which corresponds to the values entered in the vector diagrams 90 to 96 in FIG. 2A.

The amplitudes and phase angles of the signals from Table II are shown in FIG. 5 for eight pivot positions, each offset by 45 ° shown. The direction of the line in the middle square indicates the respective swivel angle, i.e. the one with 0 ° denoted arrow means a "middle front" signal in which like signals to the "left front" and the "left rear" channel, and the with

209853/0887

- 27 -

The arrow marked 180 ° means a "middle rear" signal, in which the same signals are fed to the "left rear" and (tem "right rear" channels) »The arrows drawn in each of the eight surrounding squares show, read clockwise starting from the left ie, in a pivotal position of 45, thus has front upper corner of each square, the relative amplitude and phase front of the left, right anterior, right rear and left rear signal component. in accordance with the entries in the R _1, designated square, at the output of the right The left front signal has the amplitude zero, the right front signal the amplitude eiiB, the right rear signal the amplitude 0.707 with a phase offset by 90 ° compared to the right front signal, and the left rear signal the amplitude 0.707 with the right front signal same phase and phase offset by 90 ° with respect to the right rear signal Signal components is the same as for the vector group 96 in Figure 2A, and the vectors entered in the squares labeled R ^, L, and L- correspond to those of the vector groups 94, 92 and 90. With a pivot position of 0 ° (corresponds to a "Middle front" signal), the wanted signals in the front speakers are equal and in phase, while the unwanted side effect signals are equal and out of phase with each other. When the latter two signals are attenuated, only the desired front signals remain. After the transition to the 45 ° position, which corresponds to an input signal in the right front channel, the side effect signals are the same and are 90 ° out of phase with one another. In the 90 ° position, the desired signals have the same amplitude (0.866) and phase offset from one another by 70 °, while the side-effect signals are the same and out of phase in both cases. When examining the remaining swivel positions, one recognizes that the un-

209853/0887 " ²⁸ "

wanted signals to be identical to one another and either 90 ° out of phase with one another or out of phase with one another in all cases are. The diagram thus illustrates that side effect signals are completely eliminated while simultaneously The desired signals are highlighted when a logical device controls the voltages in adjacent Compares channels and controls the gain factors of the output amplifiers of these channels in terms of attenuation, when the said voltages are 90 ° out of phase with each other or out of phase. This is exactly how it works the combination of the wave comparison logic with the front-back logic described above.

On the basis obtained with the diagram according to FIG. 5, the function of the mixing or adding circuits 98, 100, 102 and 104 will now be explained with reference to FIG. 2A. The figure has shown that the magnitudes of the signals in all four loudspeakers are the same when the swivel angle is 0 ° or 180 °, that is, when a "middle front" or a "middle rear" signal is supplied to the encoder. This is irrelevant if the logic circuit with the decoding matrix is used to suppress the undesired anti-phase side effect signals. However, if one wants to have a cheaper decoder (inferior to having the logic and control circuitry) it is desirable to improve the ability to discriminate the front and back of the matrix itself. Figure 6 illustrates how this can be achieved. This figure shows the vector groups 90 to 96 in solid lines and enlarged in relation to FIG. 2A in order to allow details to be better recognized. The vectors shown in dashed lines are the parts that are mixed by the signal LU to the signal Wl and vice versa, or the parts that are mixed by the signal LV to the signal Ri! and vice versa. The one for this crosswise mixture respectively

For the sake of clarity, 50% of the proportion used is shown in FIG. 6; it is usually around 25 to 30 % for m and n. In the vector diagram shown at the top left, the vectors are 0.35 H ^ and 0.35 and 0 , 5 Rj> contained in the same relative phase position as in the vector group 96, namely with a 50 % smaller amount. The resulting vectors from the addition of the drawn solid and dashed vectors are entered with dotted lines. For example, adding the drawn vector 0.7 Li with the dashed vector 0.35 L ^ results in the dotted vector 0.79 L £. It can also be seen that the cross-mixing produces a "middle front" signal in the two front channels increased to 1.06 Cj> and that a "middle rear" signal in the two front channels is greatly attenuated, namely to 0.353 Cj ₉ Conversely amplifies a "rear mittle res" signal in the rear channels to 1.06 Cl, while a "middle forward" signal C £ is attenuated in the rear channels to 0.353 C £. It can thus be seen that the mutual mixing of signals among the channels by the circuits 98-104 provides a good distinction between the front and the rear even without the use of the logic control circuit. In addition, the favorable position of the "front" and "rear" vectors, which results from the mixture, facilitates the task to be performed by the logic circuit. The mixture according to the invention thus brings a significant advantage, both in connection with the decoding matrix alone and in the more refined and thus more expensive combination of the decoding matrix with a control logic.

Since the matrix shown in Figure 2A is a linear additive device and the cross-mixing is just one more is additive operation, the circuit expense for

209853/0887 " ³⁰ "

slightly simplify the matrix ₃ without the one described above
To affect the way it works * As, for example
the input signal of the control amplifier 76 is composed
the end

0.70? E ₅₆ + ü _f 7ü7 E ₆₀ - ö, 7C7mE ₅₄ -C, 7O7mS _{58 (3>)} and the input signal of the control amplifier 78

-C, 70? E _{from 54} to 0.707 U ₅₈ + C ₅₆ + 707HiE 0,7C7mE _60; (4) the circuits 70 and 72 can be constructed so that the
operations required can be performed without the need for circuits 102 and 104.

The device described and illustrated is a preferred embodiment of the invention, ie _o there are numerous modifications within the scope of the invention possible. Although the Yorne-Hinten logic illustrated in Figure 2B is best implemented with signal voltages from lines 60 and 54, while the wave comparing logic is best implemented with
Signals from lines 60 and 56 works, you can achieve a somewhat less good wave comparison, for example, if you also use the voltages from lines 60 and 54 for this purpose. So it is possible to use both the wave-comparing logic and the front-back logic
to operate with only a single pair of variable gain amplifiers, such as amplifiers 116 and 120, thereby reducing the cost of the system. Although the quality suffers somewhat as a result, such an embodiment can be commercially attractive for less expensive sound reproduction systems.

209853/0887

Claims (1)

Claims. , 1. Decoder for converting two _{mixed signals L m} and Rm into four separate output signals, each of which has a different one of the signals L _f for "front left", R _f for "front right", I ^ for "rear left" as the dominant component , R _b for "rear right" contains if the signal L ^ in the first composite signal Lm and the signal R _{f is dominant in the second composite signal R m} and both composite signals _{contain the signals and Rj 3} in such a way that the signals L ^ in both signal mixtures have essentially the same amplitude and are phase-shifted by essentially 90 with respect to one another are, and that the signals R ^ in both signal mixtures have substantially the same amplitude and are out of phase with one another by substantially 90 ° by a) a decoding matrix with two _{input terminals (42, 44) receiving the mixed signals L m} and R _m and with a multiplicity of all-pass phase shifters (46, 48, 50, 52) and with a multiplicity of linking networks (70, 72) which are connected to the input terminals and give four output signals, in each of which a different one of the signals L ^, R ^, L ^ and R ^ is dominant, separately to four connections (54, 60, 71, 73); b) a mixing device (98, 100) connected between the first and the second connection (54, 60) for crosswise mixing of the output signals present at these connections; c) a mixing device (102, 104) connected between the third and the fourth connection (71, 73) for cross-wise mixing of the output signals present at these connections. 209853/0837 2. Decoder for converting two mixed signals Lm and into four separate output signals, each of which is the dominant component of a different one of the signals L- for "front left", R _f for "front right", I ^ for "rear left", R ^ for Contains "rear right" if the signal L _f is dominant in the first composite signal Lm and the signal R _{f is} dominant in the second composite signal R _m and both composite signals contain the signals L, and R- in such a way that the signals L- in. both signal mixtures have essentially the same amplitude and are phase-shifted by essentially 90 °, and that the signals R- in both signal mixtures have essentially the same amplitude and are phase-shifted by essentially 90 ° to one another, characterized by a) a decoding matrix with two _{input terminals (42, 44) receiving the mixed signals L m} and Rm and with a multiplicity of all-pass phase shifters (46, 48, 50, 52) and with a multiplicity of linking networks (70, 72), which are connected to are connected to the input terminals and generate four output signals e 'at four separate matrix outputs, each of which is dominated by a different one of the signals L-, R-, L, and R, with the dominant components L- and Rx. are each accompanied by weaker secondary components L, and R-, which are phase-shifted by 90 °, which also have 90 ° different phase in the two corresponding output signals, and the dominant components L, and R, each of weaker and 90 ° phase-shifted to each other Secondary components L ^ and R- are accompanied, which are also in phase opposition in the two corresponding output signals; b) four control amplifiers (74, 80, 76, 78), each of which is connected to a separate matrix output; - 3 - 209853/0887 c) a control device coupled to the decoding matrix and the four control amplifiers (FIG. 2 B), which are the amplitudes and phases of the secondary components at the first two matrix outputs (54, 60) compares and which the amplitudes and phases of the third and fourth matrix outputs (71, 73) Compares secondary components, and which the gain factors of the first and second control amplifier (74, 80) increased, and the gain factors of the third and fourth control amplifier (76, 78) decreased, if the secondary components at the third and fourth matrix output are the same and their respective phase angles are not smaller than 90 ° or not larger than 270 °, and which are the amplification factors of the third and fourth control amplifier increased and the gain factors of the first and second control amplifier reduced if the secondary components at the first and second matrix output are the same and their respective phase angles are not smaller than 90 ° or not larger than 270 °. Decoder for converting two mixed signals L ™ and Rm into four separate output signals, each of which has a different one of the signals L- for "front left", R _f for "front right", L _fe for "rear left", R _fe for Contains "rear right" if _{the signal L- is dominant in the first composite signal L m} and the signal R- is dominant in the second composite signal Rm and both composite signals _{contain the signals L 13} and R _b in such a way that the signals L ^ in both composite signals have essentially the same amplitude and are phase-shifted by essentially 90 ° with respect to one another, and that the signals R ^ in both signal mixtures have essentially the same amplitude and by essentially 90 °
denotes by are essentially 90 ° out of phase with one another, ge 209853/0887 a) a decoding matrix with two mixed signals C and Rm receiving input terminals (42, 44) and with a variety of all-pass phase shifters (46, 48, 50, 52), as well as with a variety of linking networks (70, 72) connected to the input terminals and four output signals, each with a different one of the signals L ^, R ^, L, and R ^ is dominant, separately given to four connections (54, 60, 71, 73); b) a mixing device (98, 100) connected between the first and the second connection (54, 60) for crosswise mixing of the output signals present at these connections; c) a mixing device (102, 104) connected between the third and the fourth connection (71, 73) for crosswise mixing of the output signals present at these connections; d) four variable gain amplifiers (74, 80, 76, 78), each of which is connected to a separate matrix output; e) a control device coupled to the decoding matrix and the four control amplifiers (FIG. 2 B), which compares the amplitudes and phases of the secondary components at the first two matrix outputs (54, 60) and which are the amplitudes and phases of the third and fourth matrix outputs (71, 73) Comparing secondary components, and which the gain factors of the first and second control amplifier (74,80) increased, and the gain factors of the third and fourth control amplifier (76, 78) reduced, if the secondary components at the third and fourth matrix output are the same and their respective phase angles are not smaller than 90 or not larger than 270 °, and which are the gain factors of the third and fourth control amplifier increased and the gain factors of the first and second control amplifier - 5 209853/0887 reduced if the secondary components at the first and second matrix output are the same and their respective Phase angles are not smaller than 90 ° or not larger than 270 °. 4. Decoder according to claim 1 or 3, characterized by a) an arrangement (100) for mixing a fraction (n ¹ ) the signal appearing at the first terminal (54) with the signal appearing at the second terminal (60); b) an arrangement (98) for mixing a fraction (n ¹ ) of the signal appearing at the second connection (60) with the signal appearing at the first connection (54); c) an arrangement (104) for mixing a fraction (m) the signal appearing at the third terminal (71) with the signal appearing at the fourth terminal (73); d) an arrangement (102) for mixing a fraction (m ¹ ) of the signal appearing at the fourth connection (73) with the signal appearing at the third connection (71). 5. Decoder according to claim 4, characterized in that the individual fractions are different. 6. Decoder according to claim 4, characterized in that the individual fractions are equal to one another. 7. Decoder according to claim 6, characterized in that the fractions are between 0.25 and 0.35. 8. Decoder according to one of claims 2 to 7, characterized in that that the control device (Figure 2 B) contains the following features: a) at least two additional control amplifiers (118, 116) each with a signal input, an output and a Control input (118 a, 116 a); 209853/0887 " ⁶ " b) a coupling device (56, 112; 60, 110) from the decoding matrix to the signal input of the one additional Control amplifier (118) a signal corresponding to the signal mixture Lm which is phase-shifted by 90 ° and that from the decoding matrix to the signal input of the other additional control amplifier (116) supplies a signal corresponding to the composite signal Em, to generate a first and a second signal at the outputs of the two additional control amplifiers; c) two logic networks (122, 126) connected to the outputs of the two additional control amplifiers, which generate a third and fourth signal (124, 128) from the first and second signals, which correspond to the signals are related at the third and fourth matrix outputs (71, 73); d) a circuit arrangement (134 to 150) which is coupled to the control inputs of the additional control amplifiers and which responds to at least one of the four signals generated _{and keeps the amplitudes of these four signals constant regardless of amplitude changes in the mixed signals L m} and Rm. 9. Decoder according to claim 8, characterized in that the last-mentioned circuit arrangement (134 to 150) has four Contains rectifier (134 to 140) for the separate rectification of the four generated signals and a summing circuit (150), which the control inputs of the additional control amplifier (116, 118) a of the sum of ' four generated signals supplies proportional gain control signal. 209853/0887 " ⁷ " 10. Decoder according to claim 8, characterized by the following Other features: a) a fifth, sixth, seventh and eighth rectifier (152 to 158) for the separate rectification of the four generated signals; b) two subtraction circuits (160, 162), which from the four rectified signals produce a fifth and sixth signal which is the difference between the first two rectified signals or the difference between the third and fourth rectified Signal are proportional; c) a first comparator (164 to 172) for comparing the fifth with the sixth signal. 11. Decoder according to claim 10, characterized in that the fifth, sixth, seventh and eighth rectifiers (152 to 158) have very short time constants. 12. Decoder according to claim 10, characterized in that the fifth, sixth, seventh and eighth rectifiers (152 to 158) have very short time constants that are essentially only are determined by the capacities of their connecting lines. 13. Decoder according to claim 10, characterized in that the comparator has the following features: a) a ninth and tenth rectifier (164, 166) for the separate rectification of the fifth and sixth signals; b) a subtraction circuit (172) which subtracts the fifth or sixth signal from the other and generates a control signal of one polarity or the other, depending on the differences between the first two rectified signals and between the third and fourth rectified signals; - 8 209853/0887 --er - c) a coupling of the control signal to an input of a summing circuit (176). 14. Decoder “oh claim 8, characterized by the following Other features: a) a summing circuit (122) and a subtracting circuit (126) each having two inputs and one output; b) a coupling of the output signal of one (116) of the additional Level amplifier to the first input of the adding circuit and the subtracting circuit; c) a coupling of the output signal of another (118) the additional control amplifier to the second input of the additive circuit and the subtracter circuit; d) a device (152 to 172) which separately rectifies and compares the signals appearing at the outputs of the adding circuit and the subtracting circuit and generates a control signal whose polarity indicates whether the components of the mixed signals L _T and R _{T are} generally "front" signals or generally "rear" signals. 15. Decoder according to claim 9, characterized by the following further features: a) a third additional control amplifier (120) with a signal input, an output and a control input (120 a) to which the control signal is fed; b) a coupling device (54, 114) from the decoding matrix ^ dem The signal input of the third additional control amplifier corresponds to the composite signal L “ Signal feeds; c) a summing circuit (190) and a first subtracting circuit (192) each with one output and two inputs, to which the outputs of the third and two 209853/0887 th additional control amplifier (120, 116) appearing signals are supplied, so that the summing circuit supplies a signal proportional to the sum of these signals at its output and that the subtraction circuit the signal appearing at the output of the second additional control amplifier (116) from the am Output of the third additional control amplifier (120) subtracting the appearing signal to provide a corresponding difference signal; d) a rectifier circuit (198 to 204) for separate rectification of the sum and difference signals; e) a second subtraction circuit (206) with one output and two inputs, which subtracts the rectified difference signal from the rectified sum signal and generates a control signal at its output, the polarity of which indicates whether the components of the mixed signals Ly and Rrp are generally "anterior""Signals or generally" rear "signals. 16. Decoder according to claim 10, characterized by the following Other features: a) a second comparator (190 to 206) which is coupled to the outputs of two of the additional control amplifiers (116, 120) and which generates a first control signal, the polarity of which indicates whether the components of the signal mixtures L ^ and R ₁ J are generally "front" or generally "rear"signals; b) a summing circuit (176) having two inputs and one output; c) a connection of the output of the first comparator (172) to the first input of the summing circuit; d) a double limiter (210, 212) connected to the second input the summing circuit only that part of the first - 10 209853/0887 Control signal from the second comparator supplies which exceeds a predetermined amount. 17. Decoder according to claim 16, characterized in that the double limiter consists of two anti-parallel connected diodes (210, 212) which are biased so that only that part of the first control signal is allowed through which is above about 55 % of its maximum value . 18. Decoder according to claim 9, characterized by the following further features: a) with a third additional control amplifier (120) a signal input, an output and a control input (120 a) to which the gain control signal is supplied; b) a coupling device (54, 114) which supplies a signal corresponding to _{the composite signal L T} from the decoding matrix to the signal input of the third additional control amplifier; c) a fifth, sixth, seventh and eighth rectifier (152 to 158) for separate rectification the four generated signals; d) two subtraction circuits (160, 162) the first of which the second rectified signal is subtracted from the first rectified signal and a corresponding one emits first difference signal, and the second of which emits the third rectified signal from the fourth rectified Subtracts the signal and outputs a corresponding second difference signal; e) a first comparator (164 to 172) which generates a difference proportional to the difference between the two signals first control signal generated; - 11 209853/0887 f) a summing circuit (176) at its first input receives the first control signal; g) one of the outputs of the second (116) and third (120) additional control amplifier applied to the second comparator (190 to 206), which generates a second control signal, the polarity of which indicates whether the components of the mixed signals L _T and R _{T are} generally "front" or generally "rear"signals; h) a slicer (210, 212) which the summing circuit (176) only supplies that part of the second control signal which has a predetermined fraction of its Exceeds maximum value; i) a coupling device (178 to 181) which the output signal of the summing circuit (176) either the first and second (74, 80) or the third and fourth (76, 78) to the control amplifier connected to the matrix outputs. 19. Decoder according to claim 18, characterized in that the fifth, sixth, seventh and eighth rectifiers (152 to 158) have very short time constants. 20. Decoder according to claim 18, characterized in that the fifth, sixth, seventh and eighth rectifiers (152 to 158) have very short time constants that are essentially only determined by the capacities of their connecting lines. 21. Decoder according to claim 18, characterized in that the first comparator has a ninth and a tenth Rectifier (164, 166) for the separate rectification of the first and second difference signals and a Subtracting circuit (172) contains which one - 12 209853/0887 223Ü842 - tent Subtracts the difference signal from the other and provides a first control signal, the polarity of which depends on whether one or the other difference signal is present, 22, decoder according to claim 18, characterized in that the second comparator has the following features: a) two circuits (190, 192), one of which is the sum and the other one of the difference between the output signals the second and third additional variable gain amplifiers (116, 120) generate a proportional signal; b) an eleventh and a twelfth rectifier (198, 200) for the separate rectification of these signals; c) a comparison device (206) for these rectified signals. 209853/0887