DE2243799B2 - Electronic tent delay element for single or multi-range tent relays - Google Patents

Description

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The invention relates to an electronic time delay element with a variable delay time for single or multi-range time relays, be. the the The time is preset by means of a pulse generator, the output pulse of which is in its frequency over a period of time Decades are changeable and over a plurality stepped reduction stages connected in series are fed to a switching relay with a delay, and at the at least one level with unchangeable constant Reduction ratio is connected downstream of the pulse generator.

Such devices are already known. One known delay circuit for a relatively long time Times uses a unijunction transistor which delays due to its high input impedance up to 100 see. allows after closing; a" Switching contact, z. B. a button, becomes a here Capacitor charged up the UJT transistor ignites and thus a relay winding is excited. Delay times of up to 5 hours can be adjusted according to ^ achieve the known circuit that the emitter of the UJT transistor with a diode, mU see low reverse current is connected

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to meet the extremely diverse requirements,

. ^u "*" of _the motorized technology to be placed on time relays ww »« _{and nier} b _e i at the same time the

Heroes, β ^ _{zdtrelaiSt their} Ugerhalterung and: _Η Λ To be able to simplify the variety of birds, have been since I? * Ti? jeit so-called multi-range time relay be ^ia ^ ^lc _{di ls} ejeku-omechanische relay formed with several """" j "" under setzunger, a setting TI Veraöeeninsszeit in multiple time ranges that the galvanized B * ^ _from seconds to hours, about ™ _ ^ ^ _made iichen.

p. _n ^e _weäen üicher advantage, especially the known ^ "mechanical timers, serving as timer" olu _ _onmmors, lies in its was- "π" y _{zuverlässjgen Ar} beit, we.se, in high S'rkehreenauigkeit! of the individual circuits even their versatility, in _{the re} ', _atively robust construction and their inexpensive production method.

For the purely electronic delay circuits mentioned at the beginning this cannot be said so far for various reasons ^

7time delay elements based on the

_n ~ "£," _kt £, _n j _k work, are through elaborate digital «£? ⁿ _{with the multitude} , _ogischer

^ SSf extraordinarily expensive. In addition, that gnaiig ^ delay times extraordinarily

fu ^ zumma J pulse generators, e.g. enthch ^ S ^{enau a} _{} quartz} oscillator or QgI., required

* P ^reche ™ £ ^S _{TO be driven en} de electronic effort was to be ucr too

^Som ™ _e 7 _{u times can} be used as electromechanical, apart from the * J ™ ^ ^r _s * _{hron motors}

Verzöeerunesßlied and ^r> igitalelektronik with multi-Verzogrunpgiie - _{and, een} ^^

J _verhä ¹ ^ _on ^P, _t ately simple RC Especially for the next short vo g time relay required

However, these RC- ^ "^" ^ κ 'are _expensive , since the _nsatore n very large capacities

_the evaluation circuit

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_set delay time

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one that can be set precisely and one as often as required

electromechanical

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Synchronous motof ^ od! for example also on ther-! Sem ways with a bimetal strip next to the size and retail price rft

Above mentioned electrical possibility can be specified. H Zek relay comparable to «jgj *« «·

Which types of delay are preferred depends on this task, according to the invention.

vonwMie vom Aftwendungsfal! away? and it will solve that the pulse generator with a digital

^ SZ \ S3 \ T au omatic ready-divider susafflmefl connected that between pulse

generator and the first divider stage a pulse amplifier is switched on and that each of the Tetler stages has a time delay ratio of 1: 1000 pretends.

This advantageously makes it possible for the pulse generator used to generate variable pulses in several decadic divider stages in the frequency range 1 Hz to 10 kHz, either in a ratio of 1:10 ^s with a single divider stage downstream or in a ratio of 1:10 * over two divider stages in series can be squat. The electronic effort can be kept small with a very precisely adjustable delay time with high repeatability, which also applies to the spatial dimensions of the performance. The time ranges summarized in the following table can be specified:

Adjustable time range s to Is 10 Frequency range until 1 kHz Divider of the relay until 10 s 1 of the generator until 100 Hz number 0.1 until 100 s 100 kHz until 10 Hz 1 Is until 1000s 10 kHz until 1 Hz 1 10 s until 10,000 s 1 Hz until 100 Hz 1 100 s until 100,000 s 100 Hz until 10 Hz 1 1000s up to 000 000 s 10 kHz until 1 Hz 2 10,000 s Hz 2 100,000 s Hz 2

Both the pulse generator used and the divider or reduction stages are integrated Building blocks represent, with a known such frequency divider operating and input voltages of has a minimum of plus 0.3 to a maximum of minus 20 V, while the output current is 2 milliamperes. These frequency dividers are largely insensitive to environmental influences; the operating temperatures can vary between -25 to +70 "C.

The fundamental difference between the present time delay element and known digital time relays can be seen in the fact that there digital time relays with a fixed generator frequency and variable divider ratio work, as a result of which the switch element for changing the dividing ratio is very expensive, while here with a fixed divider and variable generator frequency, d. H. with a frequency setting via potentiometer and therefore with a very inexpensive electronic circuit structure.

In the following an embodiment of the invention is explained in more detail with reference to the drawing:

After the positive voltage Ub has been applied , one of the capacitors charges via the resistors R ₁ and R ₂ , depending on the setting of the switch S. C ₁ to C ₄ .

The thyristor tetrode T ₂ , switched on by the programmable unijunction transistor , interrupts this charging when a certain voltage, which is specified by one of the potentiometers R _t to R ₉ , is reached and switches through. The resistor R ₁ resulting positive pulse turns on transistor T _1, which shorts the thyristor tetrode T ₂ and thus the Astabilität the arrangement ensures the across the resistor A ₃ according to the "open the thyristor tetrode T ₂ resulting negative pulse closes the transistor T ₃ and is thus counted by the first coaster U _1. If enough pulses have arrived at the coaster stage U ₁ , corresponding to the heating ratio, a positive pulse appears at the output of this coaster stage U ₁ , which, depending on the selected time range, in turn comes from the coaster U ₂ is counted or immediately ignites the thyristor T _t.

1 sheet of drawings

Claims (1)

Claim: completely different requirements * 5 the escalators or dg !, be. Electronic time delay device with varlabier Delay time for single or multiple areas Time relay, in which the time is set by means of a pulse generator, the output pulses of which ira, its frequency can be changed over several decades are and over a plurality in series switched reduction stages are fed to a "switching relay" with a delay, and in the case of the minimum a step with an unchangeable constant transmission ratio to the pulse generator downstream is d a d u r c h g e k e η η ζ e ι c η-η et that the pulse generator with a digital Expensive interconnected is that between the pulse generator and the first divider stage is a pulse generator is switched on and that each of the divider stages has a time delay ratio of 1: 1000 defaults.