DE2214069A1 - Program switching device - Google Patents

Description

Dr. rer. nat. Horst Schüler ■ , ' - _n 6 Frankfurt / Main ι, March 22, 1972

99 1 ΑΠ69 Niddasfraße 52 _{OT w} _

PATENTANWALT ZZI ^ UOS Telephone (0611) 237220 ^WK ' ^He

Postal check account: 282420 Frankfurt / M.

Bank account: 225/0389 Deutsche Bank AG, Frankfurt / M.

1973-38-VC-75

GENERAL ELECTRIC COMPANY

1, River Road
Schenectady, NY / A.A.

Program switching device

The invention relates to a program switching device for television recordings, and more particularly, an improved television studio apparatus for processing television images for broadcast or recording to create certain visual effects.

A program switching device like the one in the control room of a television studio is essentially an electronic image selection device for selecting a desired image and desired images according to the operator's decision. These images can be selected individually or in combination. A type of combination that is provided by such a program switching device what can be achieved is a "blending" of two. Images which sometimes have an overlay

2098 "Λ 1 / Ö7Ö5.

22U069

is called. With this combination, the video signals are reproduced at the same time; however, their amplitudes are modified to produce a desired misalignment in an amplitude-split mode. A second type of combination is called time sharing or "time-sharing", or also called ' _% combination according to a "priority". That is, one picture or part of it has complete priority over the other picture or part of it. Electronically, this is accomplished by snapping the desired image into place at the right time. Modern switch systems incorporate both of these methods of combining images. Indeed, most conventional program switching devices allow both methods to be used together.

With conventional program switch devices, the video signal by every electrical device in time, delayed, through which it is paired. The number of devices through which the signal is passed on its way depends on the particular one selected signal path for the signal. The delay of the video signal in part of the circuitry of the switching device can be detrimental to the signal ultimately generated by the switch device. This is especially true when color signals because a time error of only two nano-seconds can produce a visible shift in the color tone. To correct for such timing errors and thereby maintain a constant wave delay in the system, use conventional switch devices delay lines to ensure that the signal propagation time inside the Sehalteinrichtung is constant regardless of the particular selected signal path that the signal follows. This leads to a undesirably high degree of complexity of the circuit. Furthermore, the relative timing of any two signals, which into the circuit for the "mix" or for the "Priority" operation * occur, although the signal paths can be relatively long and contain a significant number of devices

209841/0785

which also tend to distort the original signal to add. Furthermore, the signal path is changed when the operating mode of the switch device is changed. However, since the signal quality depends on the transmission properties of the equipment through which the signal passes is the Signal quality for, each operating mode different. Will continue Time required by the operator to delay the reproduction by the system, as the signal paths for each operating mode are not completely independent of one another. if the number of circuits for the "shuffle" mode or the "priority" mode is increased, the complexity increases of the switching system to an extent that is not in proportion to this number of switching operations, and thus becomes the complexity of the circuit -further, increased. the Conventional switch devices therefore either seriously limit the creative activity of the operator, or they create extremely difficult engineering problems when it is desired to add more circuit capacitance to the, ■ to further expand the creative possibilities of the operator. The present invention relates to a novel conception of a Switch circuit, which is a drastic reduction in complexity the switch circuit and associated timing and other problems allowed without the creative Restrict the operator's function in an impermissible and serious manner.

One. The object of the invention is to provide a television program switching device to create, with greater stability, reliability and consistency of operating behavior,

Another object is to provide a switch device for television production with reduced substantially constant path lengths for the video signal.

.2 0 9.8 A 1/0786

Another object is to provide a television program switch. where each video signal path is independent of the others.

Another task is to reduce the complexity the switching and the use of lines with a minimum amount of delay in such a program switch for TV"

According to a preferred embodiment, the device comprises for generating an interaction between at least a first and a second video signal, first and second regulating means for controlling the amplitude of the first and second signals, respectively. Each regulator device contains variable attenuators for controllable attenuation of the respective signals and switch devices coupled to the attenuators for interrupting the respective signal during predetermined time intervals and at predetermined times. To the first and second regulator devices summing amplifier means are coupled to combine the first and second signals to produce an output signal constant amplitude, in which the relative amplitudes of the first and second signals are proportional to their relative Amplitudes are reproduced at the inputs of the summing amplifier device.

A better understanding of these and other objects, advantages and features of the invention and the method in its operation results from the following description of exemplary embodiments in connection with the figures,

Fig. 1 is a block diagram of the program switch according to the Invention.

FIG. 2 is a block diagram showing the interconnections between the switch amplifiers used in the FIG. 1 system.

2098A1 / Ö78B

Fig. 3 is partly a circuit diagram and partly a block diagram of a switch amplifier according to FIG. 2.

Fig. 4 is a block diagram of the switch control for control ' of the switching amplifier according to FIG. 3 to switch it on or off.

Fig. 5 is a block diagram showing the apparatus for controlling the gain of the switch amplifier of Fig. J>

Flg. 6 is a block diagram showing the analog combination circuit in the device according to Fig. 5

In the arrangement of Fig. 1, a plurality of video signals A, B, C, D are supplied to the switch amplifiers 10. Each of these Signals are each generated by a separate television camera, not shown. In a big TV studio with lots of cameras the program director can determine which cameras he wants to generate by operating a switch matrix (not shown) of the video signal to be broadcast or recorded. These signals from the selected cameras are fed to the switch amplifiers 10. There they can be further processed so that their continuity during a predetermined duration is interrupted at predetermined times in each frame, or that it is a change in amplitude be subjected, or both. The output signals from the switch amplifiers 10 then become one or more summing directions 11 and 12 supplied, which are wired here so that the summer 11, the video signals A and B and the summer 12 receives the video signals A, B-, C and D. Furthermore, color burst and synchronization signals generated in the studio and each of the Summing amplifiers 11 and 12 supplied. Therefore, the composite output of each of the summers includes color burst and Synchronization signals together with the video signals. Each summer 11 and 12 shows a constant gain factor of 1 with regard to the sum of the input signals supplied,

209641/0785

22H069

The output signals from the summers 11 and 12 become the image '· selector switches supplied. These include a first variety of Switches 14, 15 and 16 which are used by the program director to select an output signal from one of the buzzers 11 and 12 Recording or broadcasting can be used. They also include a second plurality of switches 17, 18 and 20, ■ which can be operated by the program director to preview an output from one of the summers 11 and 12 before recording or before sending the signal. The image selection switch 13 contain an electronic Interlocking circuit, which ensures that the last pressed switches of switches 14, 15 and 16 take precedence over the other own switches in this group and since the switch pressed last from group 17, 18 and -20 takes precedence over the Switches in this group.

Further video signals E and P which are received directly from two further television cameras (not shown) are transmitted via delay lines 21 and 22 are fed to the image selector switches 13. To get the video signals E and F at the inputs to the picture selector switches To keep 13 synchronous with the video signals from the summers 11 and 12, delay lines 21, 22 must be used will. These compensate for the delays of the signals A, B, C and D which are caused by the switch amplifiers 10 and the summers 11 and 12 were introduced.

The output signals from the image selection switches 13 become the image monitors 23 and 24, which are switched to display the images generated by the adders 11 and 12, respectively. Farther Output signals from the image selection switches 13 are fed to an output amplifier 25 from which video signals are emitted or recorded, and an output amplifier 26 which is used, for example, to control an image monitor 27 which can be used for previewing a television program before it is recorded or broadcast can be. Note that switches 14, 15 and Ϊ6

209 8 A1 / 0785

the selection of the output program from the totalizer 11 or 12 or from the delay device 21 and the switches 17, 18 and 20 allow the selection of the program for previewing the summer 11 or 12 or from the delay device 22 " enable.

Fig. 2 is a block diagram showing the interconnections of the switch amplifiers 10 of Fig. 1. These interconnections show, for each of the video signals A, B, C and D, amplifiers for amplifying each of the signals in parallel. Thus, the amplifiers 30 and 31 amplify the A signal , the amplifiers 32 and 33 the signal B, the amplifier 3 ^ amplifies the signal C, and the amplifier 35 amplifies the signal D. The amplifiers 30 and 32 are used to control the summer 11 and the amplifiers 31, 33, 3 ¹ I and 35 control the summer 12.

After the program director has selected which of the video signals A, B, C and D he wishes to use, he closes the circuit to one or both summers 11 and 12 in order to obtain the desired effect. Consider the example in which he wants to generate the video signal A and then gradually wants to fade out the video signal A and fade in the video signal B until the video signal supplied to the image selection switch 13 consists entirely of the video signal B. Or if, for example, he wants to divide the time between the video signals A and B so that the images represented by the two signals are displayed side by side on the screen, he closes the necessary circuit of the image selection switch 13 and the switch amplifier 10 to achieve this desired result to obtain. In the case of an amplitude division by fading out the signal A and fading in the signal B, the amplifier 30 of FIG. 2 first operates with the full gain factor and the amplifier 32 with zero gain. In the device according to FIG. 1, the switch 14 would be closed and ' the switches I ¹ J and 15 would be open, so that then the summer 11 the

20984-17 0 786

22U069

Task of amplitude splitting. However, if summer 12 were to perform this task, switch 15 would be closed and switches I ² J and 16 would be open. Therefore, the output-side program supplied by the amplifier 25 and viewed on the monitor 23 comprises the output program of the adder 11, which initially comprises the signal A entirely. By swiftly operating a gain adjustment lever from one extreme position to the other, as described in connection with FIG. 5, the gain generated by amplifier 30 for video signal A can be reduced and, at the same time, the gain generated by amplifier 32 for video signal B can be increased so long as until the output signal generated by the amplifier 25 and viewed on the monitor 23 completely includes the signal B when the other extreme position is reached by the setting lever for the gain. The overall result is the generation of a transition from signal A alone to a superposition of signals A and B, in which the amplitude of signal B is increased at the expense of the amplitude of signal A until only signal B remains.

In the case of a time division, one effect is divided with one Screen achieved so that, for example, the transmitted image is the left half of image A and the right half of image B. includes. The amplifier 30 is kept at full gain and the switching amplifier 32 is completely switched off left during the first half of each horizontal line, thereby this part of the line is able to reproduce the information which the picture A comprises. Then the switch amplifier 30 completely switched off and at the same time the Switch amplifier 32 is turned on at full gain during the remainder of each horizontal line, so that the information which includes the picture B is reproduced. Therefore includes that supplied by the amplifier 25 and viewed on the monitor 23 program on the output side, the desired effect with a split screen. The location of the boundary between the part of the

209841/0785

Signal A and signal B of the overall picture can be set by the program director. The synchronization of signals A and B can easily be maintained without using circuitry to compensate for any time delay, since each of the signals traverses circuit paths with substantially the same time delay. For example, in another form of split screen effect, it may be desirable to have a time split between signals A and B on the upper part of the screen and a time split with a signal C on the lower part. This is easily done by "closing switches 15 and 18 and opening switches I ¹ I, 17, 16 and 20. Therefore, during the first part of each picture frame, the switching amplifiers 31 and 33 time the horizontal lines of images "A and B" in the manner previously described. During the latter part of the picture, however, the switch amplifiers 31 and 33 are completely switched off and for the rest of the picture the switch amplifier 34 is switched on with full amplification factor. Therefore, the output program supplied by amplifier 25 and viewed on monitor 24 contains a split-screen effect with a horizontal borderline between an upper and lower part of the picture that is controllable by the program director Image a split screen ^ and the position of a vertical boundary line between parts A and B of the image in the upper part of the screen is also controllable by the program director. The synchronization of signals A, B and C is easily achieved because each of the signals signal paths runs through with essentially the same time delay and therefore no circuit is required for the compensation of the time delay, ..- ''"

A somewhat more complicated form of "mixing" consists in dividing the amplitudes between the signals _a A, B and C-. The relative amplitude 'of the signals A "and B, as it is supplied by the amplifiers 31 and 33, by actuating a

209841/07 8 8

22U069

- ίο -

first gain adjustment lever can be modified as described above to a first mixture of signals A and B to obtain. The signal C is supplied by the amplifier 3 ^ and can be combined with the combination of signals A and B. For this purpose, the relative Amplitude of the combined signal consisting of the signals A and B on the one hand and the signal C on the other hand so varifert, that the amplitude of the overall combination of signals A, B and C remains constant.

Other combinations of signals can also be achieved. For example, the amplitude-divided signals A and B can be combined with the signal C in a time division. Vice versa can use time-split signals A and B in amplitude splitting can be combined with signal C.

The achievable with the device according to FIGS. 1 and 2 above The effects described are only given as examples to illustrate some of the simpler special effects, which are made possible by the device. Many variations and combinations of these effects for amplitude distribution and timing division can also be easily generated. Of course, the device is able to output video output programs without to deliver special effects. At this time, the video signal E is simply transmitted through the delay line 21, the switch 16 and the amplifier 25 is used, while a signal labeled video P is kept ready as an exchange for the signal video E. and can be monitored on an image monitor 27. This is done via the delay line 22, the switch 20 and the amplifier 26 before being fed to the delay line 21 from the switch matrix (not shown). The delay lines 21 and 22 are only used for the delay in the switch amplifiers and summers / compensate so that switching the output side program from the video E signal to any one of the video signals A, B, C and D, for example

2098 A'1 / 0785

- li -

does not cause a loss of horizontal synchronization between the different images.

To avoid any confusion regarding the signals applied to amplifier 25, switches 14, 15 and 16 are electronically interlocked so that closing any one of these switches will open all of the other switches at the same time. Similarly, causes the closing of any of the switches ^v 17, 18 and 20, that the remaining switches are .geöffnet an electronic latch circuit. This avoids any possibility of confusion as to which image is displayed on the image monitor 27.

FIG. 3 shows the circuit of a typical amplifier as it can be used as switch amplifier 10. The input video signals are passed to a delay line via a buffer amplifier 40. The purpose of this delay line ¹ Il is to compensate for the delays of control signals within the amplifier so that these control signals to exercise their influence on the video signal at the proper moment. The delay line 41 has a delay on the order of 100 nanoseconds.

The output side signals from the delay line 41 are via a resistor 42 of the cathode S of a field effect transistor 43 and the anode D of a field effect transistor 44 is supplied. The anode electrode D. Of the transistor 43 is connected to the ' Input of an operator amplifier 45 connected. Between the input and output of this amplifier 45 is a feedback resistor 46 switched so that the amplifier works as an inverter. The cathode electrode S of the field effect transistor 43 is connected to ground. The output signals from the amplifier 45 are fed to the input of an amplifier 49 via a capacitance 47 and to the signal input of a gate 51 via a capacitance 50 coupled. A keyed clamp 48 is

2098A1 / 07 8 5

22U069

in feedback circuit between the input and the output of the amplifier 49 switched.

The data signals for the lock-in are provided to the driver amplifier 52 by the lock-in data logic of the switch control circuit 4 supplied. The driver amplifier 52 generates a Pair of output signals. It has a bistable circuit, which in one switching state, the interconnected cathodes a first pair of diodes 53 and 5 ^ biased positive, and the interconnected cathodes of a second pair of diodes 55 and 56 are negatively biased. Tensioned in the other switching state the driver amplifier 52 the cathodes of the diodes 53 and 5 ** negative before and the cathodes of diodes 55 and '56 positive. The anode of diode 53 cools output signals from amplifier ** 9 and the anode of diode 56 is grounded. The interconnected anodes of the diodes 5 ^ and 55 provide the output signal of the switching amplifier.

A mixing control signal forms a gain control signal with controllable amplitude for the switching amplifier and is supplied to the negative input terminal of a differential amplifier 60. This signal is variable between limit values, which are preferably between zero volts and -1 volt. A constant reference voltage, preferably with an amplitude of +1 volt, is supplied to the cathode electrode S of a field effect transistor 62 and the anode electrode D of a field effect transistor 63 via a coupling resistor 61. The anode electrode D of the transistor 62 is connected to the negative (-) input terminal of a differential amplifier 64. This has a feedback resistor 65 between the output connection and the negative input connection and therefore works as an inverter for the signals fed to its negative input connection. The cathode electrode S of the transistor is connected to ground. The positive (+) input terminal of the differential amplifier 6 ¹ I is connected to ground.

209841/0785

The output signals from the differential amplifier 64 become the positive The input terminal of the differential amplifier 60 is supplied, the output of which is coupled to the input of an inverter amplifier 66 is. The output of the inverter amplifier 66 is applied to the grid electrodes G of the two field effect transistors 44 and 63, respectively coupled via coupling resistors 67 and 68, respectively. The outcome of the Differential amplifier 60 is coupled via coupling resistors 70 and 71 to the grid electrodes G of transistors 43 and 6-3.

A two-input AND gate 72 receives a delayed horizontal synchronization pulse and at its first input a non-synchronous logic signal at its second input. The non-synchronous logic signal can be checked by a synchronization comparator be generated. This records differences in the timing between the synchronization pulses generated in the studio and the synchronization pulses in each of the individual video signals which the switch amplifiers 10 of the program switch. A suitable synchronization comparator 1st for example under the trade name Dual Sync Comparator, model VG 2087 from the company Central Dynamics, Ltd., Pointe Claire, Quebec, Canada.

The non-synchronous logic signal is also still the control input of the gate 51 supplied. The output 'generated by AND gate 72 represents the delayed horizontal synchronization signal which is controlled by the nonsynchronous logic signal and it only occurs during the time interval each synchronization pulse, which is also called "rear Back porch of the horizontal synchronization pulse will. During this interval, the color synchronization "burst" associated with the video signal for color images occurs. on. The output of AND gate 72 switches the keyed bracket 48 off, and also toggles a tuned Amplifier 73 with gate control, which is tuned to the frequency of the color synchronization signal of 3.58 MHz is. When the color synchronization signal is detected it will

209841/0786 ■

amplified and tuned as an output from the gated Amplifier 73 generated. However, a synchronization signal must be provided by a logic circuit arrangement (not shown) be determined in at least one of the switch amplifiers, which according to Pig. 1 a signal to one of the summing ' give amplifiers 11 and 12 so that a synchronization or burst signal is supplied to this summing amplifier. Likewise must provide a horizontal synchronization signal for each of the one summing amplifier via a corresponding switching amplifier supplied video signal are simultaneously detected so that the summing amplifier is supplied with the horizontal synchronization signal will.

In the operating state, video signals continuously with constant gain are passed through the switch amplifier, the buffer amplifier 40 is supplied Video signal via the delay line 41 to the cathode electrode S of the transistor 43 and to the anode electrode D of the transistor 44 led. Under these conditions, the grid electrodes G of transistors 43 and 52 are at the largest negative Voltage value, since the mixing control signal is zero, and then cause the transistors 43 and 62 to be fully current-permeable are. At the same time, the maximum negative voltage generated by the amplifier 60 causes the inverter 66 to have a maximum positive voltage generated. This causes the grid electrodes G of transistors 44 and 63 to be at their maximum positive Voltage value are located, so that the transistors in turn have the lowest possible current passage. Hence it runs through the video signal passes transistor 43 with very little attenuation and at the same time, the impedance presented to the video signal by transistor 44 is so great that it is a practical one has negligible effect on the signal.

In the absence of a non-synchronous logic signal, gate 51 remains essentially in a non-current-permeable state

209841/0785

*. 221A069

- 15 -. Y

State. The video signal is therefore over the capacitance 47 on coupled to the input of amplifier 49, and the output signal this amplifier will be the input of the keyed lock 48 supplied. The latch 48 is normally in the active or latched state during occurrence the black shoulder of every horizontal synchronization pulse. If it is in this switching state, it delivers a locked feedback signal for amplifier 49. This ensures that the amplitude of the porch of the horizontal sync pulse does not deviate from the specified black level. The black level can be adjusted by Adjustment of the amplitude of the supply voltage for this interlocking circuit. If any of the video signals are out of sync however, AND gate 72 sets the keyed lock 48 inoperative for the duration of the non-synchronous state.

The clamped or locked output signals from the amplifier 49 are fed to the anode of the diode 53. If that's the Driver amplifier 52 supplied key data signal (key data signal) is such that a positive bias to the Cathode diodes 53 and 54 and negative bias on the Cathodes of the diodes 55 and 56 is supplied, then the diode

53 reverse biased and blocks the video output signals generated by amplifier 49. At the same time the diode ' 56 biased in the forward direction and its cathode is slightly above ground potential. As a result, the cathode of the diode 55 is also slightly exposed below ground potential, so that the resulting video output signal produced by the switch amplifier is practical is constantly at ground potential. On the other hand, if the key-in data signal supplied to the driver amplifier 52 is such that that a negative bias to the cathodes of the diodes 53 and

54 and a positive bias to the cathodes of the diodes

55 and 56 is supplied, then the diode 56 is locked

209841/0785

22U069

device is biased to thereby isolate the video output terminal of the switch amplifier from the ground potential. In these circumstances, however, the diodes 53 and 5 ^ are forward biased and therefore provide a highly conductive path for the output signal from the amplifier ^ 9. As a result, the output signal produced by the amplifier ^ 9 forms the resulting video output signal produced by the switch amplifier. In this way, the key-in data signals fed to the driver amplifier 52 can interrupt the resulting video output signals from the switch amplifier and then switch them on again. Since the input data signal switches through the switching states of the diodes 53, 5 * 1, 55 and 56 with abrupt voltage changes, switching from one switching state to the other can be accomplished in a very short time, for example in about 50 nanoseconds. The circuitry for generating the key-in data is shown in Figure 4 and will be discussed later.

The amplitude control of the video signal in the switch amplifier of FIG. 3 is achieved by varying the amplitude of the mixing control signal which is applied to the (-) input terminal of the differential amplifier 60. At the full amplitude of the mixing control signal, the output signal generated by the amplifier 60 is practically zero, so that the transistors * J3 and 62 are in their operating state with maximum current passage. Furthermore, the output signal generated by the inverter 66 is at its maximum amplitude and this means that the transistors HH and 63 are practically kept in a non-current-permeable state,

When the amplitude of the mix control signal is gradually decreased to zero (this happens concurrently with an increase the amplitude of the mixing control signal into another switch amplifier of the program switch), then a begins Increase in the amplitude of the output signal generated by the differential amplifier 60 and this causes the tran-

209841/0785

Transistors 42 and 62 become less current-permeable. At the same time, the amplitude of the output signal of the in-. verters 66 and causes the transistors 44 and 63 to be more current-permeable. As a result, the The amplitude of the video signal arriving at the input of amplifier 45 is reduced and the video output is reduced signal amplitude of the switch amplifier. (Simultaneously another amplifier of the program switch generates a video output signal as the gain increases, this aspect of the program switch is described in detail in context with the device according to Fig. 5.)

As the current throughput at transistor 62 decreases and the current throughput at transistor 63 increases, the amplitude of the signal which is fed to the (-) input terminal of differential amplifier 64 is reduced. As a result, the amplitude of the signal which is fed to the (+) input of the differential amplifier 60 decreases in a similar manner. Therefore, there is effectively a feedback loop to the differential amplifier 60, which allows a very stable variation in the amplitude of the output signal produced by the amplifier, namely, regardless of whether the change is a ^reduction: or increasing the amplitude. Furthermore, the amplitude of the output signal generated by the inverter 66 is also changed only in a stable manner, since the amplitude of the output signal generated by the differential amplifier 60 is changed only in a stable manner.

When the amplitude of the mixing control signal finally reaches zero is reduced, the transistors 43 and 62 are in their switching state for lowest current passage and the transistors 44 and '63 are in their most current-permeable switching state. Therefore, the video signal fed to the input of amplifier 45 is Zero. In the same way, the video output signal generated by the switch amplifier is therefore practically zero. The amplitude the video output signal of the switch amplifier can be recovered again in a stable manner by increasing the amplitude

2098A1 / 07BS

- 18 of the mix control signal.

The tuned amplifier 73 with gate control extracts burst signals from the supplied through the buffer amplifier ¹ IO color video signals, provided that no non-synchronous video signals are used in the program switch. These burst signals must be "detected" as a prerequisite for the delivery of burst signals to the correct inputs of the summers 11 and 12.

In the event that a non-synchronicity of any two video signals in the program switch from the synchronization comparator is discovered (not shown) the second or non-synchronous logic input of the AND gate 72 is connected. The first input of AND gate 72 receives delayed horizontal synchronization pulses, which occur at the time of the color burst. That is, every delayed horizontal synchronization pulse occurs during the porpoise of the instantaneous horizontal Synchronized! gsimpulses on. That resultant output generated by AND gate 72 inhibits or blocks tuned gated amplifier 73 by effectively blocking that amplifier will. The cessation / of the * gated tuned amplifier 73 generated burst output signal leads to a removal of the burst at the burst signal input of the summer with which the Switch amplifier is connected. This avoids any possibility of interference with the burst signal in some way excluded from a non-synchronous video signal.

The detection of a non-synchronous video signal caused also a switchover of the gate 51 into its current-permeable switching state. The keyed-in brackets 48 deactivated by output signals "from AND gate 72. This allows a sliding of the black level in the output of the amplifier 49. or in other words that the black level is at a DC voltage value which is independent

2 0984 1/0785

from any other video signals in the switch * Hence is keyed in in the presence of non-synchronous video signals Latch 48 switched to a practically no current-permeable state every time a delayed horizontal synchronization pulse occurs. Will continue the non-synchronous logic signal supplied to the second input of the AND gate 72 also to the control input of the gate fed and made conductive by the gate. as Result - the coupling capacitance at the input of the amplifier increases 49 on the total value of capacities 47 and 50. These The added capacitance compensates for the capacitance, which is caused by switching the keyed-in lock 48 to the non-current-permeable State is effectively taken out of the circuit. This makes the RC time constant and therefore the correct one Frequency response for low frequencies and the right phase shift for the video signal maintained in amplifier 49, which represents the video signal in the switch amplifier.

Since each switch amplifier is able to apply a controllable gain to the continuous video signal and to switch the video signal with the horizontal line frequency off and on again, a summing amplifier in combination with at least three switch amplifiers has the ability to deliver simultaneous signals with amplitude division and time division. It is therefore possible to achieve a time division of the signals A and B and an amplitude division between the signal C and the combination of the time division of the signals A and B. In the same way, it is possible to obtain an amplitude division of the signals A and B and a time division of the signal C with the resulting signal of the amplitude division of the signals A and B. For example, in the former case, the image from signal A can occupy the left part of the video monitor and the image from signal B occupy the right part, and the image obtained from signal C can fade in or fade out over the split image displayed on the video monitor. In the latter

209 841/0781

For example, the combined or mixed image from the superposition of the images of signals A and B can occupy the left part of the video monitor and the image from signal C could ^{occupy the N} right part of the monitor.

A block diagram of the switch control is shown in FIG. which provides key-in data signals to driver amplifier 52 in each of the switch amplifiers. The circuit includes a first Generator 75 for generating locking data signals with line frequency and at a controllable point in time in each line interval or horizontal interval and a second generator 76, which lock data signals at frame rate and at a supplies controllable point in time in each vertical interval. the Output signals of the function generators 70 and 76 become one Logic circuit 77 supplied for the lock data, in which the signals are combined in a predetermined manner so that one separate Key data signals for each of the switch amplifiers for each of the video signals A, B, C and D are received. The logical one The circuit arrangement for the key-in data is used to

. output signals of the generators 55 and 76 selectively in one such Way to link with each other that you get a change in the form of a step function for the voltage value, which corresponds to the Driver amplifier 52 of any desired first switch amplifier is supplied, and that this change in a polarity direction at a predetermined time in each line or every field of an image. At the same time, a change in the form of a step function of the voltage value is brought about, which the driver amplifier 52 of a second desired switch amplifier is supplied, namely in ent. opposite polarity direction, so that when the Output signal from one switch amplifier the output * - signal from the second switch amplifier immediately and abruptly takes its place. This creates the time sharing effect or the split screen effect where, for example, part of the screen is divided by part of the image from the video signal A and the

20Θ841 / 0785

2214Ö69

other part of the screen by part of the picture from the video signal B is filled. The necessary circuit paths or Circuit connections in logic circuit arrangement 47 for the key-in data are preferably provided by the program director set, which closes a plurality of predetermined switches, not shown, to achieve the desired effect.

5 illustrates the amplitude control circuitry for controlling the gain of individual pairs of switch amplifiers according to the present invention. The relative amplitudes of video signals A and B generated by switch amplifiers 10 of the program switch are controlled by a potentiometer 80. The relative magnitudes of the video signals C and D, which are generated by switch amplifier 10 of the program switch, ¹ are controlled by a potentiometer 81. The center tap of the potentiometer 80 or 81 is coupled to a first input of the subtraction circuits 82 or 83. Each potentiometer 80 and 81 is supplied by the constant reference voltage applied to resistor 61 of the switch amplifier of FIG. 3, and this same constant reference voltage is also applied to a second input of each of the subtraction circuits 82 and 83.

The output signals from the subtracting circuits 82 and 83 are fed to the analog combination circuit 84. Furthermore, each of the taps is on the potentiometers 80 and 8l of the analog combination circuit 84 and also the constant Reference voltage. The output signals E ', E', E £ and E ' which are generated by the analog combination circuit 84, are fed to the switch amplifiers of the program switch, which carry the corresponding video signals A, B, C and D.

In operation, the output signal generated by the subtraction circuit 82 represents the mixing control signal E _A for the switch amplifiers which carry the video signal A, and the signal generated directly at the tap of the potentiometer 80 represents this

. 2 0-9 841 / 07Ö B.

22U069

Mixing control _{signal E R} for the switch amplifiers which carry the video signal B. If one denotes the constant reference voltage as V _R and the voltage at the tap of the potentiometer 80 as E. _ß , the following relationship obviously applies:

^E A = ^V R - ^E B ^{and E} B ^{= E} AB.

Therefore, as the voltage E _ß increases, the voltage E is reduced, and vice versa. Such an internal connection of the analog combination circuit 84, in which the signal E. is used as Ei and the signal E _ß as E £, the picture supplied via the video signal A can be faded out with the fade-in of the picture supplied via the video signal B. and vice versa. Under these conditions, the total amplitude of the video signals A and B remains constant, since the amplitude sum of the signals E. and Eg is equal to V _R. A similar situation is obtained with respect to the potentiometer 81, which _{generates the signal E CD} at its center tap, and the subtraction part 83, which generates _{an output signal Ep 1.} Here the relationship applies:

^E C ^{= V} R - ^E CD ^and

^E D ^{= E} CD *

With the circuit arrangement of Fig. 5 one can obtain a more complicated mixing or division of the amplitude. For example, when it is desired to mix three video signals A, B and D, the closing of predetermined switches in the analog combination circuit 84 enables such interconnection of the signal paths of the video signals E _A , E _β and Ε _ρ by the analog multipliers and divisors causes the following relationship to apply:

209841 / 0T85

E '- ^A

- 23 -

E. E _n

FF
¹ = BC and

^B ~ V

^E D = E

while the value Ei ₁ remains at zero amplitude. The total amplitude of the output signals generated by the analog combination circuit 84 remains constant during the mode of amplitude splitting. This can be demonstrated in the following way.

All of the resultant generated by the analog combining circuit 84 Output signal can be written as (E '+ E ^ + Egg). Therefore, the following relationship holds true for this resulting one Output signal

E. EE _B E _{c +} E _D V

Total output signal = - ^ --- + —w - * r - ■

^V R ^V R ^V R

^E C ( ^E A + ^E bJ ^{+ E} D ^V R
^V R

( ^V R - ^E C ^) (h * ^E from] * ^E from)

- ^V R

Accordingly, it is apparent that the total amplitude of the output signals from the analog combining circuit 8k is equal to that

209841 / 07öS

22U069

Value Vp, i.e. equal to that in the circuit arrangement for the Program switch existing reference voltage. This applies regardless of which signal combinations from the analog combination circuit 84 can be delivered.

FIG. 6 illustrates a particular analog combination circuit 84 such as can be used in the apparatus of FIG and contains D so that three different amplitude-split images are obtained. A first pair of selector switches 85 and 86 can be operated to provide either the signal E. or V _R or either the signal E _β or V _R to a first input of the analog multiplier 87 and 88, respectively. In a similar way, a second pair of selector switches 90 and 91 can be linked to one another and can be operated in such a way that the signal E " _{or V p} or the signal E ~ or V _R are fed to a selector switch 92 or 93, respectively. The switches 92 and are operated in such a way that, in a switching state, they supply the output signal from switch 90 to the first input of a selector switch and the output signal from switch 91 to the E 'output of circuit 84. In the other switching state, they supply the output signal from switch 91 to the first input of selector switch 96 and the output signal from switch 90 to the E ^ output of circuit 84,

The second input of the selector switch 96 receives the signal V _R. The output signals from switch 96 are fed to a second input of each analog multiplier 87 and 88. The output signals from analog multipliers 87 and 88, respectively, are applied to the first input of a pair of analog divisors 94 and 95, respectively. The signal V _R is fed to the second input of each divisor 95 or 95. The output signals of the two divisors 94 and 95 are denoted by E 'and E'.

0 9 8 4 1/078 Β

To mix the three video signals, for example A, B and D ^, switches 85 and 86 are actuated, respectively, to deliver signals E ^ and Eg to the first inputs of analog multipliers and 88, respectively. The switches 90 and 92 are operated to supply the signal E _c to the first input of the switch 96 and to block the output Ei. On the other hand, the switches 91 and 93 are operated in order to supply the output signal E ~ to the output EI and to prevent signals from the switch 93 from reaching the switch 96. The switch 96 is operated to provide the signal E _c from switch 92 to the second input of each analog multiplier 87 and 88. Therefore, the output signals E _A E _C and Eg E _c 'from the multipliers 87 and 88 are fed to the first input of the' analog divisors 9 * f and 95, respectively. The divisors 9 ^ and 95 divide each of the signals E. E ~ and E _n E _n by the quotient V _R , so that the output signal Ei the signals E. Ep

and the output signal EJ. includes the signals E _ß E _n . As a result, the total output is V _R

^E B ^E C ^{+ E} D ^V R

It has already been shown above that this signal is equal to the signal V _D. . π

If it is not desired to use signals E ₀ and E _D , switches 92 and 93 are operated to provide zero signals to outputs E _Q and E _D. Furthermore, switch 96 is operated to provide signals V _R to the second inputs of analog multipliers 87 and 88 so that their respective output signals include signals E _A V _R and E _β V _R , divisors 9M and 95 divide, respectively each of the signals E ^ V _R or, E _ß V _R by the quotient V _R , so that the output signal E ^ the signal E _A 1st and the output signal E ^ the signal E _ß .

2 0-98 A I / O? 8S

In the above, a television program switch is improved with Describes the stability, reliability and consistency of the way of working. The switch contains reduced, essentially constant Path lengths for the video signals, each video signal path being independent of the other signal paths. The switch requires thus only a minimum of circuit complexity and a minimum number of delay lines,

209 8 4 1/0785

Claims (1)

- 27 claims (1 / Device for producing an interaction between in each case at least first and second video signals, characterized in that it comprises: a first and second regulator device for controlling the amplitude of the first and the second signal, each of these regulator devices having variable attenuators for controllable attenuation contains the signals, and switching devices coupled to the attenuators for interrupting the respective signals during predetermined time intervals and at predetermined times, and summing amplifier devices (11, 12) coupled to the first and second controller devices for the additive combination of the first and second signals and for generating a practical signal constant amplitude, wherein the relative amplitudes of the first and second signals can be displayed proportionally to the relative amplitudes of the first and second signals at the inputs of the summing amplifier devices. 2. Apparatus according to claim 1, characterized that it includes an amplitude control circuit each coupled to the variable attenuators are, the amplitude control circuit devices for selectively supplying a controllable voltage ah the first variable damping device with simultaneous feeding a voltage to the second variable attenuator, the amplitude of which is equal to the difference between a constant voltage and the controllable one Tension is. 3. Apparatus according to claim 1, characterized in that it contains a switch control circuit, which is linked to the SdhaHter facilities, and this switch control circuit includes means to 209841/0785 22 U 069 an abrupt change in amplitude to a first switch device of the electrical potential in one polarity direction and at the same time an abrupt change in amplitude of the electrical potential in the opposite polarity direction to the other switch device. H. Apparatus according to claim 2, characterized in that the variable damping device contains: a first and second controllable resistance device connected in series and in shunt with the video signal path, a third or fourth in series or in shunt with the circuit for supplying the - constant voltage to the variable damping device connected controllable resistance device and a voltage comparator device, of which a first input is coupled to the amplitude circuit and a second input is coupled to the third and fourth controllable resistance device, for generating output signals according to the difference between the controllable voltage supplied to the first input and the voltage applied to the second input, wherein the output of the voltage comparator means with each of the controllable resistance means for controlling the amplitude of the video signal in the variable attenuation means and for controlling the amplitude of the two iten input of the voltage comparator is connected to the voltage supplied. 5. Apparatus according to claim 3, characterized geke. nsign e t that it contains a voltage amplitude control circuit which is respectively applied to the variable attenuators is coupled, this voltage amplitude control circuit Includes means for selectively applying a controllable voltage to the first variable attenuator and at the same time to supply the second variable damping device with a voltage with an amplitude which is equal to the difference between a constant voltage and the controllable voltage. 2 0 9 B k 1/0 7 ß? "· 6. Apparatus according to claim 3, characterized in that that the switch means includes first and second diode means (54, 55) and a driver amplifier (52) is coupled to each of these first and second diode devices, the first diode device is biased into a conduction state by the driver amplifier, and a second diode means on a practical locked state can be biased, and a device for coupling the switch control circuit to the input of the Driver amplifier device (52) for activating the driver amplifier device, to reverse their current state so that the first Diodeneinriahtung can be biased to a practically blocked switching state, and the second Diode device on a practically current-permeable Switching status. -. 7. Apparatus according to claim 4, characterized in that that the switch device contains a first and second diode device (54, 55), and a `` driver .. Amplifier device (52) »connected to the first and second diode devices is coupled, wherein the first diode device through the driver amplifier to a practically current-permeable Switching state can be biased, and the second diode device to a practically blocked switching state and a switch control circuit to the input of the driver amplifier device is coupled to activate this amplifier device, so that the current-permeable state of this Device is abruptly reversible to bias the first diode device into a practically blocked switching state and for biasing the second diode device into a practically current-permeable state. 8. Device for generating an interaction between at least a first and second video signal therethrough characterized as comprising: 2 0 9 B l ~ V / 0 7 B 5 22U069 first and second level means for controlling the amplitude of the first and second signals, means. for connecting the first and second regulator devices to one another, and for changing the amplitude of the first signal in one polarity direction and the change in the amplitude of the second signal in the opposite polarity direction, so that the total amplitude of the first and second signals remains constant and one to the first and second regulating means coupled summing amplifier device (11, 12) for the additive combination of the first and second signals. 9. Apparatus according to claim 8, characterized in that the control device has a first and second diode device (5 ^, 55) contains, und.die driver amplifier device (52) is coupled to these first and second diode devices, the first diode device can be biased to a practically current-permeable switching state by the driver amplifier device, and the second diode device to a practically non-current-permeable or blocked state, as well as one to the input the driver amplifier device for activating this driver amplifier device (52) to reverse its current conduction state coupled switch control circuit through which the first diode device is in a practically blocked switching state and the second diode device can be biased into a practically current-permeable switching state. 10. Apparatus for generating an interaction between at least one first and second video signal, characterized in that in that it comprises: first and second regulator means for controlling the Passage of the first and the second signal, a device for connecting these first and second regulating devices with each other, so that only one of the regulating devices can be controlled for a first predeterminable period of time. 2 0 9 8 4 1/0 / ß Γ) is casually switchable, and immediately afterwards only the other one Regulator device during a second predeterminable period of time 'is current-permeable, and one to the first and second regulator device coupled summing amplifier device (11, 12) for generating a continuous signal, which successively consists of the first and second video signals. 11. Device for creating an interaction between a multitude of video signals, characterized in that it comprises: a number of leveling devices, each for controlling the Amplitudes of a separate video signal, a device for connecting a first and a second controller to one another for changing the amplitude of a first video signal in one polarity direction and for changing a second Video signal in the opposite polarity direction, with the total amplitude of the first and second video signals · constant remain, a device for connecting a third regulator device with the first and second regulator means to control the first and second regulator means for a predetermined period of time to make current permeable and immediately afterwards likewise to make the third regulator device conductive for a second predetermined period of time, and a summing amplifier device (11, 12) coupled to the first, second and third regulator device for generating of a continuous signal consisting of the additive combination of the first and second video signals followed by the third video signal. 12. Device for milling an interaction between a multitude of video signals, d u r c h g e k e η η ze i c h η e t ',' that it includes: a variety of control devices, each controlling the amplitude control a single video signal, · -, - ■ .- "· ' 2 0 9 8 4 1/0 7 ß ¹ ^ BAD ORiGINAL 22H069 a device for connecting a first and second regulator device among each other, to only one of these two regulator devices controllable during a first predefinable Period of time to make current permeable, and immediately afterwards to make only the other of the two regulator devices current-permeable for a second specifiable period of time, a device for connecting a third regulator device to the first and second regulator device for generation a change in amplitude of the first and second video signals in a polarity direction and a change in amplitude of a third video signal in the opposite polarity direction so that the total amplitude of the first, second and the third video signal remains constant, and a summing amplifier device coupled to the first, second and third controller devices (11, 12) for generating a continuous signal, which is made up of the first and second video signals one after the other is additively combined with the third video signal. 13. Apparatus for creating an interaction between a plurality of video signals, characterized in that it comprises: a multitude of regulating devices each to control the amplitude of a single video signal » a first combination device for connecting a first and second regulator device to one another for a change the amplitude of the first and second video signals in opposite polarity directions, so that the total amplitude of the Composite signal from the first and second video signal remains constant, a second combination device for connecting a third control device to the first combination device, and for generating a change in the amplitude of the combination signal from the first and second video signals in a polarity direction and the amplitude of a third video signal 2O9841 / O7SS - ■ 33— in the opposite polarity direction so that the total amplitude of the first, second and third video signal remains constant, and one to the first, second and third regulator means coupled summing amplifier device (11, 12) for generating a continuous signal that is derived from the first, second and third video signal in additive combination. 209841/0765 Blank page