DE2212800A1 - Method for controlling a plasma display panel - Google Patents

Description

PATENTANWÄLTE «UÖ.UU

DR. CLAUS REINLÄNDER DIPL.-ING. KLAUS BERNHARDT 6 / 14b

D - 8 MUNICH 60 THEODOR-STORM-STRASSE 18a

Fujitsu Limited
1015t Kamikodanaka
Kawasaki, Japan

Method for controlling a plasma display panel

Priority: March 25, 1971 Japan 17533/1971

The invention relates to a method for controlling a plasma display panel to monitor the state of one in the field reverse contained discharge cell. The state of a selected cell is indicated by a preparatory Reverse pulse applied to a selected column (coder) electrode, and then becomes a reverse pulse is applied to a selected row (or column) electrode to confirm the state of the changed wall voltage to reverse. Thus, a half-selection disturbance does not occur with the invention.

Starting point of the invention

The invention relates to a method for controlling a plasma display field, in particular a method for Reversing the state of a discharge cell, i.e. to reverse the state from "writing" to "erasing" and vice versa.

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A plasma display panel consists of a pair of electrodes covered by a dielectric layer such as glass and facing each other through a space filled with a discharge gas such as neon. Letters or figures are indicated by a discharge point in the discharge cell formed between the opposing electrodes, and a storage function is performed by the wall charges stored in the dielectric layer. A wall voltage generated by the wall charges depends on an entertainment voltage, and when the waveform of the supplied entertainment voltage is symmetrical, for example, the wall voltage takes a value between zero and a level, that is, between the erasing state and the writing state. When a non-symmetrical maintenance voltage is applied, the wall voltage can assume two kinds of steady state, namely positive and negative. (One can also speak of three stable states if the zero level is taken into account.)

lim fall to the supply of a symmetrical voltage becomes a pulse-shaped entertainment voltage Te beforehand supplied so that the voltage in the discharge space periodically changes its polarity, as shown in FIG is shown. When a write voltage Vw greater than the ignition voltage Yf is supplied, it becomes a discharge point generated in the discharge cell, the wall charges are stored in the dielectric layer and the wall voltage VQ is increased as shown by the broken line. So comes the Potential difference between the next maintenance voltage Vs and the wall voltage VQ to a higher one Value than the ignition voltage Vf and thus a discharge

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point generated again, so that the polarity of the wall voltage VQ is reversed. Therefore, once a write operation is carried out and the supplied TJp maintenance voltage Vs, which is lower than the ignition voltage Vf, remains, a discharge point is generated every time the polarity of the maintenance voltage Vs. is reversed and the writing information is stored and displayed. To reverse the above condition, i.e., to erase, a release tension VE is supplied, the pulse width of which is small or whose peak value is only can generate a discharge. This erase voltage VE a discharge point is created once in the discharge cell, however, the wall voltage is not affected by the next entertainment voltage generated so that the display is cleared.

You potential difference between this erase voltage VE and the wall tension due to the preceding sub » maintenance voltage must exceed the ignition voltage Vf. The wall tension after the inversion depends on the pulse width away. If the pulse width is small, the Voltage can be quite high and the voltage is different right after the entertainment voltage is applied on the voltage over time and to some extent depends on the cell. The range of height and the width of the pulse of the erasing voltage is therefore very small and thus the reverse of the display cannot be run securely to delete.

The choice of the discharge cell whose wall voltage is to be reversed is made by the so-called voltage coincidence method executed in which one control of both

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Electrodes is executed and the desired reversal pulse is only applied to the electrodes 1 of the individual cell when the control voltages come to the same value, and thus the discharge caused by a pulse voltage which is fed to a single electrode is generated randomly, so-called half-selection disorder.

In the case of non-symmetrical entertainment voltage application, the entertainment voltage is composed of waveforms A and B, waveform A including a pulse a1 of voltage + VH and a pulse a2 of voltage -VL, and waveform B including pulse b1 of voltage -VH and contains a pulse b2 of voltage + VL, as in Pig. 2 is shown. When the wall voltage is VQ1, a discharge point SP1 is generated only by the waveform A voltage, and when the wall voltage is VQ2, a discharge point SP2 is generated only by the waveform B voltage. If the ratio of the number of waveform A to the number of waveform B is 1:10, the ratio of the brightness of the state 1 of the wall voltage VQ1 to the brightness of the state 2 of the wall voltage VQ2 is about 1:10, and thus a display can be carried out state 2 can be executed. Therefore, the memory function can be carried out, for example, the state corresponds to the logic value "0 ^w " and the state 2 corresponds to the logic value "1." When the reversal of the states is carried out, reversal pulses CP1, CP2 and CP3 of the voltage Va are applied as shown in Figures 3a, b, and c. Referring to Figure 3a showing the case of conversion from state 1 to state 2, the wall voltage VQ1 is converted into the wall voltage VQ2 by the inversion pulse CP1 as this by the arrow

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* Referring to FIGS. 3b and 3c, which show the case of conversion from state 2 to state 1 the wall voltage VQ2 into the wall voltage VQ1 by the Reverse pulses CP2 and CP3 reversed as shown by the arrow. The property of the pulses CP1, GP2 and CP3 is the same as the reverse pulse Vw in Fig. 1, and these pulses are sent to a selected one Cell applied according to the voltage coincidence method. Accordingly, there is the possibility of a half selection disorder high.

The purpose of the invention is to ensure a safe transition of the state of the discharge cell without a To create semi-selectivity disorder. Another purpose of the invention is to reduce the transition area of the Condition to increase

In order to achieve the above purposes, according to the invention, the transition of the state is made in two steps carried out «. First, a preparatory reverse voltage is applied to the row (or column) electrode of the selected discharge cell applied to the polarity the wall voltage will change, and second, a reverse voltage will be applied to the column (or row) electrode supplied to change the state of the selected discharge cell, the potential difference between the reverse voltage and the wall voltage changed by the preparatory voltage exceeds the ignition voltage.

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The invention is explained by way of example with reference to the drawing, in which show

Pig. 1 shows an example of the prior art relating to the conversion of the state of a discharge cell after applying a symmetrical maintenance voltage,

2 shows an explanatory graphic representation of the puncture after a non-symmetrical one has been created Entertainment voltage,

3a, 3b and 3c show an example of the prior art relating to the conversion of the state a of the discharge cell after applying a non-symmetrical maintenance voltage,

Fig. 4 is an explanatory view of the electrodes and the Discharge cell of a plasma display panel,

Fig. 5 shows an example of the conversion of the state of a Discharge cell according to the invention after applying a symmetrical maintenance voltage,

Fig. 6 is a block diagram of a circuit for performing the function shown in Fig. 5;

Fig. 7 shows the waveforms for explaining the function of the parts of the circuit shown in Fig. 6;

Fig. 8 shows another example of the conversion of the state a discharge cell according to the invention the creation of a non-symmetrical entertainment tension,

Fig. 9 is a block diagram of a circuit for performing the function shown in Fig. 8;

Fig. 10 shows an example of the gate circle shown in Fig. 9,

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Pig. 11 an example of the tax level shown in Pig «9,

Fig. 12 shows an example of the decoding shown in Fig. 9 ?? Pig · 13 the waveforms to explain the! Functions of the

Parts of the circuit shown in Figure 9 and Figs. 14a, b, c and d the wave shapes of the various Non-syrametric entertainment sp & nnimgeno

Detailed description of the invention

Fig. 4 shows echematiscb. a plasma display panel _s in which the electrodes Xa and Ya are selected to reverse the state of a discharge cell A.

In the case of symmetrical application, a voltage Vxa is applied to the selected electrode Xa as inclined in FIG. 5, while a voltage Yya is applied to the selected electrode Ya, and hence a voltage VA is applied to the selected discharge cell A. This means that & e & a preparatory reverse voltage Yp after & ®m application of the maintenance voltage Ys is supplied ₉ to the wall voltage YQ ua? Zukehrsn _s whereupon a return voltage Td go is applied, that the potential difference between Yd VQ exceeds the inductive voltage Yf and the discharge

is started, but the wall tensioning TQ is deleted, since the pulse width of Yd is too small to generate the wall tensioning. A voltage YB is applied to © ine half-selected cell B at the electrode Ya and the £ eit _r viirdp generated to which the discharge point is shifted to dsr time at which the preparatory limkebrspannung generated Vp "Di © Übergasgsspannung M is not applied, and thus does not find any

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of the state instead. A voltage VC is applied to the half » selected discharge cell C is applied to the electrode Xa, and the reversal of the .Zustandes takes place instead, because the reverse voltage Vd has the same polarity as the previous holding voltage Ys. That's why a half-selection disorder does not occur

Apparatus for performing the above Tax procedure is in Pig. 6 and their function will be explained with reference to Pig. 7 explained.

A maintenance voltage Vs _9, a preparatory reverse voltage Vp and a reverse voltage Vd are applied to the plasma display panel 1 through control stages 2 and 3 which are selected from a group of amplifiers such as transistors or the like. exist · »These control stages 2 and 3 are controlled by the output signal of gate circuits 4 and 5, which consist of a multitude of AND circles and OR circles The output signal of the address register 6 and 7 is executed and the address signals are added to reverse the state via the input device 8 and 9

The position pulse generator 10 contains a counter 12, which counts the clock CL which is derived from a clock generator 11, the counter 12 as a counter is shown with octal notation in Pig 6 The output signals of the counter 12 are labeled (1) to (8), the output signal (1) being applied to the gate circuit 4 and the maintenance voltage Vs each Row electrode is fed from control stage 2

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The output signal (6) is sent to gate circuit 5 and the maintenance voltage is applied to each column electrode from the control stage 3.

Address signals are sent to input ports 8 and 9 is supplied and the state reversal signal, which in this example eats an erase control signal, is the Input terminal 13 is supplied · Then an AND circle is applied 14 opens and a pup-flop 15 is caused by the Output signal (2) of the counter; 12 postponed * The flip-flop 15 is set by the output signal (5) and then takes the (f-output signal of the !! flip-flop 15 shown in Fig. 7 as (15) Shape. The output signal (15) of the flip-flop 15 is given to the And-circles 16 and 18 and that Output signal (16) of the AND circuit 16 is through the output signal (3) of the counter 12 generated, the on the l'orkrois 5 is given. The preparatory Reverse voltage Vp is only applied to the selected Column electrodes by the above output signal (16) and the output signal of an address register 7 is applied. The output signal of the counter 12 is on a waveform shaping and delay circuit 17. This circuit 17 consists of, for example, one aaoiiostable multivibrator and a delay line and its input impulse becomes an echsal one Impulse shaped by the monostable multivibrator. Soait is the output signal (18) of the AND circle an output pulse with a width less than is the output signal (4) of the counter 12, and will compared to the rise in the output signal (4) ^ is delayed. JDs.B Ausgsingaaignal (18) is on the Scrkreia 4

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given and the output signal of the address register 6 is also given to the gate circle 4 and thus the Reverse voltage 7p to the selected row electrodes only created by tax level 2. Thus, a voltage Yxa is applied to the selected row electrodes and another voltage Yya is applied to the selected ones Column electrodes are applied and a state transition or deletion takes place in the selected one Cell without a half-selection disorder, as in context shown with FIg * 5. At the peak of the preparatory Reverse voltage Yp and the reverse voltage Yd can be equal to the peak value of the holding voltage Ys and thus the circuit is the control stages 2 and 3 simple. ! The state reversal compartment becomes the output signal (18) of the AND circle 18 through the Y delay circle 19 is delayed and applied to address registers 6 and 7 so that these registers are reset.

In contrast to the previous example, the preparatory reverse voltage Yp can be applied to the selected Row electrodes and the reverse voltage are applied to the selected column electrodes. As Yerfahren to apply the entertainment voltage, half of it can be switched on, unlike in the example above the row electrodes are applied while the other half are applied simultaneously to the column electrodes with reverse polarity can be applied, or a maintenance voltage that varies periodically in their own polarity changes can be applied to the row electrodes or the column electrodes. In a nutshell becomes the preparatory reverse voltage Yp to either the row electrodes or the column electrodes

BATH ORIGINAL

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is applied and the wall voltage of the discharge cell is changed on the selected electrodes and then the reverse voltage Yd is applied to the other selected electrodes, so that the state of the selected Cell is reversed.

You examples described above are the case de? Application of a symmetrical entertainment voltage and the case of a non-symmetrical entertainment voltage is explained below. When a voltage Vxa, which is composed of the voltages T1 and Td is applied to a selected electrode Xa, and a voltage Vya composed of the voltages Y2 and Yp is applied to another selected electrode Ya, a voltage YA becomes one selected cell A as shown in FIG. Accordingly, the wall tension YQ1 changes by the preparatory reverse voltage Yp and then discharge once by the reverse voltage Yd generated when the potential difference between the changed wall voltage and the reverse voltage Yd the Ignition voltage exceeds Yf, but the wall voltage comes to level YQ2 because the pulse is insufficient is wide. A voltage YB is applied to the semi-selected cell B at the selected electrode Ya and a discharge point is generated by the preparatory reverse voltage Vd, but the state does not become changed. A voltage Vd is applied to the semi-selected cell C at the selected electrode Za and the state is not changed because the voltage VC has the same polarity as the entertainment voltage Y1. The state of the selected cell can thus be maintained without any damage to the building structure can be reversed as in the example described above.

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Referring to Fig. 9, a circuit for controlling the apparatus will be described. With a plasma » Display panel PDP, the entertainment voltage is applied to each electrode by the control stages DVX and DTT, which are determined by the output signals of the gate circuits GX and GrT can be controlled. The output signals of a position pulse generator PG and of decoders DECX and DBCT are given to the gate circuits GX and GT »Input addresses XD and TD are given to the decoders DECX and DECT given by the address registers ARX and ART to be decoded.

The position pulse generator PG contains a clock generator CI <G, a counter CUT, a J-K flip-flop PP, And circles A1 to A3, Or circles R1 and R2 and a monostable multivibrator HHV. A conversion request signal CHG is supplied to an AND circuit A3. In this example, a counter CNT is a non-decimal counter with output signals (1) to (11). the Output signals (1) and (10) are fed to the gate circuit GX via the OR circuit R2 and the output signal (1) is fed to the control stage DYX. the Output signals (6) and (β) are given to the gate circuit GT via the OR circuit R1 and the output signal (8) is given to the tax bracket DTT.

Gate circles GX and GT, for example, consist of one group with an AND circle A4 and an OR circle R3 * The output signals of the arrive in the gate circle GX Decoder DECX and the monostable multivibrator MM7 to the input of the AND circuit A4 * while the output signals of the OR circuit R2 and the AND circuit A4 get to the entrance of the OR circle R3 and that

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Output signal of the OR circuit R3 to the control stage BVX is given, ϊη get to the gate circle GY di © Aus · » input signals of the decoder DECY and of the AND circuit a A1 ssu to the entrance of the and circle A4, while, the exit, signals of the OR circle R1 and the AND circle A4 to get to the entrance of the OR circle R3 and the off * » output signal of the OR circuit to the control stage DYI is given.

An example of the DTI control stage is in Pig. 11, where Q1 to Q12 are transistors and D1 is a diode »The output signal of a monostable multivibrator M25V is applied to the base of the transistor Q2 and controls the switching of the transistor Q1 · The output signal (1) of a counter CST is applied to the base of the transistor Q4 given and controls the switching of the transistor Q3 «The output signal of a gate circuit GX is given to the bases of the transistors Q6, Q8, Q 10 and Q 12 and controls the switching of the transistors Q5» Ql ₉ Q9 and Q11 and applies the voltages VH, VL and Va at di © electrodes X1 to Xn. The control stage DVY is generally constructed in the same way as the control stage DVX ₉ but has no transistors Q1 and Q2 *

An example of the decoders DECX and DECY is shown in FIG. One of the output signals of the N-Kraise Έ5 to HH comes to lull through the input of 1248 codes. Bi to N4 are also Nand circles »

Referring to 3? Ig. 13 the function of the circuit is explained. The clocking GL of the clock generator CIG is counted by the counter CNT and (I) ₉ (3), (5), (6), (8) and (10) are its outputs »VR2 is that

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The output signal of the OR circuit R2, VMMV is the output signal of the monostable multivibrator MKf, VPIf is the output signal of the Plip-Plopa PP, Yx and Vy are the voltages given to the row and column electrodes and VA is the voltage given to the selected cell. Usually, the yüiibsreiteaciö reverse voltage and di © reverse voltage> d "h", the shaded portions of the voltages Vx and Yy not augeflihrt "The voltage VL is simultaneously AEZS than that shown in Pig x 11 diode .D1 with the Ausgangasignal (10) counter CFf on the side of the series electrode © and with the output signal (6) on the side of the gap © nelakirorl «supplied. The voltage VH is fed through the transistor Q3 simultaneously with the output signal (1) on the side of the row electrode and with the output signal (8) on the side of the column electrode »

When the reverse command signal ONG is applied, the output signal of the AND circuit A5 is applied to the flip-flop PP simultaneously with the output signal (1) and this is set by the next clock signal GL and reset by the output signal (6). When the flip-plop PP is set, the and circles A1 and A2 are opened by the output signal of the flip-plop circuit PP and the output signal (3 ^ is sent to the gate circuit GY. At this time > mr & ®n die Input address data YD is decoded by decoder DEOI and added by Torkrais GY, and then the preparatory reverse voltage Vp and voltage VL is only applied to the selected column electrode

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narrow pulse and converted to the gate circle GX and the control level DVX given. This pulse is applied to the base of transistor Q2 shown in Figure 11 and transistor Q2 is reversed to the on state, causing transistor Q1 to be on is reversed. and the reverse voltage is applied to Yd * At this time, the input address data XD is decoded by the decoder DECX and sent to the gate circuit GX and then the reverse voltage is applied only to the selected row electrode. Thus becomes the voltage VA is applied to the selected cell A. The wall voltage VQ1 is changed by the preparatory reverse voltage Tp and the potential difference between the reverse stress Yd and the changed wall stress If the ignition voltage exceeds Yf so that the discharge takes place, however, the voltage Yp has none Pulse width large enough to form the wall tension, and therefore the wall tension in the Level VQ2 implemented · In the half-selected cell, there is no half-selection disturbance like this is described with reference to FIG.

The above example is the case where the state 1 of the wall tension YQ1 changes to the state 2 of the wall tension VQ2 is reversed, and the reversal from state to state 1 can be carried out in the same manner · The method shown in Fig. 3c can be combined with the above-mentioned method · The preparatory, reverse voltage Yp and the reverse voltage Yd can be either the column electrode or the row electrode as in the case of those mentioned above symmetrical entertainment voltage.

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14a-d show the various methods of the Application of entertainment voltage. As shown in Fig. 14a, there are two types of stress, namely half of YH and half of YL, the column and row electrodes at the same time and with reversed Polarities supplied, the non-symmetry Entertainment voltage combining VH and VL, (Mr. Discharge cell is supplied, and the preparatory reverse voltage and the reverse voltage are set in the same manner as in the example described above fed. Fig. 14b shows a case in which the voltages VH and Vl are supplied to the row and column electrodes, respectively. 14c shows a case at which a voltage corresponding to VL has a narrow width and a peak value is generally equal to VH Has. 14d shows the entertainment voltage in the Case where the state of wall tension has three stable states i.e. high, low and zero, wherein the waveform of the preparatory reverse voltage may be the same as that of the maintenance voltage.

According to the foregoing description, the invention is a two-step reversal of the state is carried out with the preparatory reverse voltage and the reverse voltage being applied successively and in the half-selected cell to which the preparatory reverse voltage is applied, the time to that the wall tension is changed is shifted, but the state is not reversed. In the half-selected cell to which the reverse voltage is applied, the potential difference between the Reverse voltage and the previously applied maintenance voltage is smaller than the ignition voltage Vf and therefore there is no discharge and the state will not

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vice versa. Accordingly, a half-selection disorder does not occur at all, and the range of the reverse voltage, i.e. the range of the peak value and the pulse width, can be expanded. The preparatory reverse voltage can have the same waveform as the maintenance voltage and this requires that the circuit is not constructed in a more elaborate manner.

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Claims (6)

P a _m t O ₁ IL ₁ 1 ₁₁₁ JE ^ π., B ,, p., G ü „ff ,,, fr. β 1J method for controlling a plasma display panel, a characterized in that a preparatory reverse voltage is applied to the column (or row) electrode a selected cell is applied to reverse the wall voltage and then the reverse voltage is applied to the row (or column) electrode of the selected cell to reverse the state of the selected cell, with the potential difference between the reverse tension and the wall tension converted by the preparatory reverse tension Ignition voltage exceeds. 2. Method of controlling a plasma display panel, characterized in that a symmetrical maintenance voltage is applied to each electrode, that a preparatory reverse voltage of the column (or row) electrode of a selected cell in the Display state is supplied to entertainment voltage during idle time to reverse the wall voltage, and that a reverse voltage is then applied to the row (or column) electrode of the selected cell is to reverse the display state to the erased state with the potential difference between the Reverse voltage and the wall voltage converted by the preparatory reverse voltage, the ignition voltage exceeds. 209842/0680 3. The method according to claim 2, characterized in that the waveform of the preparatory reverse voltage is the same as the waveform of the symmetrical entertainment voltage 4. The method according to claim 2, characterized in that the peak value of the reverse voltage is the same as the peak value of the symmetrical entertainment voltage and that the pulse width of the former is less than 4ie Pulse width is the latter. 5 method for controlling a plasma display panel, characterized in that a non-symmetrical Voltage is applied that a preparatory reverse voltage of the column (or row) - electrode of the selected cell during the rest period of the maintenance voltage is supplied to the wall voltage and that a reverse voltage is applied to the row (or column) electrode of the selected cell to determine the state of the selected cell to reverse, where the potential difference between the Ua reverse voltage and the wall voltage reversing Voltage exceeds the ignition voltage. 6. The method according to claim 5, characterized in that that the waveform of the preparatory reverse voltage eats the same as the waveform which under the Waveforms of the non-symmetrical entertainment voltage has the lower peak value. 7. The method according to claim 5, characterized in that that the waveform of the reverse voltage has a lower peak value and a smaller pulse width than the waveform that among the waveforms of the non-symmetrical . Entertainment voltage has the higher peak value. 209842/0680 Le e r s e it