DE2160327A1 - Method and device for generating digital signals which reproduce periodic eccentric quotations from a rotating body - Google Patents

Description

Patent attorney

Dipl-Ing- ■

D-8G23 Mönchen - Pullach
Wien8islr.2, T.MdiB.7930570,7931782

V.I./SL

Case 1161 Munich-Pullach, December 3, 1971

CINCINNATI MILACRON INC., 47o1 Marburg Avenue, Cincinnati, Ohio 4 5? O9, USA

Method and device for generating digital signals which reproduce periodic eccentricities of a rotating body »

The invention deals generally with the problem of periodic Compensating for eccentricities during the rotation of a body: in particular, the invention relates to a method and a CrPT'ät for deriving, storing and reproducing digital Signals that reflect any periodic eccentricities detected during the rotation of a body will.

The problem of non-rotating bodies occurs in many areas. Nowadays it is necessary in many cases of use that, when bodies are rotated, this rotation takes place as precisely as possible concentrically or in such a way that the eccentricity is kept to a minimum. Because of the laws of physics, it is very often the case that such equipment works with losses or is not perfect. ^T ) ariiborhimms, parts can practically only be manufactured and arranged within certain discrete tolerances. The tolerances are defined so that any imperfections in the equipment are tolerable within these tolerances. The demand for ever more precise processes or procedures is increasing, no that the '"effect of even relatively small imperfections'.' Gain importance. With a rotating grain

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there must be a circumference that is concentric with a desired axis of rotation. From a practical point of view, however, this scope is always with certain eccentricities. th afflicted what txl to an imperfect rotation or rotaviruses "tion. Typically, the rotating body supported or on that circumference by a bearing assembly supported. This arrangement then has certain sections that are subject to certain eccentricities. Further, the Umdrehungsw * There is a stiffness factor associated with the bearing assembly and construction. Since the stiffness is not absolute, the rotation of the body results in deflection of the bearings and construction, eliminating the imperfection in the

ψ revolution is increased. Temperature fluctuations also lead to a change in the dimensions of all elements, which is also not constant and also does not affect all elements in the same way. The end result is an eccentrically rotating body. In addition, can the aforementioned parameters also change over a given period of time? this can also change the center of rotation. This problem requires that the eccentricity detecting device detect deviations in rotation from perfect concentricity regardless of the origin of the deviation. Such a device must then correct the changes in the deviations to the required extent over a period of time? after all, the device must support the

"Save the deviation reproduced signals so that they can be queried can be and used at appropriate times can be.

Since the rotation of the body is usually repeated cyclically, the eccentricities occur periodically as a function of the rotation of the body. Body is functional Relation between the period of the eccentricities and the rotation of the body is relatively constant. Converters are available which, when used in conjunction with the body, generate an analog output signal, which is the eccentricities

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defined · However, the use of these converters is very limited for various reasons. First, the output size can be of the converter in a control process on a real basis can hardly be used directly, «Second, nature represents one analog signal poses storage and retrieval problems for later use. As previously mentioned, the eccentricities occur periodically and lead to a periodic signal at the output of the tandler. This error signal appears to be very irregular sinusoidal lines, which are offset by a DC voltage value.

The present invention now provides an apparatus for dividing the periodic error signal into a number of time periods or sample extraction times. During each time period, a digital signal representing the error signal is produced and stored. The sampling or scanning process is relatively uniform, the stored signals are also very accurate and up-to-date. Furthermore, the device allows the stored digital signals to be generated in the memory in synchronism with a subsequent corresponding time period of the error signal. This leads to a much greater flexibility in the use of the error signal. The invention also relates to a method to the previously described. To achieve characteristics, which method can be carried out using a suitably programmed digital computer, 'e .VI apparent to one skilled in the art, can be po the device according to the invention for a large Anza.hl use of processes. The subject matter of the invention can be used, for example, to provide a display and permanent record of the concentricity of a workpiece being machined. to eliminate the eccentricities. In another general case, there is a requirement to detect the eccentricities in order to provide a process control signal for trimming the mechanism. The creation of a predetermined degree of equilibrium

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can be monitored and controlled with the aid of the device according to the invention.

The invention thus relates to a method and a device for generating digital signals, which are periodic analog üigr.al, which is generated by converters that are based on address periodically recurring eccentricities of a ^ s rotating body. A clock generator speaks to them Rotation of the body to generate a number of clock periods for each period of the analog signal. During everyone During the period, an analog-to-digital converter generates a digital one Signal, which reproduces the analog signal, and the ^ digital osignal is in a> ~> level, which of these - ^ time period is assigned, saved. In addition, a previously stored digital Signa.l reproduced from the storage element and used as the output of the Maintain the device.

Further advantages and details of the invention result from the following description of an example of execution referring to the drawing.

^j "! r shows:

Fig. 1 is a general block diagram according to the invention:

Fig. Pa and? B graphical representations of the input and output signals, which occur in the device according to the invention;

P Fig. 3 is a detailed block diagram of an embodiment

shape according to the invention!

FIG. 4a 4b U _0, if this long of the displayed connection be "line-bound together, a detailed circuit diagram of the embodiment of FIG 3r. And ·

5 is a detailed functional block diagram showing the operations required to perform the Process according to the invention reproduces.

Fig. 1 shows a general block diagram according to the invention, the rotating Köraer 1o rotates SiC ¹ I in the by the. Direction indicated by arrow. A handler V is arranged near the circumference of the body 1o, which is ideally concentric to an axis of rotation

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16 is. An error signal from the converter 14 passes through an amplifier 18 and appears as a periodic analog signal according to the part shape of FIG. 2a. A typical period between the lines? O and? 2 is indicated in FIG. A clock generator 24 generates -frobeantnahme signals which eriode a number of Seitperioden with each ^r representing the analog signal. A digital display device 26 is responsive to the sampling signals and the analog signal to generate a digital signal representing the magnitude of the analog signal during each of the clock periods. A memory device 28 has inputs which are connected to a clock generator. Generator ° 4 and the digital display device 26 are connected in order to store the digital signal in a memory location assigned to the time period. In the case of successive corresponding clock periods, the digital signal can thus be called up from the memory location and at output 3? a memory element 28 can be generated. When the digital output signals are cumulatively fetched in a sequence, they represent a number of terers in real time, as illustrated in FIG. 2b. The device thus generates digital signals over a period of time which reproduce the periodic eccentricities of the rotation of the body.

For one. It will be understood by those skilled in the art that the generator 24, which is digital 6 and the memory 28 represent elements defined as discrete building block logic circuits can be. However, each element carries a procedural step or function that most are general-purpose digital computers exist. therefore one can Prepare the program that after feeding into the computer for an adaptation or adaptation of the configuration of the circuit elements leads to perform the functions of the circuit of FIG. This will be explained in more detail at a later point will.

Fig. ^ Shows a detailed block diagram of another Embodiment according to the invention. The rotation of the body ^ 8

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is scanned by scanner 3 4 and ^ 6. The error signals appearing from the scanner pass through disturbed persons ^ o and 4? and then reach a differential amplifier AA as an input variable. In this way, the samplers 34 and 6 and the amplifiers 40, 40 and AA operate as an input circuit. The amplifier AA generates a periodic analog signal which reproduces the periodic eyzenfricities during the rotation of the body 38. It r; ei It is emphasized that any arrangement of the transducers can be used. The only requirement here is that a relatively periodically recurring analog signal be generated which defines the eccentricities of the rotation.

k device 46 coupled. ¹ HUe mentioned earlier that the period of the analog signal is a function of the rotation of the body. More generally, the period corresponds to one revolution of the body. However, depending on the mechanism that drives the body and other factors, the period can be a function of many revolutions "! In this case, the resolution of the pulse period can be varied mechanically." Drive between the coding device and the rotating body changed. "ip ~ ^s ESOLUTION may also be varied electrically by / Bfvision or iuultiplikation the Imnulse at the output of Kodi ^ rvorrichtung provides. Finally, the resolution may be defined for any signal period with the use of a computer and set

) The encoding is by "else programmed, the control unit of the computer in real ^T ''. 46 generates a number of Probeentn ^ reflect hme or Antastsigna.len which the barren Zeitperi ~ for the probing of the analog signal. These signals reach a clock signal generator 48 as an input variable, which together with the coding device represents a clock generator. The clock signal generator 48 generates a number of clock signals during each period in order to coordinate the operation of the end of the line Input variable to an addressing circuit 49 "which addresses a memory element in a digital memory 50. A second clock signal arrives as input variable . ^ " Η, ίίΐι

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Buffer memory 5? and acts in such a way that the digital signals contained in the digital memory ^ P ground into the buffer memory ¹ P iJbertrcp-on "'. The buffer memory 52, the digital memory 5c and the addressing circuit 49 constitute a complete memory device. The second clock signal This output variable represents a variable of the analog signal which was determined during a corresponding time period of an immediately preceding period of the analog signal ^^ If the sampling signals are very small compared to the time required for eccentricity changes, the output signal represents a very precise generation of the size of the analog signal. The second clock signal triggers at the same time an analog-log-to-digital converter ^K 4, richer generates a digital signal, which 6 ^ b / orzeichen and the size of the analog signal During the existing time period or T-kt period reproduces, ^ - honored, the converter 54 has finished its cycle, the T- ⁵ V: * - signal generator generates a third clock signal to the digital signal ^ from the converter 5 ^ into the memory element of the difi + .aipv> üpeiche ^ F ¹ ^ o to iib ^ rtraren, which you ^ ch the addresser circuit ^ Q was addressed during this clock period. * "If one skilled in the art realizes, the use of the buffer memory ^ P is provided for reasons of convenience, pIso not absolutely necessary. The use depends on the relative speeds of the digital-to-analog converter and the response time of the device away. In addition, its use leads to uniform operation which, on the other hand, would require an intolerable number of logical gate devices at the input of the storage element.

The Pig. 4a and 4b produce, when they are joined together at the connecting lines shown, a detailed circuit diagram of the embodiment: sfor ^T n according to FIG. "Sin rotating body 56 is in a constriction 5Q using a ^Q ii screened order 6o mounted. Tfendler 62 and 64 are near the Klrper 56 by means of brackets 66 and 68 respectively mounted on the structure 58 '

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The output error signals from the converters 6? and 64 get · • through preamplifier 7o and 7? and are then summed into a differential amplifier 74. The output of the amplifier 74 is a periodic analog signal which represents periodic eccentricities in the rotation of the body. A clock ring 76 is also attached to the body 56. The ring 76 has a number of teeth, indicated at 75, which provide the resolution in detection. A switch 78 is mounted in the bracket 68 near the clock ring 76. Each time a gear tooth passes switch 78, the switch closes and is opened between the teeth during the working period. Therefore, the clock ring 76 and 8-way switch 78 represent a position encoding device in order to generate sampling signals which represent the time periods or clock periods for the input variable of an amplifier 8o in the clock signal generator 48. The amplifier 8o is connected to a Schmitt trigger 8? connected, which makes a very fast switching of the output variable. The Schmitt Trigger 8? is designed to respond to the positive edge of the output pulse from amplifier 8o. The Schmitt trigger generates a positively directed clock signal at an output 83 and an inverted clock signal at output 85. The clock signal at output 83 is fed to a counter 84, which is shown in FIG. 4b, and triggers the same. The output from counter 84 is input to a count decoder 88. This is a standard logic gate arrangement to produce a single uniform output for each uniform state of counter B & .

It should be emphasized that the selector 84 and the counting decoder 86 combined form an addressing circuit. The mode of operation such a circuit is well known to those skilled in the art. The counter typically counts cyclically during simultaneous operation a number of uniform states or counting steps, which depends on the design and size of the counter. In which Embodiment according to Pig. 4 shows a very general case in which the period of the analog signal is one revolution

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of the body 56 corresponds. Felter is the number of uniform states in the counter 84 equal to the number of teeth 75 ″ on the clock ring 76. Accordingly, one cycle of the counter corresponds to one period of the analog signal. As the person skilled in the art recognizes, a much larger counter can also be used By using / counting decoder 86, the counting cycle can be set to any number of the unit states or counting steps less than the maximum for the counter. In this way, the cycle of the counter or the period of sampling Cycle or sampling cycle / can be designed to correspond to any period of the analog signal, regardless of the relationship between the period of the analog signal and the rotation of the part or body.This technique can be directly programed when using a general purpose digital computer.

The outputs of the decoder 86 are connected to the digital memory 5o. The digital memory consists of an array of two state flip-flops · Ss, but any memory device can be used. Each column, which is indicated at 87, delimits a memory element which is uniform with a decoder output. Any number of counting levels can be used as indicated by dashed lines between the third and fourth columns. This is a design question based on the scanning resolution or the desired accuracy. A number of flip-flops are used in each column to store a digital signal that represents an analog signal. As indicated by lines between the third and fourth rows of flip-flops, the number of flip-flops in each column depends on the desired resolution of the digital signals stored there. After the Schmitt Trigger 8? has generated a clock signal at an output 8 "*> , the counter 84 counts by one counting step which is decoded in the decoder 86. The decoder generates an output variable which addresses one of the memory elements in the memory 5o". The output variable of the decoder öff -

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net an AND gate 88, which enables the digital signal in this column to reach the inputs of the buffer memory 4 2. J) ° v buffer memory 52 contains a single row of flip-flops or storage elements. To simplify the description, the following should apply. An AND gate is represented by a triangle symbol which has a point in the cement. An OVER gate is represented by a triangle symbol with a plus sign. An inverter stage is represented by a triangle symbol, the inputs of which are connected to one another.

In Fig. 4a, the inverted signal at the output 85 of the Schmitt trigger 82 triggers the & ono, stable multivibrator 9o, which

"generates a second clock signal at the output 91. The second clock signal from the multivibrator 9o performs various functions. First, it is used to set the flip-flops of the buffer memory 52 in readiness to receive a digital signal from a memory element which is addressed by the first clock signal After this effect, a digital output signal is obtained in the buffer memory 5? which represents a previously stored value of the analog signal for this sampling or sampling time In the converter, the second clock signal triggers a clock control unit 92 which initiates a converter cycle The converter 96 generates an analog signal with a size proportional to the size of the digital n number count in the counter 94 is. The output variable from the converter 96 reaches a differential amplifier 98, the other input T *> of which leads to the amplifier 74. The amplifier 98 compares the output from the converter 96 to the Fehlersifmal which as _a Au§g .ngsgröße by the converter 62 and 64 has been detected from de ^m amplifier 74th ^"R hen the output from the converter 96 has a magnitude equal to the magnitude of the analog signal from the amplifier 74, the amplifier 98 generates a

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Output variable for the clock control unit 9? Ι which then stops the converter 54. The counter 94 therefore contains a digital signal which reflects the sign and the size of the error signal. This cycle typically lasts 10 microseconds. In addition to charging the buffer memory 52 and starting the converter 54, the second clock signal from the? ^T ultivibrator 9o to trigger a time delay device 1oo. The purpose of the time delay device 1oo is to reset or delete the addressed storage element of the memory 5o. The memory element is cleared after its contents have been transferred to the buffer memory, but before the converter 54 completes its cycle. Therefore, several 100 nano seconds after the start, the time delay device generates a third clock signal for the OR gate 1o? in the memory 5o. In addition, the third clock signal is fed to the reset inputs of the flip-flops in the memory 5o. The output variable of the OR fatterp 1o2 sets the series of flip-flops, which are being added by the decoder 86 at this point in time, to readiness. Thus, the outputs of all flip - ^ lops in that row are driven to zero. After the third clock signal disappears, all reset and standby signals are removed. When the converter 54 ends its cycle, the clock control unit 9 generates? an output variable that is also used for OR gate 1o? got. Since the time delay device 1oo is low or is at a low value at this point in time, the AND gates lo & are open. These AND gates provide a parallel connection ⁷ wipch ° n each output of the counter 74 and each row of flip-flops in the memory 5o. He output size from the OR gate 1o? puts the series of flip-flops on standby which are addressed at this point in time by the decoder 86, and the digital signal in the counter 94 is transferred to a storage element of the memory 5o.

In summary, it can be seen that every time a gear tooth 75 passes switch 78, a sampling signal is generated, which indicates a clock period. During every T ^ ktperiod » the clock signal generator generates clock signals which the counter 84

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cause its state to change, and cause the decoder 86. ''allow a uniform output variable to be generated which addresses a storage element in the memory 5o. The previously stored digital signal in this memory element ^"r ill in a buffer opeicher? Transferred the fifth D" r content in this storage element is then cleared and covered with a the latest St ^ nd reproducing signal indicating the value of the analog Pehlersignals. With each clock period, a very precise digital signal, which characterizes the analogue error signal, arrives as an output variable from the buffer memory and that during the entire duration of the period.

iEach element between the inputs T ⁷ · and 79 and the output W of the buffer memory 5? perform punctures that are present or available in a digital computer for general tasks. Pig. *> shows a plus diagram of the punctures which are required in the embodiment according to FIGS. 4a and 4b. A flow chart is generally a graphical representation of the definition, analysis, or solution of a problem, recording the punctures and decisions that are required. The rectangular blocks define the necessary punctures and the diamond-shaped bloo ^ define the necessary decisions. The output variable from the coding device is used to initiate the process. The first decision block 106 determines whether the output size of the coding device has changed. The decision mgsblock 1o8 determines whether a sampling time exists or not. '' If the sampling time is not available, the first two decisions must be carried out again until a coding pulse or probing time or sampling time occurs. At this point in time, the punctures that are defined by the puncture blocks 11o, 11?, 114 and 116 must be carried out. First, block 11o begins and the counter must be incremented. Second, block 11? 116, d ^ ß the time delay check

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setup is started. Decision block 118 determines the influence of the state of the delay device is dependent. If the time delay is not over, then operation block 112 makes it necessary that the previously stored digital signal of the addressed memory element is transmitted into the buffer memory. After the delay time is over, the flip-flops of the addressed The memory element is reset, as indicated by the operational block 1 ?? is defined. Decision block 1 ^ 4 makes it necessary that the system is based on the completion of the analogue to digital Converter cycle is waiting. 'If the cycle is not completed is, ^ o the decision is made again., When the converter cycle is complete, operation block 1? Fi requires that the new digital signal be extracted from the Converter is entered in the addressed memory location. However, this does not affect the content at this point of the buffer memory. After the new digital signal is entered the process starts all over again at the decision block 1o6. A translation of the flow chart in FIG a coded computer program can be made by a programmer who works with a specific digital computer for has experience in general tasks.

Although the invention is detailed on the basis of a few exemplary embodiments has been described, the invention is not limited to these exemplary embodiments. There are a number of variations and modifications to the exemplary embodiments described are possible without departing from the scope of the present invention.

All of the technical details that can be seen in the description and shown in the drawing are essential for the invention significant.

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Claims (1)

PATENT CLAIMS Device for generating digital signals, the periodically recurring Represent eccentricities of a rotating body, characterized by the following devices and iVierk-r times: a) by a tandler circuit (14, 18), which is based on the revolution The body can respond to a periodic analog signal as a function of the periodically repeating To create eccentricities of the rotating body b) a clock generator (? 4) for cyclical sampling signals that define a number of clock periods in the period of the analog signal? c) a digital representation circuit (PS) responsive to the analog signal and the sampling signals to convert the magnitude of the analog signal into a corresponding digital signal during each clock period d) by a memory device (28) which responds to the sampling signals and address the digital signal for storing the digital signal during each T ^ kt period can. Device according to Claim 1, characterized in that the converter circuit (14, 18) contains a converter (34, 36) which on the rotation of the body to generate an error signal as a function of the periodically recurring eccentricities of the rotating body can respond, further comprises an amplifier circuit (4o, 42, 44) which is connected to the 'Yandler connected to generate a periodic analog signal is, which represents the periodic eccentricities of the rotating body. Device according to claim?, Characterized in that the clock generator (? 4) has a position coding device (46), 209837/0635 BAO which is kuropelt to the rotating body by a number of sampling signals to generate a number of clock periods within the period of the analog signal, further a clock signal generator (4 8) has that to the position Lo ^ iervorrichtung for Frzeugen a number of clock signals during each of the clock periods. 4. Apparatus according to claim 3 »characterized in that the digital circuit (? 6) representing an addressing circuit (49), which is sent to the clock signal generator for generating an addressing signal in response to a first clock signal, and an analog-to-digital converter (54), whose inputs are connected to the amplifier circuit and the clock signal generator and an output of which is connected to the storage device for converting the analog signal into a corresponding digital signal in response to a second clock signal, and for transmitting the digital signal in the storage device. 5. Gorät according to claim 4, characterized in that the storage device i? 8) has a digital memory ( ¹ ^ o) which is connected to the Tqktsignal generator and the addressing circuit, that the digital memory has a plurality of storage elements , each of which contains a previously stored digital signal, with one of the elements receiving the corresponding digital signal after being selected or driven solely by the addressing signal ^ and emptied / ^ Ti response to a third clock signal? furthermore has a buffer memory (5?) which is connected to the clock signal generator and the digital memory for storing the previously stored digital signal in response to the second clock signal and for maintaining it: as an output variable for the duration of the clock period is. 209837/0635 6. Method of generating digital signals that are periodic show recurring eccentricities of a rotating body, characterized by the following procedural steps: a) Generating a periodic analog signal as a puncture the periodically recurring eccentricities of a rotating body b) Generating a number of sampling signals that the Represent clock periods during each period of the analog signal? c) Converting the size of the analog signal into a de- ^ speaking digital signal during each clock period * d) storing each of the digital signals: and e) reproducing each of the digital signals as a function of successive corresponding clock periods « 209837 / 063S Emptied