DE2160064C3 - Circuit arrangement for measuring electrical energy - Google Patents

Description

' ⁵

and a sampling circuit

to the

S ^d close input (12) to f ™ sampling circuit (8) and its input (14 via a coaster 11 ) AbWnerator (10) is coupled

2. Circuit arrangement according to An ^ uch

characterized by that ^d J ^^^ _lm . _tung (5) zur Festste Hung de ^ en /. ^ ^ ₁ . pulse as well as to determine aer iv pulse gaps of the two pulse trains (/ „, J ₁ I

is established. claim

'3 Circuit arrangement according Anspij ^ - _Rev ä _rt szähu ligand-Λ ^ stgene

^^ ₇₀₄₇₁ ^

_By d, c ^ USAj; ^ _{to the Mcssung cI}

_{beixMls cinc} Scha tun ^ d _{bd der two ((1}

_uisclKr Knerpe _{knowngewo ionaL}

_lsfolg cn m "de L .ημ ng g _c ^ _{n pulse (;!} Verhältn.s u> n You Tau7 / 1 j _idenzschaUu ng r, _a;, J ^ _{EntspI € accordingly dcm}

each other \ iril'-wi coincidence circuit become M ^ _{chen Zusland dcr} Κ «ιηζια ^. _p _ _en .

a Tmpu spcncraior ^ ~ _{icrl odcr} . forward jerk «! is-Za _{ß s haUung is a}

rassrsSg w-s-

£ Ä a i, c _re

is bound.

pulse duration i S.

JV ' ¹ ' ΐ! Ϊ re ^ / u SuninK of p ratio of Dl · ^tIlz '; _na " _or , the current, and l'000daue. da ^ paiuu

v-dur-cr-V, the impulse

The probability p that at any given moment both a pulse of the pulse sequence e / " as well as a pulse of the pulse train /, is present

For then,. -. ,,., "Output frequency / ,, results in the mean au ^ β

ί.

(1

The initial signa! the coincidence circuit 6 is sampled at the frequency /. For the mean pulse frequency / _{m of} the pulses occurring at the output 11 of the sampling circuit 8, it _{is thus achieved} . that only the product _r ^ er η

κ-ηρπ pulse trains / _u and /, a symmetry of t> Qt y ^ _{Fchler is ab} , _r

kfhl t .ch.Dr nfe

15th

y t> Q y

Zero point error with s.ch.Dr nfe. _{inen ber} , _{its f}

extraordinary muh, ^ "c

The members representing the alternating components

,. and ,/
l

drop out if a full perlode of the network frequency is reported. Since from the pulse counter 13 with the
are counted out, results
output frequency /. of the pulse counter:

3J ^ be opposite the \ on den

»J * ™haben. AegSaltu ^^ sampling circuit of the coaster 15, they were taken care of long 14 geiangi

quenz out. Since from the im- des coaster 15, care for it

r ■ -, n Hon down counting input 14 geiangi-iiuui im.

he frequency '' ^ continuous pulses ^ ", ^ _TC compared to the counting input 12 cin

n, results see for the mean _{output 25} i _rc ff _C nQen pulses shifted in time si η d. ^ N ac> ι

Pulse counter: S ^^^^ tStm ^ a ^ brefte pulse

^ breft impulse

and.2

d. H.

₃ o

the pulse trains / ,, and I, are exactly symmetrical. An asymmetry that z. B. can occur due to temperature or aging effects of the components of the modulators 1, 2, directly causes a zero point error in the energy measurement. A compensation of the asymmetric error in the first order can be done in a simple manner that the coincidence circuit 5 both the coincidence of the pulses and the coincidence of the pulse gaps of the two pulse trains / ,,. /, notices. A circuit arrangement of this type is shown in FIG. 2, which differ from FIG. 1 only differs in that an exclusive OR gate is used as the coincidence circuit 5 and the pulse counter 15 has a subset ratio of 2: 1. The mean pulse frequency at the count-up input 12 is opposite to FIG. 1 twice as big. The frequency f, _f -, / ^

2 ^{/ Ugcfuhrl}

If the symmetry error of the pulse train I, is denoted by ι , and that uor pulse train /, by , -., Then applies ''

so ⁵

T ₁

55 In Fig. I sina gn-mu. Parts - ... _ moving drawing figures are designated with the same Bcz.ugsnummer. The sampling circuit 8 knows; from the sampling generator 10 clocked /) - FHpÜop H>. the Q output of which is connected to a first input of a D gate 17. The scanning generator 10 is connected to a two of the AND catter 17 via an inverter 18. The D input ucs flip-flops 16 is connected to the output 6 of the coincidence circuit 5.

A change in the state of the output signal cK ■, Coincidence circuit 5 is in each case with the positive., Voltage jump of the next sampling pulse of the Sampling generator 10 on ilen (KAnsgangdes Flipllop 16 transferred. Thus, at the Q output, eir arises. The signal corresponding to the output signal of the coincidence circuit, but whose edges are respectively with an edge of a sampling pulse togetheri'vfTcn. When sampling this signal in the AND gate 17, therefore, the width of the scanning pulses can no longer influence the result of the scanning exercise.

The inverter 18 causes the VorwärK'iihleingang 12 a voltage jump which advances the pulse counter 13 only at the falling edge of the Ahtaslimpuisc occurs.

1 sheet of drawings

Claims (1)

Patent claims: 1 circuit arrangement for measuring electrical energy through product formation. Voltage clamping and S ^g trom means of a statistical £ m-Szmethode, in particular for a ckktro American electricity meter ge ke η ^ c hη by two modulators (1, 2) zur_13Uüu ^ a pulse sequence (/ '/,), in the United "Hn« ^ Sfferenz to the sum of pulse duration and pause and determine the current and, calibrate the voltage and d ^. _w via a switching logic the ^ _Vonvarlsnch t _{ung domestic product in o} voltage unc \ ^ _{Rückwärtsric} Pla , at ncativern ι ^iv ' un "task is based on a _Invention »'^' ^ fichdetektoren and _{to find} , which gets _{by without a prefix through ha} , _tlogik S> st ^ _Impu issequence, ^. Modulators ™ BI ^ _{to Summc of} ^. _{dgr is the} ratio _{def voltage} or _duration and pause | n ^fl _dne Komz.dcnz- ^ _Current proportwjj ¹ ^ _{coincidence of be} , den