DE2154596A1 - Keyboard with legato content - Google Patents

Description

Dr. FTertcrt Scholl PaUataawsM

Applicant: NY Philips'G loeilampenfabriekeg
^ N * - PHIT- 5237

Registration from «-j ^ M ^- OV. 1971

PHN.5237 BOSS / AvdV

"Keyboard with legato content".

The invention relates to a keyboard with an interrogation arrangement, with which the keys one behind the other are queried, a memory arrangement containing the first elements in which the code data of a first pressed key can be stored, at least one output terminal, an output arrangement, the one Output of the memory arrangement with the output terminal

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can connect in order to apply the stored code data to the output terminal. Such keyboards are used, for example, for entering data and tasks in calculating machines. Usually keys are pressed one after the other, whereby a following key may only be pressed when the previous key is no longer in the pressed position. However, if the following key is pressed too early, functional errors can occur. To prevent this, a release signal can be derived from releasing the first key. This means that the second key is only queried after it has been released, or that the code data of the key that is pressed later is available. However, if the second button is released first, this safety system is ineffective. The resulting delay can lead to disruptions. The invention is based on the object of creating a W keyboard in which the disadvantages mentioned do not occur. This object is achieved according to the invention in that the memory arrangement contains second elements in which the code data of at least one second key that is pressed and queried later can be stored, with all of the code data mentioned being stored at least up to the point in time at which the associated key is released, and that the code data of a

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queried and pressed key can be fed to a comparison arrangement in which they are all in the Memory arrangement existing code data of keys are comparable, the comparison arrangement in the case mismatch, the aforementioned output arrangement can control, so that this one output of the memory arrangement with an output of the mentioned second elements and connects to the output terminal.

A preferred embodiment according to the invention is characterized in that the keys are continuously be queried in succession that an idle button is available and that the memory arrangement has the code data may contain at least three buttons. This ensures that the memory arrangement when the keys are released after some time only contains the code data for the idle key; the deletion is therefore carried out automatically.

A simple and inexpensive construction is further characterized in that the memory arrangement consists of a number of units, in each of which the code data of a key can be stored, and that when the code data of a new queried key is saved, all previously saved code data have a position move on in the row. This means that all kinds of voting arrangements are superfluous.

The capacity of the first elements of the memory arrangement is mostly limited, i.e. they

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is smaller than it should be designed for the number of keys on the keyboard. Therefore is one more detailed embodiment according to the invention characterized in that that the comparison arrangement in the event of a mismatch and also in the case of a real occupation of the Capacity of the memory arrangement with meaningful keys that emits an error signal. When querying non-simple pressed keys are performed less than when interrogating a pressed key. It will Queries controlled by a clock, so a preferred embodiment according to the invention is thereby characterized in that the mentioned clock after querying a pressed key at least for the Time duration in which the comparison arrangement compares the mentioned code data with a lower pulse frequency supplies. Keys that are pressed too quickly one after the other can result in errors. Therefore, a more detailed according to the invention Embodiment characterized in that a There is a blocking arrangement which, when a newly pressed key is queried, its code data at the output terminal appear, in the event that a key is pressed again within a period of time, a false signal releases, whereby access to the exit gill is blocked.

A keyboard according to the invention can be used in a calculating machine.

BATH ORIGINAL

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The invention is explained in more detail on the basis of three figures which illustrate different embodiments explained.

Fig. 1 shows a keyboard with seven keys A1 ... A7, a rest key A8, a query arrangement B, a pulse generator C, a detector D, a decoder E, four memories F1 ... F4, each of which consists of three bistable Elements consist of an output arrangement G, an output terminal H, a logic unit I, nine comparison arrangements J1, J2, J3, K1, K2, K3, Q1, Q2 and Q3, four control units L, N, 0 and P and a pulse generator M.

The pulse generator C emits clock pulses, whereby the interrogation arrangement B always a following Button asks. If a key is pressed, for example A2, the detector D detects this. If a key is pressed again within a certain time, so the detector D detects this again and emits an error signal. This is for example the pulse generator C stopped and an error signal is visible on an indicator (not shown). The above called time is determined by the fact that it takes a certain amount of time to recreate the code data of a process the requested pulse, but mainly through mechanical tolerances and the so-called tremor,

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whereby a key contact is interrupted a few more times before it is permanent. This time can be a total of 10 msec, for example. If the pulse generator C continuously emits pulses, the A2 key is queried at a certain moment. The interrogation arrangement sends a signal to the pulse generator M, and also the address of the key A2 appears at the input of the decoder E, for example via eight parallel lines; this is not shown. The pulse generator M, which can also be part of C, for example, emits 5 pulses. The first pulse is fed to the decoder E, which thereby decodes the address of the key A2 and feeds the code data to the memory F1. The second pulse of the pulse generator M is fed to the comparison arrangements JI, J2, J3, K1, K2, K3, Q1, Q2 and Q3, which each contain the information of a bistable element of the memory F1, the information of the corresponding bistable element ψ one of the memories F2 ... F4 and the second pulse from the pulse generator M received. Each of the comparison arrangements JI... Q3 emits a signal when the mentioned pulse from M arrives and, in addition, when the information of the elements to be compared matches. The outputs of three comparison arrangements, for example J1, J2 and J3, are fed to an AND gate which forms part of the logic unit I, while the outputs of the (in this case three) AND gates to the inputs of one

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NOR gate belonging to I. Only if the code data noted in F1 differ from all other stored code data the last-mentioned NOR gate sends a pulse to the output arrangement G, which opens it like a gate for some time will. This is possible, for example, in that the mentioned pulse is a monostable multivibrator put in the "1" position, while the output of the monostable multivibrator together with the output of the Storage unit F1 is connected to the inputs of an AND gate. The third, fourth and fifth impulses of the Pulse generator M are fed to the control units L, N, 0 and P, whereby the information in the memories F1 ... F4 advances one element at a time. A code of 3 bits therefore needs 3 impulses to move a memory unit further, i.e. from F1 to F2, etc. If it was also a new key, the code data also appear via the output arrangement G on the Output terminal H.

If no second key was pressed,

the idle key is queried at the end of the cycle of query arrangement B and the code data is stored in F2, while the key A2 is pushed to F3. If the A3 key is also pressed in the following cycle is, the content of the storage elements is after querying:

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Indented
Keys Last queried
button Saved
Code data F1 F2 F3 F4 A2 A3 A1 A8 A2 A8 A2 A3 A2 A2 A8 A2 A2 A3 A3 A3 A2 A8 A2 A3 A8 A8 A3 A2

Assume that A3 is released afterwards.

A2 A1 A8 A3 A2 A2 A2 A2 A8 A3 A2 A3 A2 A8 A3 A2 A8 A8 A2 A8

Now a new key can be pressed again. If, on the other hand, A2 is also released, then so in the next cycle, only the rest key is saved, so that all memories ultimately only contain the code data of the Rest button included.

The system described can be modified in various ways. First and foremost, the Number of noticeable keys by assigning several memories F2 ... etc. can be added. To two buttons To be able to hold it pressed in at the same time, there must be four F-units in accordance with the system described,

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because the rest key is always saved as well. Further the pulse generator M emits five pulses, preferably between two pulses from the pulse generator C. One can however, let the pulse generator C emit a lower frequency when the pulse generator M is in operation. The required control line is not shown in FIG. 1. This shortens the time for one cycle, because you can query γοη with keys that have not been pressed a very high frequency, for example -g- MHz can leave. Nevertheless, there is enough time for the other functions of the comparison arrangement, etc., because then the Pulse frequency of C is lower. It is also possible that B, E and F1 together form a switching element.

Another embodiment is shown in FIG. 2

shown. The elements corresponding to FIG. 1 are provided with the same reference numerals.

Fig. 2 shows a keyboard with fourteen

Keys A1, A2 ... A14 and two rest keys A15 and A16, the are arranged according to a matrix, two interrogation arrangements B1 and B2, two pulse generators C and C1, two Detectors D1 and D2, a decoder E, a logical one Unit 11, three storage units U1, U2 and U3, the each consist of four bistable elements and one additional bistable element U15t U25 or U35, an output arrangement St, two comparison arrangements T1 and T2, three control units V, ¥ and X,

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a pulse generator Y, a number of output terminals H1 and a bistable arrangement.

If a key is pressed, the detector D1 sends a pulse to the pulse generator C. The detection can be done for example with the help of an additional closing contact in the button or by that a coil under the influence of pressing the button current

^ pulls. The pulse generator C then gives (i6-n) pulses and

a reset pulse, where η is the number of pressed Buttons is. This can be done, for example, in that C contains two counters, namely one first counter that counts from 16 to zero and therefore normally 16 impulses per counting series, and a second counter, whose counting input with D1 and counting down input connected to D2. This second counter is a static counter. If the counters are the same, so with a short delay time a reset

* pulse generated, with also the output for the setting pulses of the first counter is blocked. The detector D2 detects in a similar way to D1 that a key is released. The output pulses of the pulse generator C are fed to the interrogation arrangement B1, which thereby always asks for a series of keys in cyclical order. From the beginning, the query arrangement B2 asks the first column of keys in each case until they appear after the

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fourth pulse of the pulse generator C via the pulse generator C1 receives an interrogation pulse, after which it interrogates the second column of keys. The button at the intersection of the queried The row and the queried column are therefore queried. In this way, 14 keys and a rest key become one after the other queried. After that, the query is made by the reset pulse ended, whereby the interrogation arrangements B1 and B2 also reset to the initial position will. When a pressed key is queried, the address of that key is under control of a first Pulse of a pulse generator Y is decoded in the decoder E and fed to the first memory unit U1. Then Y gives five pulses to the control units V, ¥ and X, whereby the information of the storage units on the additional Elements U15, U25 and U35 circulate once. In addition the storage units are constructed as a shift register. The information in element U15 with those in elements U25 and U35 by means of the Comparison arrangements T1 and T2 compared. The comparison is made according to the series principle. this can for example be carried out in such a way that every correspondence in the comparison arrangements T1 and T2 results in a pulse at an input of the logic unit 11, which contains two binary four-counters, while the "carry", thus reaching the idle

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position by this counter, as a pulse is passed on to the inputs of a NOR gate. Through this the output arrangement S1 can be opened, while then the code data by a seventh pulse of the pulse generator Y appear at the output terminals H1. However, a key already present in the memory becomes H1 not fed. Assume that a key is depressed

k was. At a certain moment the idle key A15 is queried. It is never fed to the output terminals H1. This is possible, for example, by the fact that the fifth and sixteenth pulse of the pulse generator C of the logic unit 11 via a connection not shown are supplied and in this way block the output unit S1.

If a key is now pressed, so

the above is repeated with the difference that the pulse generator C now only has 14 interrogation pulses and

W emits a reset pulse so that no rest key is queried. After that cycle, the memory contains the code data of the two pressed keys. In order to avoid that the code of a key can appear twice at the output, a bistable arrangement Z is added, which is set in the first position by the pulse of the detector D1, whereby, for example, its output gives a logic "0". By the output pulse

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PHN.5237

of the logical unit 11, however, it becomes the second Position set, whereby the output of Z is a logical "1". This output will be connected to an input of the above The aforementioned NOR gate is placed in II, this gate can only release the code data of one key per cycle. (If necessary, a small delay can be built in will).

If a third key is then pressed, the can for example be inserted into the pulse generator C built-in static counters give a false signal. If, on the other hand, a key is released, only is still pressed in, this is detected by the detector D2, whereby the static counter im Pulse generator C counts down by one unit and emits a cycle of fifteen pulses and a reset pulse will. When the last key is released, D2 detects this again and the static counter counts again one unit back. The last cycle of the pulse generator C then contains 16 pulses and a reset pulse. The following example shows the course:

Depressed e
Keys

Last button queried

Saved
Keys A16 A15 A15 A3 * A3 A15 A15 A2 ^Ä A2 A3 ⁰ A3 A3 A3 A15 A15 A3 A3 A5 ^K

A2 A3
A.2 A3
A3
A3

A.3 A5
A-3 A5

A16 A3 A15 A2

A3 A3

A15

A3

A5

FWiWWfJp f'V _a * w * Kr *

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Here, a “new key” is indicated with an asterisk and a “pseudo-new key” is indicated with a circle. The last mentioned is not fed to the output terminals because in that query cycle H1 already one Button was fed.

If a key is pressed during the

Pulse generator C with the delivery of the mentioned (i6-n) Pulses is busy, this results in a false signal, ^ whereby the cycle is stopped and a false signal on appears in an indicator not shown.

An example of a keyboard without an idle key is then given in FIG. 3. Here everyone can Keys fulfill the function of the idle key. The keyboard contains eight correct keys Al ... 8, a pulse generator M1, two counting arrangements AA1 and AA2, a comparator Q4, an AND gate EN, two detectors D1 and D2, two logic units 12 and 13 and a pulse generator C2. Further the keyboard is similar to that shown in FIG.

The keyboard is queried when the detector D1 detects that a key has been pressed and, in addition, when the detector D2 detects the release of a key. In the first case, C2 emits interrogation pulses and becomes a counting pulse is fed to counter AA1, which counter is thereby switched to the position: "A key is pressed" stand comes. This starting position is fed to the AND gate EN together with the output pulse from DI, whereby

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the logic unit 12 is supplied with a pulse. The purpose of this is that a pulse from a pressed key that has been called up appears at output H, even if the code data for this key is stored in the memory. The output arrangement G is opened by 12. Then M1 emits as many pulses as is necessary to bring the information from F1 to F4. These can be pulses 3 up to and including 11 from M1. In contrast to Fig. 1, the unit F1 is coupled in a circle, so that after the 11th pulse all memory units contain the code data of the one pressed key. The number of pulses from M1 is coupled with the position of the counting arrangement AA1, for example by generating the pulses from M1 after the first two (which have a different function) by a ring counter whose transmission pulse allows the counting arrangement AA2 to count down by one unit, for example from 4 to 0. When the positions of AA1 and AA2 become the same, the comparator Q, h emits a signal, whereby the pulse generator M1 is stopped and AA2 goes to its starting position (for example h) . The logic unit 13 ensures that at most the code data of a key appear at output H per cycle. The logic unit 13 can therefore be in two states, whereby in the first position a "new" key, the code data of which is therefore not stored, can appear at the output while

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this is not possible in the second position. The signal from D1 turns 13 into the first and through the inequality signal of 12 in the second position set. The mentioned inequality signal opens the Output arrangement G and becomes like the inequality signal of the unit I in Fig. 2 is generated. When the AND gate E is energized, the non-occurrence of the inequality signal is negated and, since the signals from EN and 13 together at 12, the code data of the queried and (only) pressed key of the output terminal always arrives H supplied. The interaction between the signals from EN and 13 can take place, for example, that these two are fed to the inputs of a majority circuit with the mentioned inequality signal that gives a signal when at least two of its three inputs are high. This majority detector is built into 12 and works both statically and dynamically. When the one pressed key is released again the detector D2 sends a countdown pulse to the counter AA1 and a pulse to the pulse generator C1. AA1 is now in the position: "Zero keys pressed in". All keys are queried once, but because none is pressed in, this can also be omitted. Assume that after the first key pressed (for example A5) a second one (e.g. A7) is also pressed in.

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The counting arrangement AAI moves into the position: "Two Keys pressed in ". As a result, the pulse generator M1 issues the Key eight pulses down (2 + 2x3), whereby the code data is shifted twice into the memory. The logical one Unit 13 makes sure that in this cycle only

the code data of a key appear on the output terminal.

When a third pulse from the detector D1 is fed to the counting arrangement AA1, the counting arrangement is at a standstill in the position: "Three buttons pressed in" and this button is only pushed in once. The history is now as follows:

Indented
Keys Last
button queried Saved codes
F1 F2 F3 A5 A5 A5 A5 A ₅ * A3 A5 A3 A5 A3 A3 * A5 A3 A3 A5 A5 A5. A5 A5 A3 A5 A7 A3 A3 A3 A5 A3 A5 A7 A5 A5 A5 A3 A3 A5 A7 A7 A7 ^Ä A3 A7 A3 A7 A3 A3 A7 A3 A3 A7 A7 A7

In addition to the three versions shown, others can also be used. So it is possible to change the number of buttons or to increase the number of keys that can be pressed at the same time. Furthermore, one can use a parallel or series

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circuit both when comparing the stored code data and when feeding to the output terminal or when generating the code data by the decoder. It is also possible that the adding machine is busy with a function, whereby the function keys are mechanically locked while Information (for example numbers) introduced into an auxiliary register can be.

It may also be necessary to arrange an additional detector that determines whether 2 buttons can be released at the same time. The last-mentioned method can also be used in combination with a continuous scanning can be applied. Furthermore, the keyboard can be divided into two parts, which by different operators can be served, there can also be several possibly identical keyboards that are connected to a calculating machine that can be used optimally. It is also possible to take action must be taken in the event that the calculating machine is still performing arithmetic processing. This is possible because the main pulse generator C or C2 is blocked by a corresponding signal.

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Claims (1)

PATENT CLAIMS: ; Λ j Keyboard with a query arrangement, with which the keys are queried one after the other, a memory arrangement containing the first elements in which the code data of a first pressed key are noticeable, at least one output terminal, one output arrangement, which can connect an output of the memory arrangement to the output terminal, so that the mentioned Code data appear once at the output terminal, characterized in that the memory arrangement second Contains elements in which the code data of at least a second, later pressed and queried Key are noticeable, with all the mentioned code data being noted at least up to the point in time that the associated key is released, and the code data of a key that has been queried and pressed can be fed to a comparison arrangement in which they are combined with all the code data present in the memory arrangement of keys are comparable, which comparison arrangement in the event that there is no match, can control the aforementioned output arrangement, so that this one output of the memory arrangement with an output of the mentioned second elements and with the output terminal connects. 209822/0859 -20- PHN.5237 2. Keyboard according to claim 1, characterized in that the keys are continuously queried one after the other that a sleep key is present and that the memory arrangement stores the code data at least can contain three buttons. 3. Keyboard according to claim 1 or 2, characterized in that the memory arrangement consists of a Series of units, in each of which the code m data of a key are noticeable and that when the code data of a new queried key is saved, all previously saved code data are shifted one position in the row. k. Keyboard according to one of the preceding Claims, characterized in that the comparison arrangement in the event that there is no match and if the memory arrangement is full of meaningful keys, a Emits error signal. 5. Keyboard according to one of the preceding Claims, in which the polling is controlled by the clock pulses of a clock generator, characterized in that that the mentioned clock generator has a lower pulse frequency after querying a pressed key supplies at least during a time in which the comparison arrangement is comparing the mentioned code data. 209822/0859 -21- PHN.5237 6. Keyboard according to one of the preceding address, characterized in that a locking arrangement is available, the code data on the output cycle when a newly pressed key is queried appear, in the event that a key is pressed again within a period of time, a false signal outputs, whereby access to the output terminal is blocked. 7. Calculating machine with a keyboard according to one of the preceding claims. 209822/0859 ξ, Lee rs eι te