DE2128934A1 - Semiconductor arrangement with at least two transistors and method for producing the same - Google Patents

Description

^ GÜNTHER M. DAVID FHH.4911.

Potontassesscr Va / EVH.

Applicant: NV PHILIPS ¹ GLOEILAMPENFABRIEKEN

File: PHN- 4911 O1 OOQO /

Registration dated June 1, 1971 Z \ Δ O 3 O * +

Semiconductor arrangement with at least two transistors and method to manufacture the same.

The invention relates to a semiconductor arrangement with a semiconductor body in which the semiconductor zones are at least a first and a second transistor extend which transistors are isolated from each other with the help of an Iaolierzone, wherein the semiconductor body has a practically flat surface and both the first and the second transistor at least a group of three successive semiconductor zones of alternating conductivity type adjoining this surface, with from the two groups of three zones, the second zone - seen from the surface - to below the first zone and itself the third zone extends below the second zone, while corresponding zones of the two groups are of the same conductivity type

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are. The invention further relates to a method for producing such a semiconductor arrangement.

Such semiconductor arrangements with two or more transistors isolated from one another are for example from "Philips Technical Review ", No. 27, No. 7, 1966, pages 192-199 known. The therein integrated circuits described contain several isolated npn transistors, which are of the transverse or vertical type, That means that - seen from the semiconductor surface - the The emitter, base and collector zones lie one below the other. The n-type collectors of these transistors are divided by parts an epitaxial layer formed on top of a p-type Substrate is attached. The mutual isolation of the transistors is thereby obtained »that the n-type epitaxial layer with a system of diffused p-conducting insulation zones, which together form a grid and extend from the semiconductor surface into the substrate area into a number of separate n-type conductors Parts or islands is divided. With this type of construction, two transistors go from one transistor to the other in the semiconductor body pn transitions happened, which were connected in series in opposite directions two diodes form, whereby the mutual electrical insulation of the transistors at least for voltages that the breakdown voltage of the diodes mentioned, is secured.

Bai these known integrated circuits is a substantial part of the available semiconductor surface from the deep and thus also demands wide isolation zones, thereby increasing the size the ones available for the circuit elements themselves Semiconductor surface, namely the total surface of the isolated islands, is limited.

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In "Electronics", No. 41, No. 22, from October 28, 1968, Page 6 E (international edition) a transistor was used described in integrated circuits, which takes up much less space. In this self-isolating transistor, the Collector zone, which is designed in the shape of a bowl and completely surrounds the base zone, at the same time as insulation. This becomes the base zone formed by a part of the epitaxial layer surrounded by the collector zone, which layer in this case has the same conductivity type as the substrate has. A diffused emitter zone is provided in this epitaxial base zone. Also at This structure ensures the mutual electrical isolation of the circuit elements because - from a transistor to the going to others - at least two pn-T jumps are passed.

In the case of the transistor structure described last, the thickness of the base zone below the emitter depends, among other things, on the thickness of the grown epitaxial layer dependent. Since the base thickness has electrical properties of a transistor, such as the current gain factor, influenced to a considerable extent, the epitaxial layer must be carefully and with one over the entire semiconductor wafer uniform thickness.

Furthermore, it can happen in various circuits, in particular in logic circuits, that the base-collector transition during operation is at least temporarily effective in the forward direction. This can be done with the two transistor structures described cause an undesirable transistor effect, because in the two structures the pn junction between the collector zone and the substrate is reverse biased because of the required isolation, whereby the substrate acts as a collector

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for the charge carriers injected from the base zone into the collector zone. In this way, large leakage currents can occur flow through the substrate.

Furthermore, in the case of the two types of integrated circuits described, a substantial part of the available surface area of the Semiconductor body required for the electrical connection between the different circuit elements. The improvement in manufacturing techniques brings an increase in the number of circuit elements per integrated circuit and thus increases the complexity of the circuit, which means that the metallization, with the help of which the electrical connections between the elements are established, occupies an ever-increasing part of the surface.

To simplify the wiring pattern required and to reduce the size of the semiconductor surface required for each circuit element, it has already been proposed, e.g. transistors, whose collectors in the circuit have the same potential, in the same isolated part or in the same isolated island of the semiconductor body, so that these transistors actually have a common collector zone. In many Cases, and especially with logical circuits, which are mostly built up from a number of identical Torah positions, are included a compromise inevitable, in which the transistors concerned must be distributed over a number of isolated islands, each forming a common collector zone, generally each Gate circuit has such an island, because otherwise long conductor tracks are required for the connections with the other isolated circuit elements. Since cross connections are avoided, the complexity of the mitallization pattern increases

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and the gloss dex to the surface required for this in the latter case.

The aim of the invention is, inter alia, to provide a semiconductor device to create with transistors isolated from one another »in which the Risk of parasitic transistor action is reduced to a considerable extent. It also has the purpose of a transistor structure to create which is self-insulating and in which the aforementioned dependence of the thickness of the base zone on the thickness of the epitaxial Layer is at least largely avoided.

Dex invention is based, among other things, on the knowledge that this can be achieved in that instead of the collector oxide zone, the base zone of the transistor is also used as an insulating zone, in in which case a tianos toxicity can be obtained which may also offer a number of other advantages which will be further described below.

According to the invention, a semiconductor arrangement of the type described at the outset is characterized in that the second zone of the first Tiansiator next to the part lying between the first and the third zone of this transistor one with this intermediate part contains contiguous bowl-shaped part, whereby the lastxe second zone the dxitte zone of the first The transistor in the semiconductor body pxaktieoh completely surrounds and forms the insulating zone which, with the third zone of the second transistor, forms an insulating pn junction surrounding the first Tiansistoi forms.

Dex first transistor can be «in field effect transistor, the first zone being, for example, ring-shaped and forming a first gate electrode, the dxitte zone then being the second gate electrode The first zone can also be a zone that serves the intermediate

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lying part of the second zone locally overlaps, whereby a Connection between the first and the third zone is obtained and these two zones together form the gate electrode. In both Cases, the second zone contains the source and sink zones and the intermediate canal area.

Preferably, the second transistor is a transverse bipolar transistor, the first zone of this transistor in the Semiconductor body is completely ragben from the second zone. The second zone forms the base zone of the transistor. Preferably The smaller of the first and third zones is used as an emitter and the larger as a collector. In this case it is the first zone is the emitter zone and the third zone is the collector zone of the bipolar transistor.

In a special embodiment of the semiconductor device According to the invention, in particular the first transistor is a transversal bipolar transistor, the first zone in the semiconductor body being surrounded by the intermediate part of the second zone. In this structure, too, the first and third zones preferably form the emitter and collector zones of the transistor.

In such a semiconductor arrangement, the collector zone of the first transistor does not adjoin the at any point third zone of the second transistor, which zone for the first Transistor serves as a substrate. Charge carriers that are injected from the base zone into the collector zone cannot, as a result more than leakage currents flow to the substrate. On the other hand will but compared to the known self-insulating one described Transistor takes up a somewhat larger space · Compared to the non-self-isolating transistors described

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however, wixd achieves considerable space savings, mainly by the fact that there are no separate isolation zones, which Yes as a result of the Due to the orientation of the different diffusion masks, tolerances to be taken into account at a relatively large distance therefrom Base zone lie nuts that are needed.

Ss v was already noticed that known in the case of the described integrated circuits for the mutual isolation of the circuit elements two pn junctions are used, the form an opposing series connection. In the case of the semiconductor device according to the invention is between the first and the second transistor only a single isolating pn junction is present, which is the Operation is biased in the reverse direction.

The substrate of the semiconductor body can be used as a connection, for example as a feed connection, of the arrangement, as a result of which the metallization pattern is simplified in many cases. The transistors with a common collector connection do not need to be accommodated together in one island or in some islands, but because the substrate now forms the common collector zone, they are less fixed in terms of location can be arranged because integrated circuits with a simple topology can be obtained with the aid of a metallization pattern of relatively short conductor tracks. When designing the "layout" can usually be assumed that the metallization · Venn the Metallis iet designed ierungeeraater once gemSss to this pattern, the circuit elements are arranged "This is in contrast" u de · usual Entwerfverfahren in which the storage zunSohst dex circuit elements determined and then one of these

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Storage adapted metallization pattern is designed.

It is Veiter especially when used in a logical circuit Among other things, it is advantageous that the base-collector junction consists of two parts consists. The first part of this transition is between the intermediate part of the base zone and the collector zone. This part in particular contributes to the transit gate effect of the structure and collects the charge carriers injected from the emitter zone into the base zone in the operating state. The second part extends between the bowl-shaped insulating part of the base zone and the Collector zone. This second part forms a diode that connects to the first part, which is the actual base-collector junction of the Transistor forms, is connected in parallel and which prevents the transistor from being largely saturated, which reduces the switching speed is enlarged. However, because of the relatively large length of the pn junction, this transistor remains between the second and the third zone, whereby the base-collector capacitance can be relatively large, for applications in which to the Switching speed particularly strict requirements are made less suitable.

Furthermore, the thickness of the base zone below the emitter zone is equal to the difference in the penetration depth of two surface zones and independent of the thickness of any epitaxial layer.

Most often the bowl-shaped insulating part is adjacent to the third zone of the first transistor, so that the second zone not only surrounds the third zone in the semiconductor body, but also on it adjoins the third zone on all sides and forms a pn junction with this zone.

Preferably the intermediate part is attached to or

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■ at least in the vicinity of the surface with the bowl-shaped insulating part together, the intermediate part in a direction parallel to the surface up to the vicinity of the insulating Part extends and connects there to the insulating part. The intermediate part forms an approach or tail of the bowl-shaped insulating part, which runners are attached to extends the surface along and above part of the third zone.

The third region of the second transistor can be, for example, an epitaxial layer deposited on a substrate of the opposite conductivity type. In a particular embodiment of the semiconductor device according to the invention third zone of the second transistor is a substrate of the first conductivity type on which an epitaxial layer of the same Conductivity type is attached, the cup-shaped insulating Part of the second zone has a surface zone of the second conductivity type, which on the surface of the semiconductor body a Part of the epitaxial layer surrounds and is in the semiconductor body extends to a region of the second conductivity type, which is at the interface between the epitaxial layer and the Substrate lies. The aforementioned surface zone forms the wall the bowl-shaped insulating part of the second zone, which Walled itself on all sides to the bottom of the shell formed by the buried structure and is connected to this bottom. The part of the epitaxial layer lying within this shell forms the third zone of the first transistor.

Sex specific resistance of the epitaxial layer can in the usual way to the requirements to be placed on the collector zones

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be adapted, while advantageously a low-resistance substrate whose specific resistance is lower than that of the epitaxial layer can be used. The semiconductor body can can then be contacted in a simple manner on the substrate side so that it can be applied to a suitable potential.

The epitaxial layer mentioned may be a composite layer consisting of two or more epitaxial layers Layers of the first conductivity type with the same or with a different specific resistance is built up,

They present invention is before · particular importance for integrated circuits, _t besides the already mentioned transistors or other insulated circuit elements such as diodes, more transistors, the transistors of the complementary type, field effect transistors, capacitors, and / or WiderstSnde contain · is then preferably at least one further Circuit element also surrounded by an insulating pn transition between a shell-shaped insulating zone and the third zone of the second transistor.

The bowl-shaped insulating zone of the further circuit element can only serve as insulation or form part of the circuit element itself and, for example, the base zone of a second similar transistor, one of the zones of a diode or the collector zone of a complementary transistor «

In a further favorable embodiment of the semiconductor arrangement according to the invention, you hang the loop-shaped zones of the first transistor and one or more of the other circuit elements together «.

Acf $ i # se W «is« vssden dkm ! Fc-taliisiestisg simply electric ·

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Connections established, and also a considerable Space saving is obtained.

Veiter can use the shell-shaped insulating part of the second Zone can be used for contacting the second zone, which also leads to a Rauaersparung. A further training of the Semiconductor arrangement according to the invention is then also characterized in that aich on the surface of the semiconductor body Insulating layer is located, the second zone with a conductive Contact is provided, which is in an opening in the insulating layer with connected to the insulating part of the second zone.

Preferably, the first zone of the first transistor in the semiconductor body is completely different from the second zone, in particular from the intermediate part of the second zone.

In this case, the contour of the first zone of the first transistor on the surface preferably follows the contour of the intermediate part of the second zone, at least insofar as the latter Contour outside the bowl-shaped insulating part of the second Zone is practically the same distance everywhere. Preferably, not only are the intersection lines of the pn junction between the first Zone and the intermediate part and the pn junction between the intermediate part and the third zone with the semiconductor surface, but also the mentioned transitions themselves practically parallel to each other. This ensures that the thickness of the intermediate part below the first zone and on the the edge of the intermediate part bordering the surface practically is the same, whereby the electrical properties of the transistor can be influenced favorably, while furthermore the intermediate Part of the second zone and the first zone through the same window

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can be attached so that the space required is smaller and during manufacture, the processes for applying a photoresist pattern and, if the doping of the intermediate part in takes place in a non-oxidizing environment, also an etching treatment can be omitted.

The embodiment in which the first zone and the intermediate Part of the second zone are attached through the same window, is particularly useful if the intermediate part of the second Zone, insofar as it is within the bowl-shaped insulating part is on the surface for the most part, e.g. in the case of a rectangular one Zone on three of the four sides, surrounded by the third zone,

Often in the circuits the base or generally the intermediate zone of a transistor with one or more Resistors connected. In a special embodiment of the Semiconductor arrangement according to the invention, such resistors are integrated in a simple manner with the respective transistor (s). This embodiment is characterized in that the second Zone of the first transistor on the surface at least one locally protruding from the acell-shaped insulating part Part, the protruding part adjoining the third region of the second transistor, extending in a direction transverse to that Semiconductor surface Over a smaller distance than the cup-shaped one insulating part in the semiconductor body extends and with is provided with a conductive contact.

The integrated resistors are at least for the most part due to the excellent outside of the bowl-shaped insulating Part lying parts of the second zone formed, while lying within the shell-shaped insulating part

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intermediate part the actual active part of the second Zone forms, i.e. the part in which, in the operating state, the charge tranaport is involved in the actual transistor effect of the structure is involved, at least substantially takes place.

It should be noted that the self-isolating transistor described, even without a second transistor, while maintaining a Number of advantages already mentioned and optionally using a number of the preferred embodiments described can be applied. In this case, the semiconductor region surrounding the insulating cup-shaped part of the base region forms part of, for example, a substrate region which is known as common Support of the integrated circuit is used.

The invention relates to a method for producing the novel semiconductor device described. This procedure is characterized in that on a surface of a semiconductor substrate of the first conductivity type locally in a first Surface area activators of the second conductivity type are applied, and that an epitaxially Layer formed by the first conductivity type and from that of the The upper surface of the epitaxial layer facing away from the substrate hex • is attached in a surface zone of the second conductivity type, which surface zone on the upper surface a part of the epitaxial layer which lies above the first surface area, surrounds, while in the case of the heat treatments used in the manufacture duxoh diffusion of activators of the second conductivity type of the upper FlBoh · and the first surface area hex into the • pitaktieoh · Sohicht d «£ shell-shaped« two part of the Baaieaon « f «is formed.

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The activators ko'nnan ^ J. by diffusion or by incorporating ions and by ion bombardment.In the latter case, the activators can be applied to the first surface after the epitaxial surface has grown doped crystal are assumed »Preferably, however, an epitaxial layer is used. Bas substrate can then be chosen low impedance, thereby facilitating the electrical connection of the substrate · In a particular Ausführungaform of erfindungsgemKssen Method E is for the same reason using a substrate from which the contiguous to said surface layer at least at the location of the first surface region has a higher specific Has resistance than the remainder of the substrate.

This has the advantage that the concentration of the activators of the second conductivity type in the first surface area less needs to be chosen high in order to obtain a zone of the second laitability type at the relevant point. For the rest Part of the substrate can then easily have the lower resistivity applied

Preferably from the top surface of the epitaxial So first the activators for the formation of the surface zone of the second conductivity type applied} according to which in a Gcerfllohengebietg, dae at least the inner edge of the mentioned surface zone partially overlaps the intermediate «part of the second 2onο is formed

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the intermediate part of the second zone leading to the active one Territory belonging to the transistor can then be chosen independently of one another. The concentration is in the surface zone mostly larger than in the active part of the second zone, because the eratere zone often has a greater depth of penetration.

A method can advantageously be used in which, after the intermediate part of the second zone has been applied via an opening in a masking layer applied to the upper surface of the epitaxial layer, via a Opening in the masking material, its limitation practically with that of the former opening collapses, activators for formation the first zone are introduced into the semiconductor body.

If diffused into a non-oxidizing environment, the two openings be identical. If during diffusion of the intermediate part of the second zone, even if the original masking layer consists of oxide, the first window can simply be used to form the second window can be reopened by etching without using an etching mask. This simplifies manufacture while also obtaining an attractive structure in which the thickness of the intermediate part is below the first zone and along the one at the Surface of the lying edge is practically the same.

The protruding wall of the cup-shaped insulating part the second zone can be formed entirely by diffusion from the top surface of the epitaxial layer. After another Execution horn can be activated in the middle part of the first surface area with a small diffusion coefficient, such as Arsenic, and activators around the hand of the surface area

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with a large diffusion coefficient such as phosphorus attached will. In this case, the protruding wall becomes wholly or partially formed by diffusion from the first surface area can be.

Some embodiments of the invention are shown in the accompanying drawings and are described in more detail below. Show it:

1 schematically shows a plan view of part of a first embodiment of the semiconductor arrangement according to the invention,

Fig. 2 shows schematically a cross section along the line II-II of Fig. 1,

Fig. 3 is a simple electrical equivalent circuit diagram of the self-isolating transistor according to the invention,

Fig. 4 schematically shows a plan view of another export ungs form of the self-isolating transistor, which is used in the arrangement according to FIGS. 1 and 2,

Figures 5 and 6 are schematic cross-sections along the lines V-V or VI-VI of Fig. 4,

7 schematically shows a cross section through part of a Further development of the semiconductor arrangement according to the invention,

FIG. 8 is a circuit diagram corresponding to a part of the embodiment according to FIG. 7;

9 is a circuit diagram of a gate circuit,

10 schematically shows a plan view of this gate circuit, which is designed as an integrated circuit according to the invention,

11, 12 and 13 are schematic cross-sections along the Lines XI-XI, XII-XII and XIII-XIII of Fig. 10, and

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2T28934

Pig. 14 is a circuit diagram with a self-isolating Transistor according to the invention.

A first embodiment is an integrated circuit, of which a part in the Pig. 1 and 2 is shown. This semiconductor arrangement contains a semiconductor body 1 in which the semiconductor zones are located at least a first transistor T. and a second Transistors T "extend with the help of an insulating zone 2 against each other are isolated. The semiconductor body 1 has a practical flat surface 3 and the transistors T and Tp each have at least a group of three successive semiconductor zones of alternating conductivity type adjoining the surface 3, namely the zones 4i 5 and 6 or 7 »8 and 9 · Of the two groups of three zones, the second zone 5 or 8 - extends from the surface seen from here - to below the first zone 4 or 7 and the third Zone 6 or 9 bia below the second zone 5 or 8. Also have corresponding zones of the two groups, ie zones 4 and 7 »5 and 8 or 6 and 9 have the same conductivity type.

According to the invention, the second zone 5 of the transistor T _{1 has, in} addition to the part 10 lying between the first zone 4 and the third zone 6, a shell-shaped part 2 connected to this part, whereby the second zone 10, 2 completely forms the third zone 6 in the semiconductor body surrounds and forms the insulating zone which, together with the third zone 9 of the transistor Tp, forms an insulating pn junction 11 surrounding _{the transistor T 1.}

The transistor Tp- is a self-isolating transistor with a semiconductor body, a surface of this body adjoining a region of the first conductivity type, which region three consecutive zones bordering the surface

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contains changing conductivity type, furthermore the activator concentration in the middle of these three zones larger than in a part of the underlying outer zones bordering the middle zone Zone (hereinafter referred to as the third zone), the middle Zone of the second conductivity type and apart from that between the both outer zones a part connected with this part second cup-shaped part contains, the third Zone in the semiconductor body is surrounded by the middle zone and the middle zone with the mentioned area of the first conductivity type forms an insulating pn junction surrounding the transistor. The transistor is insulated with the aid of the middle zone, in the present example the base zone 10, 2. This in contrast to the well-known self-isolating transistor. It serves the collector zone at the same time as an insulating zone. This gives, inter alia, the advantage that the self-isolating transistor according to the invention can be placed in the collector region of a transistor of the same type. In other words, the substrate can be considered common Collector (or common emitter) of a number of transistors of a certain type can be used, while moreover simple isolated transistors of the same type in which corresponding zones have the same conductivity type are used can.

The second transistor T ₂ is a transversal bipolar transistor in which the first zone 7 in the semiconductor body is completely surrounded by the second zone 8. Of the zones 7 and 9, zone 7, which is the smallest, usually serves as the emitter zone, while zones θ and 9 then form the base or collector zone.

In the present exemplary embodiment is also the first

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Transistor T .. a "bipolar transistor. The zones 4; 10, 2; 6 the emitter or collector zone, the base zone or the collector or emitter zone. The transistor T ^ can also a field effect transistor aein. Zone 4 can be, for example, ring-shaped, at least with a closed geometry, and form a gate electrode. The source and the sink can then through the outside or within such an annular zone lying part of the zone 10, 2 are formed, while the zone 6 can act as a second gate electrode. Zone 10 in two parts connected above a canal area are distributed in that the zone 4 overlaps the zone 10 in the lateral direction and is related to zone 6.

The collector zone 6 of the bipolar transistor T ₁ is completely surrounded by the base zone 10, 2 and thus does not adjoin the substrate at any point, which, as in the known structures, can act as the collector of a parasitic transistor. This is of particular importance for logic circuits in which, as is known, the Baais-collector junction can be effective in the forward direction under certain circumstances and charge carriers can be injected into the collector zone from the base zone. In the presence of a parasitic transistor, large leok currents can then flow to the substrate. It is evident that this problem is completely eliminated in the case of a transistor corresponding to the transistor _{T 1 described in Hem.}

It is also important that the transistor T _{1 take up} much less space than a transistor mounted in an isolated island in the usual way. This saving in space is due to the fact that the active part 10 of the base zone lies against the isolation zone. With the usual structures, on the other hand, the base zone

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and the isolation zones are at a certain distance from each other, what distance also because of the tolerances to be taken into account in connection with the mutual orientation of the different Diffusion factors and those that occur during orientation Deviation must be relatively large.

In contrast to the known semiconductor arrangements with circuit elements isolated from one another by pn transitions, the semiconductor arrangement according to the invention does not have two diodes connected in series in opposite directions, but only a single insulating diode 11. The pn junction 11 must be biased in the reverse direction during operation, which in practice is almost always the case by itself, and with certainty when the collector zone 9 is used as ^a feed connection.

By using the collector zone 9 as a feed connection, a simpler metallization pattern can be used in many cases because this connection is available via the substrate at practically any desired location on the semiconductor surface 3 and via short conductor tracks with the different circuit elements can be connected.

Since the transistors share a common collector, like the transistor T «, no longer like the usual structure, are tied to an isolated island and therefore take up less space and are less tied to a specific location, while the isolated ones are also Transistors take up less space when designing the "layout" or topology of more complex integrated circuits can be assumed from a metallization pattern design, the position of the circuit elements being determined by this metallization pattern will. With the usual techniques with consideration for one

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As complete as possible utilization of the available semiconductor surface rather, the mounting of the circuit elements is determined first, while then one that is adapted to the mounting of the circuit elements Metallization pattern is designed.

The Baais-collector junction of the transistor T .. consists of two parts 12 and 13. The first part 12 is located between the intermediate part 10 of the base zone 10, 2 and the collector zone. This part contributes in particular to the transistor effect and collects the charge carriers injected from the emitter zone 4 into the base zone in the operating state. The second part 13 is located between the cup-shaped insulating part 10 and the collector zone 6 and forms a diode D shown in FIG the actual active base-collector junction 12 in parallel is switched. The diode D prevents the transistor T ^ largely is saturated, whereby the switching speed of the transistor T .. is favorably influenced.

The thickness of the base zone in the active part of the self-isolating transistor T ₁ , ie below the emitter zone 4 »is determined by the difference in the depth of penetration from the surface 3 of the zones 10 and 4.

The third zone of the second transistor, in the present exemplary embodiment the collector zone 9 of the transistor T ₂ , is a substrate 9a of the first conductivity type, on which an epitaxial layer 9b of the same conductivity type is applied. The bowl-shaped zone 2 of the transistor T- has a surface zone 2a of the second conductivity type, which surrounds a part 6 of the epitaxial layer 9b on the semiconductor surface and extends from the surface 3 to a region 2b of the second conductivity type

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which is located at the interface between the epitaxial layer 9b and the substrate 9a. The surface zone 2a forms the protruding wall of the bowl-shaped insulating part 2 and adjoins the base of the bowl formed by the buried region 2b on all sides. The part 6 of the epitaxial layer lying within this shell is the collector zone of the transistor T ₁ .

The specific resistance of the epitaxial layer 9b can be adapted in the usual way to the requirements to be placed on the collector zones and the collector-base junctions. The substrate 9 & is preferably of low resistance in connection with the already described contacting on the underside, a low series resistance being desired. Furthermore, the collector zone 6 can be provided with a contact zone 14 if necessary. Insofar as the voltage applied to the substrate 9a has to be fed to one of the remaining circuit elements via a conductor track, this conductor track can be connected to the substrate at a location suitably selected with regard to a simple metallization pattern via an opening in the insulating layer and a contact zone 15. These zones 14 and 15 can be applied at the same time as the emitter zones 4 and 7, for example. To reduce the collector series resistance, the collector zone of the transistor T has a buried part 16.

The different semiconductor zones can incidentally in the usual way via openings in one on the semiconductor surface lying insulating layer 17 with conductor tracks by contacting and / or be connected to other circuit elements of the arrangement by interconnection. These conductor tracks as well as those mentioned

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There are no openings in Pic.1 and 2 for the sake of clarity shown.

Of course, other geometries can be used for the transistors. Thus, FIGS. 4-6 show another embodiment of the transistor T ₁ , corresponding parts being denoted by the same reference numbers as in FIGS. In this embodiment, the contour 20 of the emitter zone 4 follows the surface of the contour 21 of the intermediate part 10 of the base zone 10, 2 at all points at practically the same distance. The contours 20 and 21 are the lines of intersection of the pn junction 22 between the emitter zone 4 and the intermediate part 10 and of the pn junction 12 between the intermediate part 10 and the collector zone 6 with the semiconductor surface 3 and 21, but also the pn UebergSnge 12 and 22 themselves over virtually _their: -anze surface almost parallel to each other. As a result, the thickness of the intermediate part 10 at the Rndern and below the emitter zone 4 is practically the same, whereby the electrical properties of the transistor are favorably influenced.

In this embodiment, the shell-shaped insulating Part 2 of the base zone 10, 2 used for contacting the base zone. On the semiconductor surface 3 there is a Insulating layer 23 in which an opening 24 is made. One Conductor track 25 extends over insulating layer 23 and through the opening 24 up to the semiconductor surface 3. In the opening, the conductor track 25 forms a conductive transition with the shell-shaped insulating part 2. Furthermore, the opening 24 in this case is attached in such a way that the conductor track 25 also connects to the collector zone 6 forms a Schottky junction. As is well known, one enlarges

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such Schottky diode between the base and the collector the switching speed of the transistor, where "it is noted that one Schottky diode in this regard because of its lower threshold voltage even more effective than the aforementioned pn diode "> 5 is.

The fact that the 6 base contact can be attached to the shell part 2 results, among other things, in the advantage that the active part of the base zone, i.e. the intermediate part 10, and the emitter zone 4 can be attached via the same opening in a masking layer, this opening can also be used for the emitter contact. In addition to the aforementioned improvement in the electrical properties of the transistor, which results therefrom, this also simplifies production. In this way, the processing for applying a photoresist pattern and, if the doping takes place in a non-oxidizing environment, also an etching treatment are saved.

Insofar as the intermediate part 10 lies within the insulating part 2, it is for the most part on the surface 3 surrounded by the collector zone 6, whereby the fact is exploited as far as possible that in this case as a result of the uniform Base thickness also the edge of the transistor is active. File can still it should be noted that, insofar as the emitter zone 4 and the shell-shaped Part 2 overlap somewhat, this part of the emitter zone is mostly practically inactive because the bowl-shaped part 2 usually more heavily doped than the intermediate part 10. The injection of charge carriers from the emitter zone is mainly take place in the part of the base zone with the lowest doping concentration.

For the sake of completeness, it should be noted that in the case of diffusion of contamination through an opening in a Maakierungsachicht

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the depth of penetration is known to be in a direction transverse to the semiconductor surface larger than in a direction parallel to this Surface is. This means that even if the Baaia and the Emitter zone can be attached through the same opening, the base thickness is not exactly even. The distance between the pri-mountainous is near the surface, i.e. on the edge next to the Emitter zone, usually a little smaller than below the emitter zone.

A further exemplary embodiment, which is illustrated with reference to FIG. 7 is described, has a substrate 40, which is with a composite epitaxial layer is provided, which consists of two parts and 42 is constructed. The emitter zone is located in the semiconductor body 44 »the base zone 45» 46 and the collector zone 47 of a self-insulating first transistor through an insulating pn junction 48 of a second Tranaistor of the same type with an emitter zone 49 »a base zone 50 and a collector zone 40 are separated is. In addition to these two transistors, there is another isolated circuit element, namely a complementary one Transistor with an emitter zone 51 »a base zone 52 and a Collector zone 53 · The collector zone 53 is cup-shaped and forms an insulating pn junction 48 with the collector zone 40 - 45 The cup-shaped zones 46 and 53 of the first transistor and the complementary transistors are related to one another, as a result of which an electrical connection of the one shown in FIG. 8 without metallization Kind is preserved.

The collector zones 47 and 40-43 are both buried with one Part 54 or 43 to reduce the collector series resistance Mistake. Furthermore, contact zones 55 and 56 are provided in the collector zone 47 and in the base zone 52. The application of a

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composite epitaxial layer 4I »42 stands with the manufacturing process in context, as will be explained in more detail below.

The invention is of particular importance for logical circuits. As an example of such a circuit, the FIGS. 9-13 describe a gate circuit. This gate circuit forms the subject of Dutch patent application No. 70 09 090. The mode of operation of this circuit is relevant to the present invention not essential, for which reason it is not discussed in more detail. Such a gate circuit can be used, for example, as a component for the Construction of larger logic circuits, such as flip-flops, comparators or memory, serve.

FIG. 9 shows the electrical circuit diagram, while FIG. 10 shows a topology or "layout" of this circuit, the different circuit elements in these figures are denoted by corresponding reference numerals.

The semiconductor arrangement contains a semiconductor body 70 which has a low-resistance substrate fi on which an epitaxial layer 72 of the same conductivity type and with a higher specific resistance is applied. The substrate 71 and the epitaxial layer 72 together form the common collector zone of the transistors T ₁₁ - T ... ,, T ₁ ^ and T ^ g, which can be connected to a reference potential, for example to earth. In the present exemplary embodiment, the positive terminal of the supply voltage source is also connected to this zone, so that the substrate carries the most positive potential that occurs in the circuit.

The input _{transistors T 11} -T ₁ each have a base zone 73 and an emitter zone 74. Over on the insulating layer 75

109853/1672

Lying metal tracks J6, which are connected to the base zones 73 in openings in the insulating layer, can be fed input signals to the transistors T ₁₁ , T ₁₂ and T ₁ .

A metal track 17 connects the three emitter zones 74 with the base zone 78, 79 of the insulated transistor T ₁ .. This base zone has an intermediate part 76 which encloses an emitter zone 80 in the semiconductor body, and a bowl-shaped insulating part 79 with the common collector zone 71 »72 forms an insulating pn junction 81 surrounding _{the transistor T 14.} The collector zone 82 of the transistor T ₁ -, which is provided with a contact zone 83, is completely surrounded by the base zone 78, 79 in the semiconductor body. The intermediate part 78 of the base zone is connected to the semiconductor surface 84 with the insulating part 79, the intermediate part 78 extending in a direction parallel to the surface 84 up to the vicinity of the insulating part 79 and connecting there to the part 79. As a result, the intermediate part 78 forms a shoulder or extension of the insulating part 79 adjoining the semiconductor surface 84, which extension extends above the collector zone 82.

The insulating part 79 is on the semiconductor surface 84 ring-shaped, or at least has a closed geometry. This ring can be used for contacting the base zone 78, 79 will. At a suitably selected point, the insulating layer 75 can be provided with an opening 85 above the insulating part 79 via which the conductor track 77 is connected to the base zone 78, 79 is. Thanks to this flexibility with regard to the position of the base metal contact, the metallization pattern can usually be easier and with shorter conductor tracks, whereby intersecting metal

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■ lanes can often be avoided more easily.

As can be seen from the circuit diagram (Fitu 9), #pt resistor R _{11 is} connected to the Baais of transistor T ₁ . This fact is used to save a conductor track and the space for the associated contact openings in the insulating layer. Dip zvoite
Zone 78, 79 of transistor T ₁ . indicates a surface 84
locally protruding from the insulating part 79 on part 86,
which adjoins the common collector zone 71t 72 and extends in a direction transverse to the semiconductor surface 89 over a smaller distance than the shell-shaped insulating part 79 in ^ e ^ semiconductor body. This protruding part 86 can, for example, be attached at the same time as the part 78 lying between it. The intermediate part 78 located within the shell-shaped part 79 forms the actual active part of the base zone of the transistor T ₁ .
takes place at least substantially. The resistor R ₁₁ becomes
formed at least for the most part by the part 86 protruding from the shell-shaped part 79. The insulating part 79 thus serves not only as insulation for the transistor, but also as a low-resistance connection of the active part of the base zone and as a low-resistance connection between the active part and the resistor R ₁₁ . It should be evident that a plurality of resistors can also be connected to the base zone in the same way, so that the circuit shown in FIG. 14, which is often wounded, can also be easily integrated, the shell-shaped insulating part
serves as a low-resistance connection between the two resistors R "" and Rp ₁ and the active base zone of the transistor Tp _n .

1 night 9 8 S ^3/1 8 7 2 BATH

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The resistance R _{11 is} still connected to the negative terminal of the supply voltage source. For this purpose, the zone 86 is connected to a metal layer via an opening in the insulating layer 75.

The resistor R ₁ , - is formed by the. ", One 88 and is connected via an opening in the insulating layer to a metal track 89, which leads to the emitter zone 80 of the transistor T ₁ , and the emitter zone 90 of the transistor T. ,, - The resistance R. ,, - becomes

Ib 15

formed by the zone 9I, which is connected on one side with the zone 88 and on the other side with the base zone 92 of the transistor T ₁ g. Dor resistor R ₁ . is formed by a zone 93 connected to the base zone. By using the metal layer 94 », which lies in the opening 95 in the insulating layer, which is located next to the emitter zone 90 and opposite the opening $ 6 , on the semiconductor surface, the resistance value of the resistor R _{1 is} more precisely defined. _{The resistor R 1} is across the opening 96 and the metal track 97. connected to a first of two emitters 98 of the Mehremittertranaistora T., _c . The two emitter zones 9 & are surrounded by a base zone 99 in the semiconductor body. Zones 100 and 101, which form resistors R ₁ - and R ₁ , respectively, are connected to this base zone 99. With these resistors, too, a metal layer 102 lying on the semiconductor surface is used to improve the definition of the resistance values. A metal track 103, which connects the second emitter 98 of the transistor T ₁ , - with the collector _{zone of the transistor T 1} . and connects to the resistor IL, forms the electrical output of the gate circuit. The resistor R ₁₂ is connected to a metal layer via an opening IO4 in the insulating layer, which is connected to the common collector zone 7I, 72 with the help of a contact zone IO6 »

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The transistors T ₁₁ -T ₁ g are each provided with a buried low-resistance part 107 to reduce the collector series resistance, which low-resistance parts 107 extend on and in the vicinity of the interface between the substrate 71 and the epitaxial layer J2 .

Particularly in the case of an integrated "circuit of the type described above with a group of transistors having a common zone, the application of the invention provides significant advantages. In the first place may be mentioned dasa a smaller number iso- ψ profiled areas are used as required in the conventional embodiment, Furthermore, the saving of space is deplorable, especially in the case of a large number of transistors with a common zone, also because the topology and the metallization can then be kept simpler, which is attributable to the fact that the transistors mentioned are not fixed in place and not, as usual, need to be accommodated in a common isolated island.

The gate circuit described has a simple metallization pattern. A substantial number of connections are without metal tracks while the circuit elements are further grouped in this way can do that - also thanks to the relatively large freedom in with regard to the contact points of the insulating zones - for the Remaining internal connections short conductor tracks are sufficient.

The semiconductor arrangements described can with the help of conventional techniques for local doping of semiconductor material are produced. For example, the production of the semiconductor device is now according to FIG. 7 described.

For example, it is made of an η-conductive silicon body with a

"'109853/1872 ^BAD original

specific resistance of about 0.01 & cm assumed. In a first surface area of this substrate 40, which corresponds to the position of the buried part of the insulating zone 46, acceptors, for example boron, are applied. For example, the silicon body is provided with a masking oxide layer in which an opening is made using the usual photo-etching techniques. Then the body is heated for about half an hour to about 95O ° C in a boron-containing atmosphere. This can then be followed by heating to 1200 ^° C. for about 4 hours in an oxidizing atmosphere. Then an η-conductive epitaxial layer 4I with z.3, a thickness of about 6 to 10 / μm and a specific resistance of about 0.3-1 1 cm is grown in the usual way. In a surface area of this epitaxial layer, which corresponds to the positions of the buried parts 43 and 54, donors, for example arsenic or antimony, are now applied, for example by ^{heating to about 1200 °} C. for 2 hours in an arsenic-containing atmosphere, after which the Body is kept for about 4 hours at about 1200 ⁰ C in an oxidizing atmosphere. During this and the subsequent processing, acceptors also diffuse from the buried parts doped with boron into the epitaxial layer 4I.

In the next step, the epitaxial layer is grown. This layer, too, consists of n-conductive material and has a thickness of about 6 μm, while it also has a specific resistance of about 0.3-1>& cm. In a surface area rr. With a closed configuration which corresponds to the position of the protruding WSr'3β of the insulating shell-shaped part 46 and which thus surrounds one or more parts of the epitaxial layer 41 »42 which lie above the first surface area doped with boron then from the upper surface facing away from the substrate 40

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epitaxial layer / 11, 42 acceptors attached, z _r "., by diffusion of boron during about half an hour to about 1100 ⁰ C and subsequent heating in an oxidizing atmosphere for about 3 hours at about ⁰ C. 1POO

De "r iegende between] part 45 and the parts of a half-hour can be obtained at about 1180 ⁰ C in an oxidizing atmosphere 5 ° and 5 ¹ can be prepared by diffusion of boron during οtwa oiner half hour to about 95O ° C and anschliesnende heating during STVS The square resistance of these zones is, for example, about 150 JZ. Dab (? I the diffusion of the intermediate part 45 takes place in a surface area which partially covers at least the inner edge of the surface zone of the insulating, shell-shaped part obtained by the preceding processing.

Then, the Krai "be *. I erzonen 44 and 49 and the contact zones 55 and 56 by the diffusion of phosphorus, for example, for about 20 minutes at about 1000'C, and by a subsequent heating of about 20 minutes at about 1050 ⁰ C, mounted The square resistance of this zone is, for example, about 5 Sl.

The diffusion of acceptors from the buried part doped with boron into the epitaxial layer has already been mentioned. During the heat treatments described, this diffusion continues to such an extent that, in combination with the diffusion in the opposite direction from the surface zone mentioned on the upper surface of the epitaxial layer, the closed, shell-shaped p-conductive zone 46 is obtained. Here, it should be noted that the diffusion ouch the buried part slowly goes to the site of the buried region 54 in front of what is zuru'ckzufü'hrer to the present there donor concentration, difficult din About doping and auapp · ^": he \ a diffusion electrical Fe counteracting by acceptors! "<?.

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BATH

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evokes. At the location of the zone 54, the extent of the buried part of the dish-shaped zone 46 in the epitaxial layer will therefore be small. At the edge of the buried part, around zone 54, this expansion will be considerable, because here the donor concentration is much smaller. In this way, part of the protruding wall of the zone 46 is already formed by diffusion from the substrate. In a somewhat modified manufacturing process, using this effect, the protruding wall is largely obtained from the substrate and supplemented from the upper surface during the diffusion processing, during which processing the intermediate part of the second zone is also applied. Diffusion processing is saved in this way. Incidentally, this effect can, if necessary, be reinforced by adding activators with a small diffusion coefficient, such as boron or arsenic, in the part of the buried part covered by zone 54, and activators with a large diffusion coefficient, such as aluminum or phosphorus, at the edge of the buried part , be attached. AUOH can activators, for example, those having a large diffusion coefficient in an annular area around the buried zone 54 ^a of the OberflSche the epitaxial layer n 4I mounted.

In the usual way, openings can be made in the insulating layer for contacting the different semiconductor zones. In these openings and on the insulating layer can then the metallization pattern for the electrical connection and the electrical connection can be applied, e.g. by having a Aluminum layer is evaporated and then etched according to a pattern.

Finally, the semiconductor body can be used in the usual way can be dismantled in a standard cover.

109853/1672 bad original

- 34 - ΡΗ «Ϊ.4? · Ί.

The procedure described is only one possible example. Among other things, it is also possible for the doping to be incorporated by ion bombardment will. In this case, even a homogeneously doped crystal without an epitaxial layer can be used because of the buried zones in the case of ion exposure, yes, can be attached over the free upper surface can. In connection with the use of the substrate as a supply connection however, a low-resistance substrate is preferably assumed, on which a high-resistance epitaxial layer is applied. The composite epitaxial used in the method described above Layer has the advantage that greater freedom with regard to the choice of doping concentration for the two adjacent buried zones of opposite conductivity types consists. These buried zones can both be made in the substrate. But then it must be used when determining the doping concentrations of the substrate and the two buried zones, the fact that overdoping must be achieved twice must be taken into account can bring with it that, in particular, the concentration in the low-resistance Substrate would have to be chosen higher than is desired in view of a low series resistance for the Speiaeanschlusa.

The doping of the substrate can also be practically independent be chosen if the one is adjacent to the surface of the substrate Layer at least at the location of the surface area of the first buried zone has a higher resistivity than the rest Has part of the substrate. This can be achieved with the help of outdiffusion which can be done locally if necessary, or e.g. with the help of a high-resistance epitaxial layer, in the latter case Trap the substrate and the epitaxial layer together form the actual substrate area of the structure described.

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The arrangement according to FIGS. 4-6 can be used with a veroinffjclit'in Modification dpa bore its described method manufactured will. Including the attachment of the intermediate part The production of the base zone proceeds in an analogous manner, with the Machining to obtain a low-resistance buried part in the collector zone 6 can be omitted. Also in context this allows a simple epitaxial layer 9 *> be combined with a sufficiently low-resistance substrate 9 &.

The modification of the method relates to the fact that after the attachment of the intermediate part 10, the opening in the masking layer 23 »over which the activators are attached in the part 10, again exposed by etching without masking can be, whereby the alignment of a photomask is avoided, or whereby this alignment, if at the same time with the emitter zone 4 a contact zone 14 has to be applied becomes less critical with regard to the desired accuracy. Using a difference in the thickness and / or in the composition of the masking I t inside and outside the closed opening, is at Re-exposure of the opening by etching without photoresist masking the re-exposed opening automatically with great accuracy i'i aligned with the original opening. The two Openings are practically identical. This re-freeing is naturally omitted if during and after education '! In part 10, the opening used for this purpose remains free, which is, for example, the Can be the case when the diffusion occurs in a non-oxidizing environment is carried out.

The above also applies to the opening for the emitter metal contact is needed. In this case aich results in the additional

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The advantage that the metal contact automatically extends to a small distance from the pn junction, which results in the series resistance Emitter can be particularly low.

It is evident that the invention is not limited to the exemplary embodiments described and that within the scope of FIG Invention many variations are possible. So the described can be self-insulating A transistor according to the invention, in which at least three consecutive Extending semiconductor zones in the substrate area, one of these Semiconductor zones with the substrate area forms a pn junction which serves as an insulating transition, the latter insulating Semiconductor region has a buried part that is parallel in one direction to the surface serves as a separation between the two other semiconductor zones of the transistor and the substrate area, and one with the buried part having contiguous protruding wall part, the extends to the surface and which also serves as a separation between the two other semiconductor zones and the substrate area the insulating semiconductor zone surrounds the other two semiconductor zones, and the wall toilet on the surface at least one above the buried one Part lying and from the surface by redoping of a part of the substrate region has an extension formed, which extension forms the middle of the three semiconductor zones of the transistor, except in the combinations described with reference to the figures, also in connection with, for example, one or more further self-insulating Transistors, with (a) Peldeffekttranaistor (s) with diodes and / or to be used with capacities. The second transistor possibly missing. When combined with one or more other isolated circuit elements, the elements to be used for these elements can be

ORIGINAL

109853/1672

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reversing sohale-shaped isolation zones not only, as described, themselves form part of the relevant circuit element and e.g. form the collector of a complementary transistor, but also serve only as insulation. Furthermore, the third zone of the second transistor can also be an epitaxial layer, which on a substrate crystal of the opposite conductivity type or is braoed on an insulating base.

The protruding wall of the bowl-shaped insulating zone can not only partially but also completely by diffusion also at the interface between the substrate and the epitaxial layer attached buried area. The invention can also be used with the integration of logic circuits in other designs,

like DTL, ECL and E CL. Resistors with great value, like the resistor R ₁₁ in Pig. 9, can be designed as buried resistors to a greater or lesser extent in order to save space by locally covering them with a zone of the opposite conductivity type. Furthermore, other materials, such as

III V
Germanium or semiconducting AB compounds, and for the insulating and / or masking layer, for example, silicon nitride, aluminum oxide or combinations thereof with silicon oxide can be used. In addition to aluminum, other conductors, such as molybdenum, or layers composed of different layers, such as titanium-platinum-gold, are suitable for the metallization pattern. The diffused contact zones can, for example, be replaced by platinum-silicide contacts. In the bowl-shaped insulating part of the self-insulating transistor and / or in the bowl-shaped part of a further circuit element, one or more diodes can simply be obtained by having one or more additional zones therein at the same time as the emitter zone

109853/1672 ^{ORIGINAL BATHROOM}

- 38 - PHN.4? · '1.

e.g. forming cathodes, with the insulating part then acts as an anode. In general, the dimensions of the insulating Part large enough to prevent parasitic transistor effects between these additional zones, the insulating part and one on this part bordering semiconductor area, such as the collector zone or the substrate, practically to be avoided completely.

It is noted that in the described embodiments the bowl-shaped insulating zone the remaining zones of the self-insulating Completely surrounds the transistor, which is also preferably the case 13t. But it is obvious that under certain circumstances the 3-bowl-shaped Isolation zone can be locally interrupted, e.g. to get a connection to the collector zone inside the semiconductor body.

1098S3 / 1672

Claims (19)

PATENT CLAIMB ; Λ1. ) Semiconductor arrangement with a semiconductor body in which the semiconductor zone at least one first and one second transistor extend, which transistors with the aid of an insulating zone from one another are separated, the semiconductor body being a practically flat Has surface and both the first and the second transistor at least one group of three consecutive to this Semiconductor zones of alternating conductivity type adjacent to the surface contains, whereby of the two groups of three zones the second zone - seen from the surface - extends to below the first zone and the third zone extends below the second zone, while corresponding zones of the two groups are of the same conductivity type , characterized in that the second zone of the first transistor is adjacent to that between the first and the third zone this transistor lying part with this one in between Part having contiguous bowl-shaped part, whereby the the latter second zone almost completely surrounds the third zone of the first transistor in the semiconductor body and forms the insulating zone with which of the third zone of the second transistor forms an insulating pn junction which at least practically surrounds the first transistor. 2. Semiconductor arrangement according to claim 1, characterized in that the second zone of the first transistor, which is the third zone practically completely surrounds this transistor in the semiconductor body, adjoins this third zone and with this third zone a pn junction forms. 3. Semiconductor arrangement according to claim 1 or 2, characterized in that that the intermediate part is parallel in one direction to the surface up near the bowl-shaped insulating 1098B3 / 1672 - 40 - "PFN.4911. Part extends and connects there to this insulating part, whereby these two parts are related to each other, 4. Semiconductor arrangement according to one or more of the preceding Claims, characterized in that the first "one dp? Second." The transistor in the semiconductor body is completely surrounded by the second zone of this transistor, the second transistor being a bipolar one A transistor whose first, second and third zones form the emitter, base and collector zones, respectively. 5. Semiconductor arrangement according to one or more of the preceding Claims, characterized in that the intermediate part completely surrounds the arfite zone of the first transistor in the semiconductor body, the first, second and third zones of the first transistor being the emitter, base and collector zones of a bipolar transistor, respectively Form transistor. 6. Semiconductor arrangement according to one or more of the preceding Claims, characterized in that the third region of the second transistor is a substrate of a first conductivity type to which an epitaxial layer of the first conductivity type is applied is, wherein the schalenför iige insulating part of the second zone of the first transistor has a surface zone which is on the surface of the semiconductor body surrounds part of the epitaxial layer, this surface zone extending up to an area in the semiconductor body extends from the second conductivity type and is related to this area, which area lies at the interface between the epitaxial layer and the substrate. 7. Semiconductor arrangement according to claim 6, characterized in that the resistivity of the substrate is lower than that of the epitaxial layer is. BATH 109853/1672 - / 11 - γηϊ: .4? "Ι. 212893Α 8. Semiconductor arrangement according to one or more of the preceding Claims, characterized in that ausaer the first and the second transistor, at least one further circuit element is present is, which is also of an insulating pn junction between a cup-shaped insulating region and the third region of the second transistor is surrounded. 9. Semiconductor arrangement according to claim 8, characterized in that the shell-shaped part of the second zone of the first transistor is related to the bowl-shaped zone of the further circuit element, whereby the first transistor and the further circuit element are electrically connected to one another, 10. Semiconductor arrangement according to one or more of the preceding Claims, characterized in that on the surface of the Semiconductor body is an insulating layer, the second zone of the first transistor is provided with a conductive contact which is in an opening in the insulating layer with the shell-shaped part connected to the second zone. 11. Semiconductor arrangement according to one or more of the preceding Claims, characterized in that the first zone of the first transistor in the semiconductor body is completely surrounded by the second zone, 12. Semiconductor arrangement according to claims 10 and 11, characterized characterized in that the contour of the first zone of the first transistor on the surface of the contour of the intermediate part, at least to the extent that the latter contour is outside the shell-shaped insulating Part of the second zone is practically the same distance everywhere follows. 13. Semiconductor arrangement according to one or more of the preceding Claims, characterized in that the intermediate part, 109853/1672 ORIGINAL BATHROOM - / 12 - FFN.4911. _{insofar as it lip t} <rt within the acellular insulating part, on the surface for the most part adjoins the third zone of the first transistor and is surrounded by this zone. 14 · Semiconductor arrangement according to one or more of the preceding Claims, characterized in that the second zone has the first transistor on the surface at least one locally from the Sohalen-shaped insulating part has protruding part, wherein the protruding part adjoins the third region of the second transistor, in a direction transverse to the surface over a ^ smaller distance than the shell-shaped insulating part in the semiconductor body extends and is provided with a conductive contact. Method for producing a semiconductor arrangement according to one or more of the preceding claims, characterized in that activators of the second conductivity type are applied locally in a first surface area to a surface of a semiconductor substrate of the first conductivity type, and that on the surface mentioned an epitaxial layer of the first is formed conductivity type and mounted a surface zone of the second Le it- W style capability of the side facing away from the substrate top surface of the epitaxial layer side, on the upper surface of a portion of the epitaxial layer that covers, surrounds the first surface area while at the in Manufacture carried out heat treatments by diffusion of activators of the second conductivity type in the epitaxial layer from the upper surface and from the first surface area of the shell-shaped insulating part of the second zone of the first transistor is formed. 16. The method according to claim 15t, characterized in that a Substrate is used, of which the layer bordering the surface, 1.09853 / 1672 5AD ORIGINAL - A3 - PHN.4911. at least at the point of the first surface area, a higher one has specific resistance than the remainder of the substrate. 17. The method according to claim 15 or 16, characterized in that daas from the upper surface of the epitaxial layer after the application of the activators for forming the surface zone of the second conductivity type in a surface area which has at least the inner edge The surface zone mentioned is partially covered, the intermediate one Part of the second zone is attached. 18. The method according to claim I7 »characterized in that the intermediate part through an opening in one on the free Surface applied masking layer is applied, after which Via an opening, the limitation of which practically coincides with that of the opening mentioned first, activators for the formation of the first Zone of the first transistor are attached in the semiconductor body. 19. Semiconductor arrangement, in particular integrated circuit, with a semiconductor body, one of the surfaces of this body being adjoined by a region of the first conductivity type, which region contains three successive zones of alternating conductivity type of a transistor adjoining the surface, the activator concentration in the middle of these three Zones larger than in a part of the outer of these three zones which adjoins the middle zone (hereinafter referred to as the third zone), which is adjacent to the middle zone, characterized in that the middle zone is a zone of the second conductivity type and apart from the intermediate zone Both outer zones lying part has a coherent shell-shaped part with this part, the third zone in the semiconductor body is practically completely surrounded by the middle zone and the middle zone with the mentioned area of the first conductivity type at least practically a transistor sch surrounding insulating pn-Uebergane forms. 1G98S '? / 1fi70 ^{3C8 <J / UJ /} ^ & AD ORIGINAL L e e r e i t e