DE2046505A1 - Contact arrangement for semiconductor components - Google Patents

Description

7052-70 / Kö / S
RCA 62,339
Convention Date:
September 25, 1969

RCA Corporation, New York, N.Y., V.St.A.

Contact arrangement for semiconductor components

The invention relates to a contact arrangement for semiconductor components such as diodes, transistors, integrated circuits and the like *

Certain semiconductor components, namely integrated circuits and RF power transistors, require contact arrangements high level of reliability. In the search for more reliable contact arrangements, it was found that coated films or thin layers of refractory or heat-resistant metals, especially tungsten and molybdenum, highly conductive contact layers surrender to that with. Silicon dioxide does not react, melt at temperatures between 3000 and 4000 C. and very high eutectic temperatures to have. However, these heat-resistant contact layers have two disadvantages: Firstly, tungsten and Molybdenum, applied by known methods, does not work well on silicon or silicon dioxide. Second, the widely common aluminum and gold wires do not work well with tungsten when using the ultrasonic or thermocompression method or connect molybdenum.

Further research has been undertaken with the aim of avoiding these disadvantages. A contact arrangement that is a good one Adhesion to a silicon body consists of an in

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a layer of platinum-carbon alloy attached to an opening in the silicon dioxide, which makes an ohmic contact to the silicon. On the platinum-carbon alloy contact as well as on A layer of tungsten is applied to part of the silicon dioxide coating. Although this arrangement results in an ohmic contact with the surface of the silicon body, they still exist the problems of adhering the refractory layer to the silica and connecting leads to the refractory Layer.

Another contact arrangement enables gold wires to be connected to a heat-resistant contact layer. The order consists of a molybdenum layer that bridges the silicon dioxide coating and the silicon body through an opening in the silicon dioxide ohmically contacted. A forged metal layer of either aluminum or gold is vapor-deposited on the molybdenum layer, so that gold wire can be connected to the molybdenum-wrought metal assembly.

This composite layer arrangement solves the problem of bonding of lead wire with a heat-resistant contact; however, the adhesiveness of the refractory metal to insulating layers fails made of silica still leaves much to be desired. For example, it was found that in components that several Need gold or aluminum wire connections or fittings, the heat-resistant metal layer tends to use ultrasonic or thermocompression methods when fastening the wires to "peel off" the insulating coverings. The HF overlay transistor is of particular interest in this context. At the current one Manufacturing process for the so-called "overlay" transistor 10 to 12 gold wire fasteners are required per unit. If a heat-resistant metal layer made of, for example, tungsten is used as the contact arrangement, this tungsten layer tends tends to stand out from the silica insulation coating, which often causes the device to fail or become unusable will.

The contact arrangement according to the invention is for a semiconductor

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Component with a crystalline semiconductor body thought, on one main surface of which an insulating coating with a part the opening exposing the body surface is attached. The contact arrangement consists of a heat-resistant metal layer, which is attached to the insulating covering and makes ohmic contact with the surface of the semiconductor body through its opening, as well as made of a highly conductive, non-heat-resistant layer that overlaid part of the heat-resistant metal layer and part of the insulating covering.

In the drawing show:

1 shows in perspective view a semiconductor components μ element with inventive contact assembly, wherein a portion of the component and the contact arrangement being cut away; and

FIG. 2 shows an "overlays transistor" in a perspective view with the contact arrangement according to the invention, part of the transistor being cut away.

example 1

The contact arrangement is inherent in many types of semiconductor components applicable. Of particular interest, however, are those components which, because of their small dimensions, have connecting lines in the form of films or thin layers that are attached to an insulating layer of the component and the semiconductor regions contact through openings in this covering.

FIG. 1 illustrates a junction transistor 10 of the planar type with a contact arrangement according to the invention. The transistor 10 consists of a semiconductor body 12, preferably made of silicon, with a main surface 14 · In the semiconductor body 12 are a η-conductive collector region 16, an η-conductive emitter region 18 and a p-conducting base region 20 between the collector and emitter area trained. Parts of the three areas 16, 18 and 20 extend to the surface 14

The size of the body 12 as well as the conductivity and

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Diffusion profiles of the three regions 16, 18 and 20 are not critical. For example, body 12 is comprised of a silicon wafer with area dimensions of 0.35 mm (14.0 mils) in Square and 0.08 mm (3.0 mil) thick with the base area 20 0.025 mm (1.0 mil) deep from the surface 14 Body 12 and emitter region 18 extend 0.015 mm (0.60 mil) deep into the base region. The remainder of the body 12 includes the collector area 16.

On the main surface 14 there is an insulating covering 22, preferably made of silicon dioxide, although other iso-

Mjt lierverbindungen, for example silicon nitride are suitable.

^ For some applications, the insulating covering 22 can be evenly ' Have thickness over the entire surface 14 of the body 12. Because of those commonly used in the manufacture of planar transistors In terms of procedures, however, the coating 22 of the transistor 10 in FIG. 1 consists of a thick layer overlying the collector region 16 Region 24 and one of the emitter and base regions 18 and 20, respectively overlying thin area 26. For example, thick area 24 is approximately 20,000 8 and thin area 2 6 is approximately 10,000 thick.

The thin area 26 of the coating 22 has an emitter opening 28, which mature a part of the emitter region 18 on the surface 14 f and a base opening 30 which exposes part of the base region 20 at the surface.

An emitter contact layer is on part of the insulating covering 22 32 made of heat-resistant metal so attached that it makes ohmic contact with the emitter region 18 through the emitter opening 28 and extends over the thin area 26 and part of the thick area 24 of the pavement. The same way is the base area 20 through the base opening 30 by means of a base contact layer 34 made of heat-resistant metal ohmically contacted, the likewise extends over parts of the thick area 24 and the thin area 26 of the covering 22. Suitable refractory metals are molybdenum and tungsten, but tungsten is preferable

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is. The dimensions of the contact layers 32 and 34 are not critical. For example, the layers have a thickness between 10,000 and 25,000 Å.

On a part of the emitter contact layer 32 and a part of the thick area 24 of the insulating covering 22 is a highly conductive one Layer 36 of non-heat-resistant metal attached. Likewise, on part of the base contact layer 34 and one Part of the thick area 24 of the covering 22, a second layer 38 of highly conductive, non-heat-resistant metal is applied. Suitable Highly conductive, nonheat-resistant metals are aluminum and / or gold and / or silver and / or platinum, but aluminum is preferable. While the dimensions of the aluminum layers 36 and 38 are not critical, those portions of FIGS Layers 36 and 38, which form the thick area 24 of the insulating covering 22 overlay, a dimension of about 0.025 now (1.0 mil) square, to allow for relatively large area terminal or mounting pads 40 and 42 received. The aluminum layers 36 and 38 are expediently between 15,000 and 25,000 Å thick. Connection or lead wires are attached to the connection plates 40 and 42 44 and 46, respectively, which have an electrical conduction path between the emitter and base regions 18 and 20 on the one hand and make external circuit connections (not shown) on the other hand. These are suitable as lead wires Aluminum or gold approximately 0.025 "am in diameter (1.0 mil).

To complete the transistor 10, there is a metallic collector contact on the underside 15 of the semiconductor body 12 48 attached.

The transistor and the contact arrangement can be manufactured in the following manner. An n-conducting material is used as the starting material Silicon wafers with the dimensions given above. Any known method is applied to the surface of the disc an approximately 10,000 8 thick layer of silicon dioxide was applied. The surface of the covering is illuminated »with a suitable light

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sensitive caustic treated and masked, and the caustic is exposed so that an area of the covering corresponding to the desired surface area of the base area is unprotected remain. By treating the disc with an etchant, the unprotected parts of the etchant and the Silicon dioxide removed. The wafer is then placed in a diffusion furnace and treated with boron nitride to make the p-type Diffuse base area into the η-conductive disk. During the boron diffusion, a thin layer appears on the surface of the disc and the remaining parts of the initial oxide coating Layer of silicon dioxide about 5000 S thick applied.

A second light-sensitive anti-etching agent layer is placed on top of the oxide coating applied, and the surface is masked according to the tick area of the desired emitter location. Then the anti-etching agent is exposed and the disc etched so that the unprotected etchant and oxide are removed. The disc is then put back into a diffusion oven given and treated with a phosphoric solution to the diffuse η-conducting emitter region into the p-conducting base. During the emitter diffusion, it is applied to the exposed parts of the silicon wafer and the remaining parts of the oxide coating a thin layer of silicon dioxide with a thickness of approximately 5000X applied. The pavement is treated with a third light-sensitive etchant layer, masked, and after exposure of the etchant, the wafer is etched to make the emitter opening 28 and the base opening 30.

A layer of tungsten is then applied to the entire surface of the oxide coating 22, through the openings 28 and 30 through the emitter and the base area is ohmically contacted. As such, the tungsten layer can be produced using customary, known HF sputtering processes raise. However, it is preferable to proceed in such a way that the silicon in the contact openings and the oxide coating 22 are removed with tungsten hexafluoride in an argon gas atmosphere, and then the tungsten layer by reducing tungsten hexafluoride in one Applying a hydrogen atmosphere. The procedural steps of the

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application of light-sensitive protective agents, masking, exposure and etching are then repeated to remove the tungsten from the unwanted areas and the emitter and the Work out base contact layer 32 and 34, respectively.

The wafer is then placed in a vaporization chamber, and a layer of aluminum is placed on top of the tungsten contacts and both The surfaces of the disc are vapor-deposited. The unwanted parts are removed by a final etching protection agent and etching treatment of the aluminum covering removed and the aluminum layers 36 and 38 including the terminal plates 40 and 42 worked out. The lead wires 44 and 46 can be made by either ultrasonic or thermocompression treatment can be attached to the terminal plates.

Example 2

Figure 2 illustrates an embodiment of a multi-emitter overlay transistor 50 with contact arrangement according to the invention. Overlay transistors are known (e.g. from the work D.Carley, P. McGeough and J. O'Brien in Electronics, Aug 23, 1965, pp 71-77).

The transistor 50 consists of a semiconductor body 52 with a main surface 54 · located within the semiconductor body 52 an nH-conductive substrate 56 and an η-conductive collector region 58 adjacent to the substrate. Part of the collector area 58 reaches to the surface 54

The transistor 50 includes a base region consisting of several p-type base individual areas, for example the base areas 60-63, as well as a deeper p + -type zone 66, all of which surrounding p-type base regions. An η-conducting emitter region is located within each p-conducting base region. Four of these emitter regions 68-71, each of which is arranged in one of the base regions 60-63, are shown in FIG.

An insulating covering 76 is attached to the surface 54. As

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the insulating coating 22 of the transistor 10 in FIG. 1, the coating 76 of the transistor 50 also consists of a thin region 78 the base and emitter regions and a thick region 80 on the collector region 58. The thin region 78 has a number of emitter openings, each of which exposes a portion of each emitter region on surface 54. Four of these openings (not provided with reference numerals), through which the emitter regions 68-71 are exposed, are shown in FIG. The Thin Region 78 also has a number of long, narrow base openings through which portions of the p + -type region 66 of the base region are exposed will. Two of these base openings are shown in FIG Reference numerals 72 and 75 are provided.

On part of the thin area 78 of the covering 76 are a number of emitter contact layers 82-88 of refractory metal attached, each of which through the emitter openings one Series of emitter areas ohmically contacted. In FIG. 2, the emitter contact layer 82 makes contact with the emitter region 71 and the Emitter contact layer 83 the emitter regions 68-70. The emitter contact layers 82-88 also extend to the edge of the thick area 80 and are formed by an emitter contact strip 92 made of refractory metal and arranged along part of the thick region connected in parallel. Likewise, base contact layers 94-101 made of heat-resistant metal are applied to a part of the thin region 78, the parts of the p + base region 66 through the base openings, e.g. 72 and 75 »contact ohmically. Through one along a part of the thick area 80 arranged base contact strips 10 6 The base contact layers 94-101 are connected in parallel with heat-resistant metal.

Three layers 108-110 of highly conductive, non-heat resistant Metal are on part of the emitter contact strip 92 and part of the thick area 80 of the insulating coating 76 arranged at the same distance from each other. Also on part of the base contact strip 106 and the thick area 80 are four Layers 112-115 made of highly conductive, non-heat-resistant metal appropriate.

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To complete the transistor 50 is on the bottom surface 55 of the semiconductor body 52 is a metallic collector contact 116 attached. Lead wires (not shown) can be attached to the portion of the surface located on the thick area 80 of the pavement 76 highly conductive, non-heat-resistant layers must be attached.

The refractory metal layers of transistor 50 are made preferably made of tungsten, and the highly conductive, non-heat-resistant layers are preferably made of aluminum. The contact arrangement is produced in the same or similar manner as that of the planar transistor 10 according to FIG. 1.

An overlay transistor with a contact arrangement according to the invention has a high level of reliability. The tungsten layer adheres well to the silicon. The aluminum layer adheres well to the Tungsten and enables lead wires made of gold or aluminum to be attached to the contact arrangement. Furthermore, the Aluminum layer provides additional mechanical support for the tungsten layer, and the likelihood that the tungsten from Flaking silicon dioxide coating is greatly reduced because the thermal mix and mechanical stresses when attaching the lead wires occur over the thick oxide area instead of over the tungsten layer.

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Claims (8)

- 10 claims jf \ .J Contact arrangement for semiconductor components with a
crystalline semiconductor body, on one main surface of which a
Insulating covering is attached with an opening exposing part of this main area, characterized in that a heat-resistant metal layer (32, 34) which makes ohmic contact with the main area (14) through the opening (22, 30) is attached to the insulating covering (22) and that on A highly conductive, non-heat-resistant metal layer (36, 38) is attached to part of this heat-resistant metal layer and to part of the insulating covering. 2. Contact arrangement according to claim 1, characterized in that the insulating covering (22) in the area
is relatively thin under the heat-resistant metal layer (32, 34) and relatively thick in the area under the highly conductive, non-heat-resistant metal layer (36, 38). 3. Contact arrangement according to claim 1 or 2, characterized
characterized in that the refractory metal
Tungsten is. 4 «contact arrangement according to one of claims 1 to 3, characterized in that the highly conductive, non-heat-resistant metal is aluminum. 5. Contact arrangement according to one of the preceding claims, characterized in that on the part of the highly conductive, non-heat-resistant metal layer (36, 38) located on the insulating coating (22), a lead wire (44,
46) is attached. 6, contact arrangement according to claim 3 to 5, characterized
characterized in that the tungsten layer (32, 34) adhering to the insulating coating (22) extends over part of the insulating 109814/1568 2ÜA6505 - left - covering extends that the aluminum layer (36, 38) on a Part of the tungsten layer and part of the insulating coating rests and that the lead wire is made of gold. 7 ♦ Contact arrangement for a transistor formed in a semiconductor body with a collector area arranged in the semiconductor body, a base line zone arranged in part of the collector area, several separate base areas arranged in the base line zone and extending to the collector area, and one emitter area in each base area, characterized in that on one main surface (54) of the semiconductor body (52) an insulating coating (76) with a number of parts of the base line zone (66) on the main surface exposing base openings (72, 75) and a number of each one emitter region (68-71 ) is attached to the main surface exposing emitter openings; that a first heat-resistant metal layer (82-88) which makes ohmic contact with the emitter regions through the emitter openings is applied to part of the insulating covering; that a second heat-resistant metal layer (94-101) which makes ohmic contact with the base line zone through the base openings is applied to part of the insulating covering; that a first highly conductive, non-heat-resistant metal layer (IO8-IIO) is applied to part of the first heat-resistant metal layer and part of the insulating covering; and that a second highly conductive, non-heat-resistant metal layer (112-115) is applied to part of the second heat-resistant layer and part of the insulating covering (FIG. 2), 8. Contact arrangement according to claim 7> characterized in that the insulating coating in the area on Collector region (58) relatively thick and relatively thin in the area of the base and emitter regions (60-63, 66; 68-71) is trained. 1Q981W 1568 Λ. Blank page