DE2030505B2 - Diffused resistance in a planar epitaxial semiconductor device - Google Patents

Description

The invention relates to a diffused resistor in a planar epitaxial semiconductor device with a resistance region that is delimited in a Area of the epitaxial layer lies and is completely enclosed by this.

In the manufacture of semiconductor devices, such as. B. integrated circuits, the scarf -fo processing elements such as transistors, diodes, resistors, etc. in a monolithic crystal Semiconductor material is formed and connected to one another in such a way that the desired circuit is created. It is generally necessary to isolate the resistances occurring in the circuits so that there are no undesirable interactions with other elements of the circuit. Suitable Processes for this are described, for example, in U.S. Patents 3,265,905, 3,380,153, 3 387 193 and 3 432 792. The endeavor to overcome the resistances To isolate, however, the existing technologies always set limits that result in compromises regarding the performance of the circuit. This was often due to parasitic capacitances responsible, which had to be accepted. The formation of resistances in the semiconductor material generally brought diffusion shifts with later manufacturing steps which increased the parasitic capacitances. With regard to these capacities The design of integrated circuits was particularly hindered when the circuits were at high levels Speeds should work.

Known diffused resistors consist of a doping region of a first z. B. P conductivity type, which is completely enclosed in the semiconductor body directly by a doping area of the opposite N conductivity type, compare z. B. Scientia Electrica, K, (1964), Fase. 4, p. 96 to 122, in particular Fig. 2 ") on p. 119, as well as International Electronic Rundschau. Heft 5 (1964), p. 277 to 280, in particular Fig. 17 on p. 279. As a result of the area of resistance directly surrounding the PN junction, these diffused resistances are associated with a considerable, disruptive stray capacitance, which is particularly pointed out in the last-mentioned reference.

Furthermore, so-called »buried« layers are known as sub-collectors of transistor structures, which cause a reduction in the collector path resistance and thus the associated time constant, compare z. B. the above-mentioned Scientia Electrica reference, p. 117, Fig. 26, and the USA patents 3,380,153, Figs. 1 to 4, and 3,327,182, Fig. 2 through 5. Despite one heading towards on the semiconductor surface resulting layer sequence of areas of the same conductivity type, however different degrees of doping, e.g. B. N-epitaxy / N + sub-collector, have such sub-collectors opposite the substrate a PN junction with the associated stray or barrier layer capacitance on.

It is also known from French patent specification 1 473 788 to avoid stray capacitance the resistance element of this and the other components from each other and against over 1 to isolate the substrate by means of a continuous quartz layer instead of PN junctions. Thereby mui however, a considerably more complicated manufacturing process, that of etching, must be accepted Requires oxidation to quartz and changing the machining surfaces of the semiconductor wafer.

It is the object of this invention to find the known diffused resistors in a planar epitaxial semiconductor device in terms of a smaller stray capacitance without becoming a more complicated one To have to resort to manufacturing technology. The semiconductor arrangement should also be compatible with the conventional manufacturing techniques of monolithic circuits that in addition to such resistors numerous other components, such as transistors, diodes, etc. may contain.

Starting from a diffused resistance in a planar epitaxial semiconductor arrangement mil a resistance area which lies in a delimited area of the epitaxial layer and is completely separated from it is enclosed, the invention is characterized in that the resistance area of the same The conductivity type is the same as the surrounding epitaxial layer, but in contrast a higher doping having. The actual resistance area is made up of the relatively highly doped diffusion area educated; the surrounding, less doped semiconductor region bears as a parallel-connected relatively high resistance practically only insignificant to the resulting resistance value, but prevented by avoiding an area directly adjacent to the actual resistance area PN junction a harmful stray capacitance. Further advantageous embodiments of the invention are shown in characterized the subclaims.

In the following, exemplary embodiments of the

Finding the resistance in detail using the drawings, conventional oxidation masking

placed. "as a particularly s'rark N-doped area 6

The in F i g. 1 shown diffused resistance of the diffusion of suitable impurities, such as phosphorus and the present invention in a semiconductor comprises arsenic, formed in a surface concentration in a substrate 1 with a region 2 of a first 5 det. which is higher than that of the surrounding parts of the conductivity, over which an epitaxial layer 3 area 5. In practice, the concentration is applied with the opposite conductivity. Surface doping by at least one size - through the epitaxial layer 3, areas 4 of the order above the value of the area 5, the lowest first conductivity diffuses, but that with the value is preferably three orders of magnitude lower area 2 of the same conductivity higher. Correspondingly, the specific Wi is connected in a pattern which essentially forms insulating walls of the resistance area 6, which border a part of the epitaxial layer 3 lower than that of the area 5, namely in practice and form an area 5 in which the area 5 at least one order of magnitude, preferably the desired resistance, is to be formed. The \ Vide ^r - but by two orders of magnitude. To z. B. a stand consists of a heavily doped area 6 to obtain the 15 resistance area, the specificity of which is formed in area 5 by diffusion η. It has a resistance of at least one order of magnitude, a doping with free atoms of the same conductivity below the value of the epitaxially grown frostiness and a surface concentration. the ches 5 is (doped with phosphorus to a speciwearly greater than that of the area 5 of the epic resistance value on the surface of 0.1 taxial layer 3, which in turn has a resistance of 20 to 0.3 ohm · cm) the concentration of the supernatant area 6 with a significantly lower surface contamination de. Resistance range 6 in derstandswert when it delivers the surrounding area S of the order of 13 ^{- 0} atoms / cm ^:! lie, has. The surface concentration of the foreign atoms around a resistance range 6 with a specific resistance range 6 is preferably to obtain a resistance that is at least two at least one order of magnitude above that of the range 5 orders of magnitude below the value of the area 5, where the resistance value of the resistance is, The resistance range 6 can have a concentration range 6 at least an order of magnitude of foreign phosphorus atoms of 10 ²¹ atoms below that of the range 5. cm ^{: 1} , if the specific

Fig. 1 shows a substrate 1 made of semiconductor material resistance values at 0.1 to 0.3 ohm · cm, such as silicon, with a region 2 of a certain 30. The unit shown in FIG Execution normally with a passivation mask 10, for example P-conductive. The substrate 1 has a planar surface, preferably made of silicon oxide and equipped with an ohmic con surface 9, on which an N-conductive clock 11 and 12 epitaxially.
Layer 3 grew up. As shown in FIG. 1 can be seen, the

The substrate has a monocrystalline structure 35 standing area 6 in the semiconductor substrate 1 of the

on, which in the exemplary embodiment by known crime other parts (e.g. the areas 8) by the di-

stall waxing techniques can be formed. The desolate isolated that between the area 5 and the

Substrates can e.g. B. be a silicon crystal, the substrate 1 and the areas 2 and 4 and the

is appropriately doped during growth, or other parts 8 of the epitaxial layer 3 are formed

a part of the substrate will become 40 after growing.

doped with suitable foreign atoms such as boron to reduce the resistance. The size of the resistance can be determined from the analysis

Area 2 can be determined with a foreign atom distribution to be defined of the resistance area 6, whose

ren that corresponds to the desired use. Resistance value two orders of magnitude below that

According to known techniques, an epitaxial value of the range 5 will be. Area 6 has one

Layer 3 of opposite conductivity (e.g. N-line 45 sheet resistance of 2 to 20 ohms / square unit,

tend) on the planar surface 9 of the substrate 1, the area 5, however, 2000 ohms / square unit,

applied so that it covers the P area 2. As shown in FIG. 1 represents the resistance

In a subsequent manufacturing step, a region 6 is a resistor R 6 , which becomes a

Isolation area 4. "With P-conductive foreign atoms in the much higher formed by area 5

N-type epitaxial layer 3 is parallel in a pattern diffuse 50 resistance R 5.

dier ", which defines the island-like resistance area 5 The total resistance R of the areas 5 and 6 connected in parallel, in which the resistance 6 is formed, can easily be calculated low-cases diffused through the epitaxial layer 3 with known ohmic resistance R 6 within 1% of the ge-masking technique For the desired reverse technology, however, it is essential that the value of the resistance area 6 is more than two resistance areas 5, due to epitaxial growth, orders of magnitude below the value of area 5 as a monocrystalline extension of area 2. For this purpose, resistance area 6 is, for example, with Normally the whole layer 3 is 60 with a concentration of 10 ²¹ foreign atoms / cm ³ and formed by epitaxial growth. The region 5 can then ^dop the epitaxial layer 3 and, in particular, the opposing foreign atoms / cm ³ with a concentration of 10.

Stand area 5 with corresponding foreign atoms, the connection and interference capacity of the finished such as phosphorus and arsenic, are doped to specific- unit is reduced by the formation of the resistance fish resistance values in the range from 0.1 to 65 area 6 in area 5 compared to 0.5 ohm · cm and a thickness of 3 to 8 μίτι to conventional resistance structures in which the are sufficient. resistors completely diffused in the area

In a subsequent step, it is established that the insulation area 4 and the loading

empire 2 was limited. The capacitance is diffused by one, making N ⁺ areas 18 and 19 mi

Reduced factor equal to the ratio of the doping to a concentration of surface impurities

ten foreign atoms are formed in the resistance range 6 and in the 10'- 'atoms / cm ^{; 1} , which fell

Area 5 is to each other. For a resistance structure up to the corresponding one below it is graced

door the capacity is determined z. B. extend through the side 5 planes N + areas 15/1 and 16/1. Dei

wall and the bottom capacity of the insulation and N + area 18 in connection with the one below

Substrate areas in an epitaxial area with a decreasing N ⁺ area 15/1 represents an area for di (

high resistance value. The sidewall capacitance forms the collector of a transistor, which al:

is in the present embodiment at 240 pF / feil an integrated circuit is to be formed. De:

mm- and the soil capacity at llOpF / mm ² . Herio N + region 19 forms in the epitaxial layer 1 "

Conventional resistances with normal, opposite- in connection with the underlying N ⁺ -Be

Set doping are formed, a channel 16/1 have an island region 20 in which a Wi

capacitance of about 415 pF / mm ² . the state is to be trained.

In Figs. 2A to 2E, successive The N + regions 18 and 19 can be simultaneously i

Steps in the production of another embodiment or separately in different processing steps

example to ensure compatibility with any desired surface concentrator

can be produced with the existing semiconductor technology at one of the impurities. For di <

An example of the simultaneous production of the most practical applications will be the two

Standes with a transistor in an integrated area at the same time by diffusion of doping

Circuit to show. F i g. 2A shows a P-type impurity such as phosphorus and arsenic produced

Substrate 13 made of semiconductor material, such as silicon, with surface concentrations of for example

a resistivity of 20 ohm · cm, in 10 ' ^B atoms / cm ³ .

which two separate, heavily endowed regardless of the method for training de

Areas 15 and 16 by conventional diffusion, however, the remaining parts 21 of the layer 17 are, as be

Ren are trained at the same time. The substrate 13 35 already said, essentially that the island region 20 epi

usually consists of a silicon single crystal, which is applied tactically.

that with foreign atoms, for example boron, corresponds in a subsequent process step

is endowed accordingly. The one with N ⁺ foreign atoms, as shown in FIG. 2D, is a heavily P + dopant

Phosphorus, to a surface concentration of the region 22 in the N + region 18 by selective Dif

10 ²⁰ foreign atoms cm ³ doped area 15 is composed of a fusion of acceptor impurities such as boron

See the coordinate area in the finished unit, see figure. As a base area, the P + area 18 is a!

and an N + region 16 represents part of the isolation transistor provided, with the remaining region *

^{represents the N 1} region 18 required for the formation of a resistance, together with that below

is borrowed. lying N + layer 15/1 a collector areaicl

In a subsequent manufacturing step, in 35 23 a transistor in the finished integrated circuit

As shown in FIG. 2B, a P-type epicircle is allowed to be defined.

taxialschicht 17 with a specific resistance Subsequent to or simultaneously with the training

Stand of 0.2 Ohm - cm on the substrate surface 14 formation of the P + base area 22 is in the P area 2 (

(Fig. 2A) and covers the two legs from a heavily P + -doped area as a resistor

add 15 and 16 to a thickness of 3 to 7 µm so 40 is formed. This P + resistance range 24 is obtained

that the two N + regions 15 and 16 in P-Ieiten- one by optional diffusion of acceptor Ver

are embedded in silicon. During the epitaxial impurities, such as boron. Up to a surface

Precipitation of the layer 17 leads to the Ausdiffun- concentration that z. B lies at 10 ^ls atoms / cm ³

can dieren from the areas 15 and 16 for their training. With simultaneous diffusion of the areas 2 ^

expansion into the epitaxial layer and thus to distort 45 and 24 both have the same surface concentration

changed dimensions of these areas if further tion. As shown in Fig. 2D, de

Processing steps are required. The extended P + resistance area 24 through the P area 2:

th areas with 15/1 and 16/4 in FIG. 2B represent the remaining parts of the island area 20 in one

posed. All of the impurities in the specific distance from the insulating area 19 and the

speaking areas (resulting from the factory 50 restricted area 16.4 surrounded.

The cation steps of FIGS. 2A and 2B) remain the - As shown in FIG. 2E, the next;

the same. By expanding these areas, an N impurity is ^{reduced to the P +} base area!

Men, however, increase and change their volumes, namely transistor 31 to form a heavily N + -doped

reduce the concentration of the impurity. th area with a surface concentration

The resulting reduction in impurities of about 10 ²¹ atoms per cm ³ diffuses and so de

Inclination concentration results in an increase in the emitter 30 defined in the integrated circuit.

Resistance value. After the emitter diffusion, on the surface

Although it has been described above that the regions of the epitaxial layer 17 are formed by a suitable:

15 and 16 can be formed at the same time, methods such as. B. thermal oxidation, a passi

each of the areas are also deposited in separate diffusion silicon oxide films, ii

stepped before the deposition of the epitaxial which subsequently by conventional photo

Layer 17 are formed. In this way, lithographic techniques can be applied over the collector

The regions 15 and 16 with different base and emitter regions 23, 22 and 30 have openings

Concentrations of the doping foreign atoms formed as well as the desired contacts in the cons

be det. Be attached in a subsequent processing 65 stand area 24. Then it becomes:

step are as shown in FIG. 2 C a metallic film is deposited on the oxide film 32

N ⁴ foreign atoms, such as phosphorus and arsenic, by gene and then selectively by a photo

the epitaxial layer with the help of oxide masking mask to form the collector, base unc

34 * 3

Emitter connection 33, 34 and 35 as well as the ohmic one Contacts 36 and 37 for resistor area 24 are etched away.

An exemplary embodiment produced had a region of 25 by 5 μm with a specific thickness Resistance at the surface of 0.2 ohm · cm and a P * ■ region 24 enclosed by it

a transition depth of 2 μm and a concentration of 10 ^ia atoms / cm represented a resistance of 150 ohms / square. A PNP transistor was described above. However, NPN transistors and resistors with a set conductivity are also possible.

1 sheet of drawings

ί'-ν?

t ί 7

Claims (4)

Patent claims: 1. Diffused resistance in a piano-epitaxial semiconductor device with a resistance area that lies in a delimited area of the epitaxial layer and is completely separated from it is enclosed, characterized in that that the resistance region (6, 24) of the same conductivity type as the surrounding epitaxial layer (3, 17), but in contrast has a higher doping. 2. Diffused resistor according to claim 1, characterized in that the substrate (1) and the epitaxial layer (3) arranged above it are of the opposite conductivity type (FIG. 1). 3. Diffused resistor according to claim 1 or 2, characterized by a P-substrate (1), an N-epitaxial layer (3) which is divided by P-isolation zones (* ■) , and by an N ⁺ diffusion zone (6) for the resistance within the N-epitaxial layer (Fig. 1). 4. Diffused resistor according to claim 1, characterized by a P-substrate (13) with N ⁺ -subcollector regions (15/1, 16 A), ^ s a P-epitaxial layer (17 \ the N reaching down to the subcollector regions in the substrate ⁺ Isolation zones (19), and by a P ⁺ diffusion region (24) for the resistance within the P-epitaxial layer (FIG. 2D;