DE2013493A1 - Circuit arrangement for correcting the duty cycle of a pulse train - Google Patents

Description

■ - ■ ■ 2Θ134§3

Patent attorneys Dipl.-Ing. R Weickmann, "

. H.WeICKMANN, DIPL ^ PHYS-Dr-K-FINCKE

, Dipl.-Ing. EA-Weickmann ^ Dipl.-Chem. B. Huber

8 MUNICH 86, DEN

PO Box 860 820

MÖHLSTRASSE 22, CALL NUMBER 48 3 * 21/22:

3JEKO) RQKIX, IKC. Λ ·

1415Q S. W, Karl Braun Driye

Circuit arrangement for correction. of the duty cycle _: ,.

a pulse train

There are many examples of a signal at the input of a complex electronic circuit which is disturbed due to inadequate load adjustment or for other reasons Zero axis or a mean value is asymmetrical. For some applications it is desirable, if not necessary, that a given waveform remain symmetrical or maintain a duty cycle of 50 ^. This requirement exists, for example, for some switching purposes. One example that 50 ° / o duty cycle are desired, there is the operation of a balanced modulator or a synchronous detector. An asymmetrical signal used as a carrier acts on a circuit in such a way that the sideband information is only inaccurately recovered.

10980 8/1791

A known circuit for correcting the pulse duty ^{v 'r} Nisses an input pulse waveform includes a LC circuit which is tuned to the input Impulswellenforra. This IC circuit has a remarkably high quality Q. Such a circuit provides the necessary correction of the disturbed pulse waveform in that ile generates a sine wave with the specific pulse frequency, which has a pulse duty factor of 50 i » . However, this type of circuit is only effective at its resonance frequency and must be tuned to the signal frequency each time. Furthermore, if the Q of the circuit is chosen so that a considerable correction occurs, a phase shift occurs which can vary as the circuit is tuned or when the frequency changes. If such a circuit is only used at a single frequency, then both the capacitance and inductance elements as well as the other required circuit elements must be kept within very small tolerances. That makes the circuit expensive.

According to the present invention, correction of the ratio of an input pulse waveform is achieved without the use of a resonance circuit and without requiring tight tolerances on the values of the individual components. The circuit according to the invention contains integration means, preferably a capacitor, by means of which the pulses of the pulse train are given a substantially triangular shape. The triangular pulses rise in a predetermined direction during their relatively positive phases and fall during the relatively negative phases. The triangular waveform is characterized by a mean value that divides the wave train consisting of triangles into equal time intervals.

ORlQIHAL INSPECTED

109808/1791

tv '' iff '

valle -shares «! P © ^r Aub delta pulses existing wave wi ^ d fed to a, Ausgangsschaltuug which the. Ausgangsßignal. changes when the square pulses .cross the mean value. ^ the crossing points of the mean value have the same distance from one another, an output pulse is generated, train * which has a duty cycle of 50 # ·, ^ ■ -.-., - -. ■ ·.

Both the input part, which controls the integration means, and the output part of the circuit, which is used to receive the triangular pulse wave train, desirably contain limiting means for generating square-wave pulses at the output of the circuit. The limiting means in the input part feed the integration means, which - as already mentioned - are preferably formed by a capacitor, with a current which linearly charges and discharges the capacitor. According to a preferred embodiment of the invention, the limiting means contain transistor amplifiers operated in a differential circuit, which switch the current on and off from the aforementioned capacitor in synchronism with respect to the changes in the input pulse train. The limiting means of the output circuit generate a square wave with a duty cycle of essentially 50 #. This square wave is suitable for ■ '' \ 'to control a push-pull modulator or a similar circuit «

The present invention is based on the object a circuit for correcting the duty cycle of a Indicate impulse wave train, which is relatively insensitive against changes in the input frequency irfc.

The circuit according to the invention is intended to be able to use it be structured and no strict requirements for the

INSPECTED

109808/1701.

Set tolerance values for the individual components.

Furthermore, the circuit according to the invention should be designed in connection with a limiting circuit in such a way that that they are used to control a single-cycle modulator or a corresponding circuit is suitable.

Furthermore, the circuit according to the invention should have a constant and predetermined phase shift.

An exemplary embodiment of the invention is described below with reference to the drawing.

Show it:

Fig. 1 is a block diagram of the circuit according to the invention for correcting the duty cycle of a Pulse wave train a;

2 shows a schematic circuit arrangement according to the block diagram according to Fig. 1;

FIG. 3 shows a representation of pulse wave trains as they occur in the position arrangement according to the invention.

The circuit arrangement shown in Fig. 1 for correcting the duty cycle of a pulse train has a Limiter 10 for recording a disturbed, in general unbalanced input pulse waveform on · The Limiter drives an integrator 12 with an essentially rectangular current, which is asymmetrical in Tent coincidence with the input pulse waveform 1st The integrator 12 thereby responds to the Reohteoklapulse suggests that it produces essentially three-wave pulses As long as, for example, the square-wave pulses at the output of the limiter 10 with respect to the zero axis of the square-wave pulses

1098 08/1791

are positive, the integrator 12 © generates a relatively linear, gradually increasing output signal * In the relatively negative Phase of the Hechteckirapulse, the output signal of the integrator 12 gradually falls from the value which was previously reached «. The resulting waveform is characterized by a mean value, which the pulse train in substantially equal time intervals Splits"

The triangle pulses are fed to an output limiter 16 via an alternating current coupling circuit 14. The alternating current coupling circuit transmits to the limiter 16 only the alternating current component of the pulse train, while the direct current component is blocked * The limiter 16 is designed so that it is a positive or negative one Output signal generates _f depending on whether at its input there is a positive or negative signal in relation to the Uullaohse. The result of using an alternating current coupling 14 is that the mean value of the

nc λ
Dreieckimpulezuges is dependent on the zero axis of the limiter 16, and that the limiter 16 consequently switches to equal length time intervals · Also as a result of integration occurring PkassnverSchiebung is substantially constant and is about 90 ° · Moreover, * the circuit arrangement tm substantially insensitive to frequency variations _{of the input signal β} fed to the limiter 10. If the circuit is operated predominantly at one frequency, the requirements placed on the circuit parameters are not critical. The circuit can therefore be relatively economical, ie. h, constructed with a relatively large tolerance range for the individual shifting components _e There is no effective influence on the duty cycle correction

1098C8 / 1791

In Fig. 2 is air.6 Ausfühnsngsforni the invention Switching arrangement shown, which corresponds essentially to the block diagram of FIG. The switching arrangement is designed as a synchronized switch; it understands However, it is true that a single ended circuit is also used can be. The push-pull circuit is in terms of Temperature coefficients of the individual components advantageous, since the parameter changes are 139: 1 of this circuit essentially compensate. Also the transmission of the NullweriöB with the: Change of the signal polarity 1st in the case of a general bees he · Furthermore, that is Switching behavior more favorable in relation to the output stage

In the circuit shown in FIG. 2, the limiter designated by the reference number 10 advantageously consists of two üransistors 18 and 20 which are connected in a differential circuit. The base of the transistor 18 is connected to the Eiagangeanclilass 22 22 and ground becomes an input signal voltage β. Galegt · The base of the transistor 20 is connected to ground · The emitters of the transistors 18 and 20 are connected to one another and connected to a negative voltage via a resistor 24 with a relatively high resistance value. A relatively constant current is fed to one or the other of the transistors via this resistor, depending on whether the input voltage e .. is positive or negative with respect to ground. When the input voltage e ^ is positive in relation to ground, the current flows through the resistor 24 essentially through the collector-emitter path of the translator 18. When on the other hand the input voltage e. is negative with respect to ground, then the relatively constant current from the resistor 24 flows essentially completely through the collector-emltter-Streoke of the transistor 20 · the transistors 18 and 20

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therefore form a current switch pair or a limit switch that switches through Hull, being a relative constant current is switched when the input voltage crosses the zero axis.

The collector of transistor 18 is "connected to junction 26 between resistor 28 and capacitor 30. Resistor 28 and capacitor 30 are connected in series between a positive voltage and ground. The resistance of resistor 28 is relatively large and substantial equal to the value of the resistor 24, so that it forms a current source for a relatively constant current. The collector of the transistor 20 is at the junction between a resistor 34 and a capacitor 36. The resistor 34 and the capacitor 36 are between a positive voltage and ground in series. Resistor 34 in turn has a comparatively large resistance value. The time constant of the circuit formed by resistor 28 and capacitor 30, or the time constant of the circuit formed by resistor 34 and capacitor 36, can be in the order of magnitude of the period time of the input pulse waveform but they are preferably larger. DieJfeitkonstante of the resistor 28 and the condensate i sator 30 or the time constant of the resistor 34 and the capacitor 36 was at a practical example of the order of 2 to 10 times the period time of the input pulse waveform. The circuit formed by resistor 24 and one of the capacitors has a similar time constant.

The capacitors 30 and 36 form together with the Resistors 28 and 34 a push-pull integrator, which is shown as a block and with the reference number 12

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designated integrator in Pig. 1 corresponds. Ea understands turn that also a one-act circuit can be used with only one resistor and one capacitor. Such a single ended circuit can, for example be formed solely from the resistor 28 and the capacitor 30. In this case the collector would of the transistor 20 can only be applied to a positive voltage. The operated in differential circuits However, transistors 18 and 20 are ideally suited as limiting circuits.

Capacitors 38 and 44 in Fig. 2, together with resistors 42 and 48, form an AC coupling circuit, which corresponds to the block shown in FIG. 1 and denoted by the reference number 14. The condenser 38 couples point 26 in FIG. 2 to the base of transistor 40. The transistor 40 forms together with the transistor 46 part of the output limiter circuit. The connection point between the capacitor 38 and the base of transistor 40 is through a resistor 42 connected to ground. The resistor 42 in turn has a relatively high resistance value. The connection point is similar connected between the base of the transistor 46 and the capacitor 44 via a resistor 48 to ground. Resistor 48 also has a relatively large resistance value. The RC time constants of the resistor-capacitor combinations 38 - 42 and 44 - 48 are expediently chosen to be relatively large compared to the Period time of the input signal

The transistors 40 and 46 are in differential connection switched and form an output limiter circuit or a limiter circuit that passes through the zero lug switches · This circuit is designated in Fig. 1 with the reference number 16 * The resistor 50 in Fig. 2 connects

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det turn the common emitter connections of the transistors 40 and 46 with a negative supply voltage. The resistance of resistor 50 is relatively high. The output of the limiter is an output terminal 62 via a Gegentafct- '- supplied transformer 52nd The transformer 52 has tightly coupled windings and is designed to operate satisfactorily in the frequency range of interest. To do this, it must transmit essentially rectangular waves, whereby it is assumed that there is a resistive load between terminal 62 and ground. The collector of the transistor 40 is connected to one end of the transformer winding 54 ^; bound. The other end of this transformer winding is connected to a terminal 56 for a positive voltage. The collector of the transistor 46 is also coupled via the transformer winding 58 to the terminal 56 for the positive voltage. The output winding 60 is connected between the output terminal 62 and ground. ":

The output limiter circuit works in a similar way Manner like that formed from transistors 18 and 20 Circuit with the exception that transistors 40 and 46 in the output limiter circuit the input signal on their base electrodes. The circuit of Fig. 2 operates bo that of the base electrodes of transistors 40 and 46 received input signals TOO or 80 ° are out of phase, making the transi- '· ". disturb 46 is switched off when the transistor 4Θ is switched on is and vice versa. Accordingly, Ström is from the Resistance 50 either by winding 54 or passed through the winding 58, but not at the same time through both windings. Switching occurs, for example then on when the base of the transistor

109808/1791

40 becomes positive with respect to ground and if at the same time the base of transistor 46 becomes negative with respect to ground will. The windings 54 and 58 have the same winding direction Taking into account that the current flow in the windings depends on which of the transistors 40 or 46 is conductive, is opposite, it can be seen that the polarity of the output signal at terminal 62 changes when a transition occurs. If single-ended operation is desired, the capacitor is required 44 and the resistor 48 will not be present · The base of the transistor 46 is in this case connected to ground placed, as well as the base of transistor 20 is connected to ground. Push-pull operation is advantageous because the three-wave pulses coming from the integrator in their amplitude Have variations that are opposite to the variations that the duty cycle of the input signalee subject. The push-pull operation always ensures that the output limiter has a triangular wave signal is supplied to a sufficiently large amplitude. In addition, it also proves itself with regard to the switching behavior of the limiter is advantageous if the limiter receives an input signal generated by a counter-keying circuit is fed.

The explanation of the operation of those shown in FIG The circuit is expediently carried out using the wave trains shown in FIG. 3 · The voltages and currents of the wave trains shown in Fig. 3 are related on the same time scale in the exact relative position shown on a common time axis. Assuming a disturbed impulse wave train e ^, the between the input terminal 22 and ground. In general the input signal can be any periodic waveform with two AC axes that are moving cross once per period. During the first half

109808/1791

cycle or the positive phase of the input waveform e .. the transistor 18 is conductive and the transistor 20 is not conductive. The one through transistor 24 The relatively constant current flowing at this point is through the collector-emitter junction of the transistor 18 and quickly reaches a Maxiafl.- or limit value in transistor 18. This limit value depends on the available power. At this limit value, this S-fc level remains constant until the transistor 18 turns off. During the next half cycle none of the resistor flows through the same transistor 24 coming stream. A square-wave current is therefore generated at the collector 18 in response to the Input signal e .. generated. The current jL in the collector of transistor 18 is shown in FIG. The positive phase of the square wave current i- corresponds to in their duration of the positive phase of the input pulses e ^. Likewise, the duration of the negative phase of the square wave current i .. corresponds to the duration of the negative phase the input waveform of e-. Once the input shaft from e .. crosses the zero axis in the negative direction, becomes the current coming from the resistor 24 is switched from the transistor 18 to the transistor 20. This will the negative phase of the square wave signal from i- in Fig. 3 initiated. I.

The one in Pig. _{The triangular waveform e 2} shown in FIG. 3 is the voltage across the capacitor 30. When the transistor 18 is non-conductive, the capacitor 30 charges positively and thus generates a ramp voltage which goes positive. The capacitor 30 is charged at this time through the resistor 28. When the transistor 18 is conductive, the capacitor 30 is discharged through the transistor 18 and the resistor 24, whereby

109808/1791

the negative ramp voltage part of the triangle waveform is created. The voltage of triangular waveform e ₂ that appears at point 26 is generally positive with respect to ground; one connection of the capacitor 30 is connected to ground. The amplitude and the direct current component of the pulse waveform e "vary with the duty cycle of the input pulse wave train e-. The triangular pulses e ₂ are passed on from point 26 to the base of transistor 40 via an RO coupling network. The RO coupling network consists of the capacitor 38 and the resistor 42. Normally, only the alternating current component of the pulse train e "is transmitted to the base of the transistor 40. The capacitor 38 is essentially charged to the direct current component of the pulse train βρ. The voltage across capacitor 38 can change little in the short time it period changes the input waveform, provided that the time constant of the combination of capacitor 38 and resistor 48 is relatively long compared to the dip time is. The change signal voltage e ~ at the right terminal of the capacitor 38 is therefore essentially equal to the change signal voltage which occurs at point 26, but the direct current component is suppressed. The mean value of the triangular pulse waveform at the base of transistor 40 is then substantially coincident with the ground level (or the zero axis) in the output limiter circuit. The waveform e, at the base of transistor 40 is shown in FIG. 1 in relation to the ground level. The ground level is indicated by the dashed line. The mean value of the triangular pulse waveform divides this waveform into equal time intervals. Since this mean value is now identical to the zero crossing point of the output limiter switch, the output

109808/1791

limiter circuit in equal time intervals. If the triangular impulses are e, the zero axis is positive Cross direction, the transistor 40 turns on and the transistor 46 off. When the triangular pulses e ~ the If the zero axis crosses in the negative direction, · ■ takes place

the reverse shift · As a result, w £ rd d 'e' in Fig pulse waveform shown. 3 e generated., which appears at the output terminal 62. The pulse waveform e. substantially rectangular, with the points of intersection with the zero axis in the waveforms e , and f§, essentially coincide. The pulse waveform e., which is positive and negative. |

Has phases of the same duration and therefore has a pulse duty factor of 50 io , can advantageously be used to control a push-pull modulator, a synchronous detector or similar circuits in which the exact adherence to the switching times is important. .

Of course, the pulse waveform has exactly that same frequency as the input pulse waveform e ^ « It can also be seen that the pulse waveform e. by 90 ° itx E-phase shifted with respect to the pulse waveform. is. The phase difference remains constant, regardless of ι

on the smoothness of the input pulse waveform; in the opposite '" eat ζ in addition occurs at the end of a herbal flea IiC resonance circuit to correct the Taötyerhäitnis of a pulse wave train exhibits a phase shift as a function of the pulse repetition frequency. Although the The above explanation only applies to the upper or positive ones Part of the in lig. 2 limited circuit shown, it will be understood that the lower part of the circuit operates in the same way, with between the two Circuit parts there is a phase shift of -180 °.

109808/1791

-H-

In a special game, the one shown in FIG Circuit used to correct the duty cycle of a color television subcarrier signal e .., which had a frequency of about 3 »58 MHz. In this case they were the various resistors and capacitors provided with the following values:

R ₂ . 3000 ohms

R ₂₈ and R ₅₄ 3600 Ohm
C ₅₀ , G ₅₆ , G ₅₈ and C.4 270 picofarad R, _o and R. o 2000 ohms

_ 4t 40

ψ R ₅₀ 1000 Ohm.

Although the color subcarrier frequency does not vary greatly allowed, it was not necessary to stipulate tight tolerances for the circuit components «The circuit could therefore be produced cheaply. With a previously used LC circuit to correct the duty cycle the individual components of the circuit had to be selected specifically for the operating frequency.

It has been found that the circuit according to the invention, which was used for the aforementioned 3.58 MHz, via a wide prequens range (e.g. from 3 to 6 HHz) worked satisfactorily. The phase difference did not change, but remained constant 90 ° regardless of the operating frequency, the circuit did not have to with frequency changes be retuned.

Although the use of .transistors in the circuit recommends, other active switching elements such as tubes or the like can also be used.

109808/1791

Claims (1)

Patent pending Circuit arrangement for correcting the duty cycle of an alternating current signal, characterized by a first circuit part to which the alternating current signal as Input signal is supplied, the first circuit part in response to the input signal, a pulse train having substantially triangular pulses generated whose rising plank temporally corresponds to the one polarity phase of an oscillation of the alternating current! - gnales and their falling edge of the other polarity phase corresponds to the mentioned oscillation of the alternating current signal and through a second 'circuit part, the parts of the pulse wave train with the above and below a mean value responds to triangular pulses, such that he generates an output pulse wave train with a selected duty cycle, 2. Circuit arrangement for correcting the duty cycle of an alternating current signal, such that the duty cycle nis 50 #, characterized in that the mean value for the pulse wave train with the triangular Pulses is chosen so that it the pulse wave train with the triangular pulses in substantially divides equal time intervals and that the second circuit part in such a way on the pulse wave train with the triangular pulses respond that the output wave train changes in one direction of polarity, when the pulse wave train with the triangular pulses crosses the mean value in one direction and that the output pulse wave train changes in the other polarity direction when the pulse wave train 109808/1791 with the triangular pulses crosses the mean value in the other direction. Circuit arrangement according to Claim 2, characterized in that the first circuit part has a first limiting circuit (10) which controls the input « AC signal is supplied and which in response thereto a pulse train with substantially square-wave Pulses are generated, the positive and negative phases of the pulse wave train with the rectangular Pulses are temporally assigned to the corresponding polarity phases of the AC input signal which are defined by a predetermined reference value for the input alternating red signal, that the first circuit part also contains an integrating circuit (12), which the pulse wave train with is supplied to the square-shaped pulses and in response to the pulse wave train with the triangular-shaped Pulses generated that the integration circuit (12) has a time constant which is at least is just as large as the period time of the input alternating current signal that the second circuit part has a second limiter circuit (16), which have a pulse wave train with substantially rectangular shape Pulses generated when a signal is fed to the input of the second limiter circuit (16), which fluctuates around a predetermined reference value, and that the second circuit part also one of the second Limiter circuit (16) upstream AC coupling circuit (14) which the Irapulse wave train supplied with the triangular shaped pulses is, whereby the pulse wave train with the triangular pulses at the entrance of the second Limiter circuit (16) fluctuates around the aforementioned reference value and by the Be-aggswert in im essential equal time intervals is divided. 109808/1791 4. A circuit arrangement according to claim 3 _t characterized in that the integration circuit (12) includes a first capacitor ■■ (.30,36). 5. Circuit arrangement according to claim 4, characterized in that that the alternating current circuit (14) contains a second capacitor (38,44). 6. Circuit arrangement according to claim 5, characterized in that the first limiter circuit (10) is a has active switching element, the output of which with the first capacitor (30,36) is connected and that the -, first limiter circuit (10) furthermore a resistor " (28,34) which is used for the first capacitor (30, 36) forms a charging resistor. 7. Circuit arrangement according to claim 5> characterized in that the first limiter circuit (10) has two having active current switching elements, the output of which is connected to the first capacitor (30,36) and that the two current switching elements are controlled so that the current switched from one to the other when the input AC signal is with a corresponds to the predetermined reference value », ■ · '■■■:''^;:; ■ ■ '■■ ■ I 8. Circuit arrangement according to Claim 7jd characterized in that the two active current switching elements are two transistors (18, 20) operated in a differential circuit, the emitters of which are connected and connected to a common emitter resistor (24), via which the emitters of the S _r anistors (18, 20) are connected to a reference potential point, 10 9 8 0 8/1791 9 · Circuit arrangement according to. Claim 3 »characterized in that that the second limiter circuit (16) has two active current switching elements which are so controlled are that the current is switched from one to the other when that of the second 3-limiter circuit (16) supplied pulse wave train with the triangular pulses coincides with its reference value. 10. Circuit arrangement according to claim 9, characterized in that the second limiter circuit (16) has two in differential circuit operated transistors (40, 46), the emitter of which has a common ψ The emitter resistor (50) is connected to a reference potential point. 11. Circuit arrangement according to claim 3, characterized in that the first limiter circuit (10) has two active current switching elements operated in differential circuit, that the integration circuit (12) two capacitors (30,36), each of which with the output of one of the active current switching elements is connected that the second limiter circuit (16) has two active switching elements operated in a differential circuit and that the V / echselstromkopplungs- * circuit (14) is an RC coupling circuit which the capacitors (30,36) with the corresponding inputs of the two active switching elements of the second Limiter circuit (16) connects. 12. Circuit arrangement according to claim 11, characterized in that that the integration circuit (12) contains two resistors (28, 34), one of which as Charging resistor for a capacitor (30) and the other is used as a charging resistor for the capacitor (36). 109808/1791 13. Circuit arrangement according to claim 11, characterized in that the active switching elements of the first and second limiter circuit (10, 16) are formed by transistors (18, 20) and 40, 46). 14. Circuit arrangement according to claim 13, characterized in that that the differential circuit operated transistors (18, 20) of the first limiter circuit (10) and those operated in differential circuit Transistors (40, 46) of the second limiter circuit (16) each to a common emitter current source are led. 109808/1791. Blank page