DE19983632T1 - Emulation eines Befehlssatzes bei einem Befehlssatzarchitekturübergang - Google Patents
Emulation eines Befehlssatzes bei einem BefehlssatzarchitekturübergangInfo
- Publication number
- DE19983632T1 DE19983632T1 DE19983632T DE19983632T DE19983632T1 DE 19983632 T1 DE19983632 T1 DE 19983632T1 DE 19983632 T DE19983632 T DE 19983632T DE 19983632 T DE19983632 T DE 19983632T DE 19983632 T1 DE19983632 T1 DE 19983632T1
- Authority
- DE
- Germany
- Prior art keywords
- instruction set
- emulation
- architecture transition
- transition
- set architecture
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007704 transition Effects 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30025—Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30043—LOAD or STORE instructions; Clear instruction
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30109—Register structure having multiple operands in a single register
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30112—Register structure comprising data of variable length
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/170,131 | 1998-10-12 | ||
US09/170,131 US6163764A (en) | 1998-10-12 | 1998-10-12 | Emulation of an instruction set on an instruction set architecture transition |
PCT/US1999/023376 WO2000022524A1 (en) | 1998-10-12 | 1999-10-06 | Emulation of an instruction set on an instruction set architecture transition |
Publications (2)
Publication Number | Publication Date |
---|---|
DE19983632T1 true DE19983632T1 (de) | 2001-09-27 |
DE19983632B4 DE19983632B4 (de) | 2007-02-22 |
Family
ID=22618665
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19983632T Expired - Fee Related DE19983632B4 (de) | 1998-10-12 | 1999-10-06 | Emulation eines Befehlssatzes bei einem Befehlssatzarchitekturübergang |
Country Status (7)
Country | Link |
---|---|
US (1) | US6163764A (de) |
KR (1) | KR100401799B1 (de) |
CN (1) | CN1126034C (de) |
AU (1) | AU1104000A (de) |
DE (1) | DE19983632B4 (de) |
GB (1) | GB2357876B (de) |
WO (1) | WO2000022524A1 (de) |
Families Citing this family (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7941647B2 (en) | 1999-01-28 | 2011-05-10 | Ati Technologies Ulc | Computer for executing two instruction sets and adds a macroinstruction end marker for performing iterations after loop termination |
US8127121B2 (en) | 1999-01-28 | 2012-02-28 | Ati Technologies Ulc | Apparatus for executing programs for a first computer architechture on a computer of a second architechture |
US8074055B1 (en) * | 1999-01-28 | 2011-12-06 | Ati Technologies Ulc | Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code |
US6954923B1 (en) | 1999-01-28 | 2005-10-11 | Ati International Srl | Recording classification of instructions executed by a computer |
US6763452B1 (en) | 1999-01-28 | 2004-07-13 | Ati International Srl | Modifying program execution based on profiling |
US8121828B2 (en) | 1999-01-28 | 2012-02-21 | Ati Technologies Ulc | Detecting conditions for transfer of execution from one computer instruction stream to another and executing transfer on satisfaction of the conditions |
US7111290B1 (en) * | 1999-01-28 | 2006-09-19 | Ati International Srl | Profiling program execution to identify frequently-executed portions and to assist binary translation |
US6779107B1 (en) | 1999-05-28 | 2004-08-17 | Ati International Srl | Computer execution by opportunistic adaptation |
US6529862B1 (en) * | 1999-06-30 | 2003-03-04 | Bull Hn Information Systems Inc. | Method and apparatus for dynamic management of translated code blocks in dynamic object code translation |
US6516295B1 (en) * | 1999-06-30 | 2003-02-04 | Bull Hn Information Systems Inc. | Method and apparatus for emulating self-modifying code |
US6564179B1 (en) * | 1999-07-26 | 2003-05-13 | Agere Systems Inc. | DSP emulating a microcontroller |
US6845353B1 (en) * | 1999-12-23 | 2005-01-18 | Transmeta Corporation | Interpage prologue to protect virtual address mappings |
US6609247B1 (en) * | 2000-02-18 | 2003-08-19 | Hewlett-Packard Development Company | Method and apparatus for re-creating the trace of an emulated instruction set when executed on hardware native to a different instruction set field |
US6601163B1 (en) * | 2000-05-08 | 2003-07-29 | International Business Machines Corporation | Method and system for executing adapter configuration routines utilizing different operating modes |
GB2376098B (en) * | 2001-05-31 | 2004-11-24 | Advanced Risc Mach Ltd | Unhandled operation handling in multiple instruction set systems |
US7092869B2 (en) * | 2001-11-14 | 2006-08-15 | Ronald Hilton | Memory address prediction under emulation |
US20030093774A1 (en) * | 2001-11-14 | 2003-05-15 | Ronald Hilton | State-specific variants of translated code under emulation |
US6907519B2 (en) * | 2001-11-29 | 2005-06-14 | Hewlett-Packard Development Company, L.P. | Systems and methods for integrating emulated and native code |
US7171546B2 (en) * | 2002-05-23 | 2007-01-30 | Adams Phillip M | CPU life-extension apparatus and method |
US7779407B2 (en) * | 2002-05-29 | 2010-08-17 | Adams Phillip M | Computer-hardware, life-extension apparatus and method |
US7299170B2 (en) * | 2003-06-28 | 2007-11-20 | Transitive Limited | Method and apparatus for the emulation of high precision floating point instructions |
US7287173B2 (en) * | 2003-12-19 | 2007-10-23 | Intel Corporation | Method for computing power consumption levels of instruction and recompiling the program to reduce the excess power consumption |
CN100573443C (zh) * | 2004-12-30 | 2009-12-23 | 英特尔公司 | 从混合源指令集架构到单一目标指令集架构的二进制代码转换中的多格式指令的格式选择 |
US7447882B2 (en) * | 2005-04-20 | 2008-11-04 | Arm Limited | Context switching within a data processing system having a branch prediction mechanism |
US7360031B2 (en) * | 2005-06-29 | 2008-04-15 | Intel Corporation | Method and apparatus to enable I/O agents to perform atomic operations in shared, coherent memory spaces |
US7408484B1 (en) * | 2007-02-20 | 2008-08-05 | International Business Machines Corporation | Method of doing PACK unicode zSeries instructions |
US7394409B1 (en) * | 2007-02-20 | 2008-07-01 | International Business Machines Corporation | Method of doing pack ASCII zSeries instructions |
US9652210B2 (en) * | 2007-08-28 | 2017-05-16 | Red Hat, Inc. | Provisioning a device with multiple bit-size versions of a software component |
US8832679B2 (en) * | 2007-08-28 | 2014-09-09 | Red Hat, Inc. | Registration process for determining compatibility with 32-bit or 64-bit software |
CN101676863B (zh) * | 2008-08-15 | 2012-12-26 | 北京北大众志微系统科技有限责任公司 | 一种双宽度指令系统的性能无损切换方法及其应用系统 |
US9727336B2 (en) | 2011-09-16 | 2017-08-08 | International Business Machines Corporation | Fine-grained instruction enablement at sub-function granularity based on an indicated subrange of registers |
US9411585B2 (en) * | 2011-09-16 | 2016-08-09 | International Business Machines Corporation | Multi-addressable register files and format conversions associated therewith |
US8694973B2 (en) * | 2011-09-27 | 2014-04-08 | Unisys Corporation | Abstracting computational instructions to improve performance |
US9563432B2 (en) | 2013-04-19 | 2017-02-07 | Nvidia Corporation | Dynamic configuration of processing pipeline based on determined type of fetched instruction |
US11263010B2 (en) | 2019-07-09 | 2022-03-01 | Micron Technology, Inc. | Bit string lookup data structure |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4951195A (en) * | 1988-02-01 | 1990-08-21 | International Business Machines Corporation | Condition code graph analysis for simulating a CPU processor |
US5313614A (en) * | 1988-12-06 | 1994-05-17 | At&T Bell Laboratories | Method and apparatus for direct conversion of programs in object code form between different hardware architecture computer systems |
US5507030A (en) * | 1991-03-07 | 1996-04-09 | Digitial Equipment Corporation | Successive translation, execution and interpretation of computer program having code at unknown locations due to execution transfer instructions having computed destination addresses |
US5574927A (en) * | 1994-03-25 | 1996-11-12 | International Meta Systems, Inc. | RISC architecture computer configured for emulation of the instruction set of a target computer |
US5685009A (en) * | 1994-07-20 | 1997-11-04 | Exponential Technology, Inc. | Shared floating-point registers and register port-pairing in a dual-architecture CPU |
US5742794A (en) * | 1995-10-13 | 1998-04-21 | Dell Usa, L.P. | Emulation techniques for computer systems having mixed processor/software configurations |
US5701508A (en) * | 1995-12-19 | 1997-12-23 | Intel Corporation | Executing different instructions that cause different data type operations to be performed on single logical register file |
US5729724A (en) * | 1995-12-20 | 1998-03-17 | Intel Corporation | Adaptive 128-bit floating point load and store operations for quadruple precision compatibility |
US5764959A (en) * | 1995-12-20 | 1998-06-09 | Intel Corporation | Adaptive 128-bit floating point load and store instructions for quad-precision compatibility |
US5740093A (en) * | 1995-12-20 | 1998-04-14 | Intel Corporation | 128-bit register file and 128-bit floating point load and store for quadruple precision compatibility |
US5920721A (en) * | 1997-06-11 | 1999-07-06 | Digital Equipment Corporation | Compiler generating functionally-alike code sequences in an executable program intended for execution in different run-time environments |
US5870575A (en) * | 1997-09-22 | 1999-02-09 | International Business Machines Corporation | Indirect unconditional branches in data processing system emulation mode |
-
1998
- 1998-10-12 US US09/170,131 patent/US6163764A/en not_active Expired - Lifetime
-
1999
- 1999-10-06 CN CN99812059A patent/CN1126034C/zh not_active Expired - Fee Related
- 1999-10-06 WO PCT/US1999/023376 patent/WO2000022524A1/en active IP Right Grant
- 1999-10-06 AU AU11040/00A patent/AU1104000A/en not_active Abandoned
- 1999-10-06 DE DE19983632T patent/DE19983632B4/de not_active Expired - Fee Related
- 1999-10-06 GB GB0107747A patent/GB2357876B/en not_active Expired - Fee Related
- 1999-10-06 KR KR10-2001-7004574A patent/KR100401799B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR100401799B1 (ko) | 2003-10-17 |
GB2357876A (en) | 2001-07-04 |
GB0107747D0 (en) | 2001-05-16 |
WO2000022524A9 (en) | 2001-01-04 |
US6163764A (en) | 2000-12-19 |
WO2000022524A1 (en) | 2000-04-20 |
CN1126034C (zh) | 2003-10-29 |
DE19983632B4 (de) | 2007-02-22 |
KR20010080104A (ko) | 2001-08-22 |
AU1104000A (en) | 2000-05-01 |
GB2357876B (en) | 2003-08-27 |
CN1328666A (zh) | 2001-12-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
8181 | Inventor (new situation) |
Free format text: DULONG, CAROLE, SARATOGA, CALIF., US CRAWFORD, JOHN H., SARATOGA, CALIF., US DULONG, CAROLE, SARATOGA, CALIF., US CRAWFORD, JOHN H., SARATOGA, CALIF., US |
|
8181 | Inventor (new situation) |
Free format text: DULONG, CAROLE, SARATOGA, CALIF., US CRAWFORD, JOHN H., SARATOGA, CALIF., US |
|
8607 | Notification of search results after publication | ||
8364 | No opposition during term of opposition | ||
R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |
Effective date: 20130501 |