DE19983470T1 - Verfahren und Einrichtung zum Regeln der Temperatur eines Bauelements - Google Patents

Verfahren und Einrichtung zum Regeln der Temperatur eines Bauelements

Info

Publication number
DE19983470T1
DE19983470T1 DE1999183470 DE19983470T DE19983470T1 DE 19983470 T1 DE19983470 T1 DE 19983470T1 DE 1999183470 DE1999183470 DE 1999183470 DE 19983470 T DE19983470 T DE 19983470T DE 19983470 T1 DE19983470 T1 DE 19983470T1
Authority
DE
Germany
Prior art keywords
regulating
component
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE1999183470
Other languages
English (en)
Other versions
DE19983470B4 (de
Inventor
Satchitanand Jain
Dennis Reinhardt
Sung-Soo Cho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE19983470T1 publication Critical patent/DE19983470T1/de
Application granted granted Critical
Publication of DE19983470B4 publication Critical patent/DE19983470B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Control Of Temperature (AREA)
DE19983470T 1998-08-18 1999-08-13 Verfahren und Einrichtung zum Regeln der Temperatur eines Bauelements Expired - Fee Related DE19983470B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13621398A 1998-08-18 1998-08-18
US09/136,213 1998-08-18
PCT/US1999/018433 WO2000011675A1 (en) 1998-08-18 1999-08-13 Method and apparatus to control the temperature of a component

Publications (2)

Publication Number Publication Date
DE19983470T1 true DE19983470T1 (de) 2001-07-12
DE19983470B4 DE19983470B4 (de) 2011-08-18

Family

ID=22471860

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19983470T Expired - Fee Related DE19983470B4 (de) 1998-08-18 1999-08-13 Verfahren und Einrichtung zum Regeln der Temperatur eines Bauelements

Country Status (6)

Country Link
CN (1) CN1263037C (de)
AU (1) AU5398199A (de)
DE (1) DE19983470B4 (de)
GB (1) GB2358944B (de)
HK (1) HK1041975B (de)
WO (1) WO2000011675A1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7269481B2 (en) 2003-06-25 2007-09-11 Intel Corporation Method and apparatus for memory bandwidth thermal budgetting
US8122187B2 (en) 2004-07-02 2012-02-21 Qualcomm Incorporated Refreshing dynamic volatile memory
US7454586B2 (en) * 2005-03-30 2008-11-18 Intel Corporation Memory device commands
US9262326B2 (en) 2006-08-14 2016-02-16 Qualcomm Incorporated Method and apparatus to enable the cooperative signaling of a shared bus interrupt in a multi-rank memory subsystem
CN102014201B (zh) 2010-09-29 2014-04-30 中兴通讯股份有限公司 一种数据卡温度控制方法及装置
US10088880B2 (en) * 2015-08-27 2018-10-02 Intel Corporation Thermal monitoring of memory resources
CN107678986B (zh) * 2017-09-28 2021-06-22 惠州Tcl移动通信有限公司 Usb3.0传输速率设置方法、移动终端及存储介质

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3916263A (en) * 1971-12-13 1975-10-28 Honeywell Inf Systems Memory driver circuit with thermal protection
US4881057A (en) * 1987-09-28 1989-11-14 Ranco Incorporated Temperature sensing apparatus and method of making same
US5276843A (en) * 1991-04-12 1994-01-04 Micron Technology, Inc. Dynamic RAM array for emulating a static RAM array
AU6988494A (en) * 1993-05-28 1994-12-20 Rambus Inc. Method and apparatus for implementing refresh in a synchronous dram system
US5451892A (en) * 1994-10-03 1995-09-19 Advanced Micro Devices Clock control technique and system for a microprocessor including a thermal sensor
JP4090088B2 (ja) * 1996-09-17 2008-05-28 富士通株式会社 半導体装置システム及び半導体装置
US5784328A (en) * 1996-12-23 1998-07-21 Lsi Logic Corporation Memory system including an on-chip temperature sensor for regulating the refresh rate of a DRAM array

Also Published As

Publication number Publication date
HK1041975A1 (en) 2002-07-26
WO2000011675A1 (en) 2000-03-02
AU5398199A (en) 2000-03-14
GB0103092D0 (en) 2001-03-28
GB2358944A (en) 2001-08-08
CN1263037C (zh) 2006-07-05
CN1328687A (zh) 2001-12-26
DE19983470B4 (de) 2011-08-18
GB2358944B (en) 2002-12-11
HK1041975B (zh) 2007-02-23

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
R018 Grant decision by examination section/examining division
R020 Patent grant now final

Effective date: 20111119

R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee