DE19958803C1 - Method and device for handling semiconductor substrates during processing and / or processing - Google Patents

Abstract

The present invention relates to a method for handling semiconductor substrates during processing and / or processing. DOLLAR A In the method, the semiconductor substrate is connected to a carrier substrate, processed on the carrier substrate and then detached from the carrier substrate again. For separation from the carrier substrate, one or more cracks are generated in the connection area between the semiconductor substrate and the support substrate, which spread out in the connection area and lead to the separation of the two substrates. DOLLAR A The process enables thin semiconductor substrates to be handled easily during processing and / or processing without producing any noteworthy waste products.

Description

The present invention relates to a method for handling semiconductor substrates in the process sation and / or processing, in which the process rende semiconductor substrate ver with a carrier substrate bound, processed on the carrier substrate and / or be works and then detached from the carrier substrate becomes. The invention further relates to a device for the separation of connected substrates in the through conduct of the procedure.

For many applications of electronic components ment and especially of integrated circuits it may be advantageous to determine the total thickness of the half lead to limit the range to a few micrometers. The Art thin semiconductor areas have a very small Mass and a very low height. You are mecha nically flexible and adapt to the thermomechanical Behavior of a document. Especially in the microelek tronics and in the area of microsystems technology, at for example in use with chip cards, are such thin microelectronic or micromechanical components elements of great interest.  

For the production and handling of thin Semiconductor substrates or semiconductor wafers are among different procedures known. In silicon technology First, wafers with a thickness are available typically 500-1000 µm with a diameter from currently 100 mm to 300 mm. After half technological production to generate the Circuits or components become the wafers and there with the individual chips of the wafer to residual thicknesses of Thinned 200 µm or less to in or on the case Chip cards can be installed. A process components or circuits on cantilevers the already thinned wafers usually cut because the wafers decrease with the material thickness increasingly deform or break.

For thinning back wafer material after the process Mechanical and chemical processes such as for example grinding or etching, or a combination tion of both methods used. This technique has ever but the disadvantage that for thinning back on the one hand a lot of time is required and on the other hand the removed wafer material is destroyed, so that it must be disposed of in an environmentally friendly manner. Still exists the risk that they are already processing on the wafer components due to a faulty thinning pro be destroyed. The back of the wafer, i. H. the off thinned side, has increased roughness where by reducing the strength of the components.  

Another known process for processing thin semiconductor substrates consists in the use of the so-called called SOI wafers. If this tech nik, the so-called BESOI technology, become two oxi dated silicon wafers by thermal bonding and covalent bonds thus produced firmly bonded the. Then one of the two wafers is placed on the Thinned usable thickness. The one created in this way Composite of a thin semiconductor substrate on one thicker carrier wafer is pro in the desired manner cressed. Then the thin semiconductor sub strat detached from the carrier wafer. In this way the Risk of the component layer being destroyed by the Avoided thinning process because of the semiconductor layer is processed only after thinning.

For the separation of the processed semiconductor layer Different methods are used for the carrier substrate knows. The carrier wafer is removed here usually by grinding or by wet or dry chemical etching. However, both procedures result to complete destruction of the carrier wafer and to a danger to the processed half-lead layer.

JP 7-302889 A describes a process for the manufacture position of an SOI wafer, in which a porous silicon layer between the thin semiconductor layer and the Carrier substrate is formed. When removing the The carrier substrate becomes only the porous sili zium layer etched away, so that the carrier substrate un remains intact.  

Another method of separating a thin one Semiconductor layer from a carrier substrate is in the DE 196 54 791 A1. With this procedure ver the thin semiconductor layer with through holes see that up in one between the semiconductors layer and the substrate present separation stretch layer. Then an etchant is used remove the separating layer into the through holes brought and the semiconductor layer in this way by separated from the carrier substrate. The process enables thus also the manufacture or handling of a thin semiconductor substrate without a loopback or Etching back a monocrystalline wafer.

However, the latter procedures each require because a special separating layer between the thin Semiconductor substrate and the carrier substrate, which for a Etchant must be accessible. In addition, this separation layer are etched away, so that waste pro products that have to be disposed of in an environmentally friendly manner sen.

In addition to the fixed connections listed above between the substrates can before the actual Processing two wafers without any additional external ones effect through pure mechanical contact of your upper surfaces are connected with each other. In the mechanical Contact of the wafers becomes an adhesion over relative weak reversible bonds such as hydrogen bonds bonds or achieved by the Waals bonds. At Residual particles or contamination in the connection area or if the planarity of the wafers is insufficient NEN cavities in the connection area, which over IR techniques are detectable. In this case  the wafers are usually separated from each other again cleaned or discarded if necessary become. Given the very low strength and re The bond between the wafers can become too flexible at this point, the bond connection is easily re-established be separated.

To separate these loose bond connections between It is two wafers, for example, from EP 0 824 267 A1 known, the separation of the semiconductor substrates Separation by a lateral mechanical load on the Support connection with blades or cutting. US 5,897,743 and JP 7-240355 A also describe comparable procedures. The wafer network is at This procedure is always only marginally loaded around the doors initiation and damage to the wafer top to avoid areas. For example, in US 5,897,743 for example, due to the geometry of the cutting edge It is important that the cutting edge is not too far in the connection penetrates. As a result of the low strength The crack created spreads when the connection is made independently over the entire wafer area, d. H. about egg ne length of approx. 10 cm.

The latter are for the here existing use cases, however, not suitable in which the wafer assembly has already processed and / or be has been working before the connection is broken. The The strength of the wafer bond connection is essential Lich higher. So the strength of the connection is reduced the initial contact, for example, by the following Outsourcing of the composite at elevated temperature (100 ° C to 1100 ° C) or in combination with a Plasma pretreatment of the surface increased significantly device. The higher the aging temperature, the more  the strength increases. This will be for different Applications, for example in connection technology for microsystems, specifically carried out, but can also occur as a side effect when the wafer composite is out other reasons must be heated, e.g. B. surface Chen thermally oxidize. If the wafer composite as Handling system used, these must also be very fe most bond connections. This Connections are so far only with the former Ver drive separable.

The object of the present invention is therein a method of handling semiconductor sub contested in processing and / or processing admit the ease of use in particular thin semiconductor substrates without the need spe zial intermediate layers on a carrier substrate possible and not cause any noteworthy waste products gently.

The task is accomplished with the method according to Patentan spell 1 solved. A device for separation verbun whose substrates is in the implementation of the method specified in claim 16. Advantageous configurations the method and the device are the subject of Subclaims.

In the method according to the invention, this becomes pro cessing semiconductor substrate with a carrier substrate connected, processed on the carrier substrate and / or processed and then separated from the carrier substrate.  For separation from the carrier substrate, a or several cutting edges or tips parallel to one Surface of the semiconductor substrate with a feed speed in the connection area between the Inserted semiconductor substrate and the carrier substrate, from an initial first value to a height its second value is increased so that initially a or multiple cracks are created in the connection area that are caused by further insertion of the cutting the or tips completely in the connection area wide and lead to the separation of the two substrates.

There is therefore no special intermediate for this separation layer between the carrier substrate and the half conductor substrate required. The separation is pure mechanically without using an etching process. It arises therefore no or very few waste to be disposed of case products. The area of the carrier that is not required substrates, which is used for conventional back-thinning is destroyed, he remains in the present proceedings hold and stands as a new starting substrate for the Procedure available again. The invention Technological processing allows thin processing ner semiconductor substrates, in particular wafers, by through the connection with the carrier substrate a stiff rer Verbund is generated, which during the Handha exercise, d. H. especially in processing and / or  Machining, not bent and a higher mechanical Resilience. So that's going through everyone Process steps possible. The resulting surface on the back of the semiconductor substrate has after the separation from the carrier substrate is significantly less Roughness as a grinded wafer surface. The The method is particularly suitable for handling with thin semiconductor substrates or semiconductor layers a thickness below 300 microns.

In the present procedure, the two Substrates first with a suitable joining process connected with each other. Here, for example Direct wafer bonding processes are used. The semiconductor substrate is usually thinner than the carrier substrate that is used to stiffen the serving association. The two substrates can be made from be the same or different materials stand. For example, a carrier substrate can also be used can be used from a glass material. The two Substrates can also be in the area of the joining zone Surface layer or a surface structuring, such as depressions or pits. By the out Choice of parameters in the production of the joint or a targeted post-treatment (e.g. display at a certain elevated temperature) is one defined setting of the adhesive strength between Semiconductor and carrier substrate possible.

After connecting the two substrates, the resulting association in different ways per be ceded and / or edited. So can the half conductor substrate, for example a coating, a Implantation, structuring, doping,  a heat treatment or other typical processing steps of semiconductor technology become. The type of processing is not based on this limited low temperatures. Rather, it can temperatures above 1000 ° C also occur.

After processing and / or processing in the connection level or connection layer between one or more cracks between the two substrates generated in a defined way in this joint Spread the connection. This eventually leads to the door of the two substrates. The separation takes place here parallel to the substrate or wafer surface without the Damage substrate material.

After cutting, the processed semi-egg is lying ter substrate and the carrier substrate individually. The Semiconductor substrate can now be sawn to individual Components or chips are separated. The carrier substrate stands for a possibly necessary waiter surface treatment, such as polishing and cleaning, again available as a new carrier substrate.

This takes place in an embodiment of the method Split into individual chips before separating the two substrates by sawing the entire composite. In In this case, the components or chips of the half conductor substrates individually from the divided units of the carrier substrate solved.

It goes without saying that the procedure can also be carried out with a semiconductor substrate can, which has the same thickness as the carrier substrate.  The semiconductor substrate can also, for example only after connecting to the carrier substrate on a thinner to be thinned back.

The creation of one or more cracks in the Connection area, d. H. in the connection level or a connection layer between the two substra ten, is done mechanically. The mechanical insertion has the advantage of good control over the generation of the Cracks.

The cracks are here by a push for example metallic blades or Blades from the side in the connection level or Ver bonding layer between the semiconductor substrate and the carrier substrate created. By pushing this in further Tips or blades spread the cracks close Lich in the entire connection zone between the two Substrates, so that the substrates differ from each other to solve.

It is particularly advantageous here if the Blades or tips very slow at first, that is with feed speeds of ≦ 1 µm / s, in ver binding area pushed in and with increasing on penetration depth can be moved faster.

In a further embodiment of the method the feed rate when inserting the Blades or tips increased in stages. After the first  Slow speed stage will be one Pause inserted during which there is no feed. In This stage causes fatigue effects, the so-called subcritical crack growth, to form one or several cracks with a length of a few µm up to a few mm. The crack growth rate be carries between 0.1 nm / s and 100 µm / s. After this The formation of these cracks becomes fast increased in stages because the cracks in these Spread stadiums faster. With these further stu fen can also before each increase in feed speed, a feed break can be taken. Through these breaks there is a controlled crack wax tum reached. The rate of crack growth can increase additionally by increasing the ambient temperature and / or by adding a suitable liquid or gaseous medium can be increased.

In a further advantageous embodiment of the method according to the invention Blade or tip on the joint connection during the Pushing acting force measured. The measured Values are used to control the feed rate used. An increasing with increasing feed Force indicates that there is no crack or on existing crack grows more slowly than the blade or Tip is inserted into the joint. With egg A constant force is the crack and feed speed same size. With a falling force it is Crack speed greater than the feed speed blade. Crack generation is finished when a suitable crack of a few mm in length is formed  Has. This is due to a sharp drop in strength signaled with increasing load.

After creating such a large crack the separation process can be done at higher feed rates speeds, for example 1 to 10 mm / s, who continued the. The crack then spreads at this speed over the entire substrate cross-section in the joint zone, which completely removes the two substrates be separated from each other.

The relationships between the behavior the measured force and the spread of the risers This can be used to control the feed rate use speed. So with one under one Predeterminable limit value, lower force the feed speed can be increased because in this case the crack already with a compared to the feed speed spreads higher speed. Exactly a change in force over a certain period of time tervall as a limit for an increase or decrease feed rate can be used. When the force increases above a certain one Limit can reduce the feed rate to avoid possible destruction of the substrates prevent. With a reduction in feed rates In this context, speed is also an advantage pause (feed rate = 0) to understand. The feed pause can, in turn, fall short a limit for the force ended and the pre thrust speed can be increased accordingly.

During the separation process, the semiconductor sub strat preferably held over a vacuum suction cup  or with a tensile force perpendicular to the substrate surface che acted upon.

Joining the two substrates at the beginning of the The method is preferably such that between two substrates after joining either only one natural oxide layer (1-3 nm thickness) or one or two thermal oxide layers with a thickness of typi approximately 500 nm. For the later doors is the type of connection of the two substrates irrelevant. Likewise, the connection of a tempera be subjected to turbo treatment to ensure the adhesion between to increase both substrates. In this case, too the two substrates can be separated using the separation process detach easily from each other.

The device for separating the two substrates consists of a holder for the substrates, at least at least one cutting edge or point to create the anris ses in the connection area between the two sub straten and a feed device for control inserting the cutting edge or tip into the Connection area as well as a control to increase the feed speed of the feed device while inserting the cutting edge or tip in the connection area from an, initial first Value to a higher second value. Are preferred several cutting edges or tips symmetrically around the neck arranged. When using multiple cutting edges they preferably have a trapezoidal outline, to make them as deep as possible in the connection area between between the two substrates without being able to that they bump into each other. The thickness of the cutting the or tips is in the range of less than 1 mm, where the tip of the blade must of course be significantly narrower.

The method according to the invention and the associated ge device are below without limitation general inventive concept again exemplary explained with reference to the accompanying figures. Here zei gene:

Figure 1 shows a first embodiment for the basic handling of the semiconductor substrate when performing the method according to the invention.

Fig. 2 shows a second example of the basic operation of the semiconductor substrate in the implementation of procedural invention proceedings;

FIG. 3 shows an example of a device for doors voltage of the substrates in the present procedural reindeer; and

Fig. 4 is a measurement diagram showing the force with which the blade of the device is pressed into the joint connection as a function of time for un different feed speeds.

In a first exemplary embodiment, as shown in FIG. 1, thin components are manufactured for which a process wafer is already available or can be produced in the required thickness. This process wafer 1 with a thickness of, for example, 200 μm is connected to a carrier wafer 2 with a thickness of, for example, 525 μm. The carrier wafer has a thin silicon dioxide layer on the surface to be joined (not visible in the figure), which was produced by thermal oxidation. The two wafers are connected using the direct wafer bonding process (steps 1 and 2). In the next step of the process overhead wafer 1 is provided as part of a processing with the necessary components to be manufactured for the microelectronic or mi kromechanischen structures 3 (Step 3.).

Then the bonded wafers 1 , 2 are again separated from each other in a targeted manner. For this purpose, the wa fer is subjected to a mechanical load in the vertical and horizontal directions (step 4. ). This is done by a vertical vacuum suction and a combined crack generation by laterally inserted parts (not shown). In the bonded boundary surface or in its vicinity, a crack spreads parallel to the wafer surface, which separates the process wafer 1 from the carrier wafer 2 (step 5. ). The detached carrier wafer can be used again as a new carrier wafer for the process after any surface treatment that may be necessary. The process wafer 1 is then separated into components (not shown in the figure).

FIG. 2 shows a further variant of the present method, with which ultra-thin components can be produced, for which there is no process wafer in the required thickness. In this method, an available thin process wafer 1 is connected to a carrier wafer in the same way as in the exemplary embodiment in FIG. 1 (steps 1 and 2). The process wafer 1 has a thickness of, for example, 200 μm, the carrier wafer 2 has a thickness of, for example, 525 μm. In the next step, the process wafer 1 is further thinned back to the desired thickness by conventional thinning techniques and subsequently polished. This enables a very thin process wafer to be provided (step 3. ). The connection to the rigid carrier wafer 2 prevents an excessively strong bending or breaking of the process wafer 1 . The further method steps take place as already explained in connection with FIG. 1, the same reference symbols being used for the same elements. In this way, components in extremely thin semiconductor substrates can be manufactured without any problems.

Fig. 3 shows an example of a separating tool for separating the two wafers of the embodiments of Fig. 1 or 2. In the figure, the receiving device 4 for the wafer composite and four blades 5 for insertion into the joint connection between the wa are shown. The device also has a feed unit 6 for each of the blades, with which suitable feed speeds can be achieved. In this example, electric drives with mechanical transmission are used as feed units. The blades 5 are trapezoidal, so that a deep insertion of the blades into the joint connection is made possible without these influencing each other. The blade thickness is 600 µm in the present example. The symmetrical arrangement of the blades around the bracket enables a uniform loading of the joint connection.

In the following exemplary embodiment, the parameters for carrying out the separation of a carrier wafer with a thickness of 525 μm from a process wafer with a thickness of 250 μm are specified, both wafers being coated on their surfaces to be bonded with thermal surface oxide with a thickness of 500 nm are. An RCA wafer cleaning is first carried out to produce the joint connection. The two wafers are bonded at room temperature. In the subsequent processing for producing the components in the process wafer, as is done, for example, in the exemplary embodiments from FIGS. 1 and 2, process temperatures up to 1100 ° C. occur.

The separation takes place in the manner already described by the lateral insertion of four blades with a device as shown in FIG. 3. The separation takes place between the two thermal oxide layers.

For separation it is necessary that in the initial state dium of inserting the blades, cracks in the joint zone. The crack generation takes place in present case by a compared to the actual separation slower insertion of the blades in the joint. In addition, the feed for stopped for a defined time. Care at this stage the fatigue effects for training one or more more cracks. The crack growth rate be carries 0.1 nm / s to 100 µm / s. Table 1 enters Example of the feed parameters for crack generation at which the feed speed increases in stages  between the individual stages a feed break is inserted.

Table 1

When using these parameters, an excellent separation result is achieved. A measurement of the force acting on the joint connection via the blade results in the curve shown in FIG. 4. In this fi gur the force with which the blade is pressed into the joint connection is plotted as a function of time for the different stages or feed rates in Table 1. The individual stages are marked in the table. One can see very well the force that increases suddenly at the beginning of each increase in the feed speed, which force decreases again after the feed is switched off. At later stages, the effect of a reducing force at constant feed speed can be clearly seen, which indicates faster crack growth. The sharp drop in force as the load increases from step 4 to step 5 is a clear indication that a suitably large crack has developed in the connection zone between the two wafers. After generating this marking, the separation process can be continued at higher feed speeds of, for example, 1-10 mm / s. The crack then spreads across the entire wafer cross-section at this speed, whereby the two wafers are completely separated.

Post-treatment of the process wafer is in the Usually not required. If necessary, the waiter can surface oxide can be removed by polishing or etching. The carrier wafer can be cleaned or given after removal of the oxide by polishing er or etching and reoxidation again as a carrier gerwafer can be used.  

Reference list

1

thin process wafer

2nd

Carrier wafer

3rd

Device structure

4th

Holder for wafers

5

Sound

6

Feed device

Claims (19)

1. A method for handling of semiconductor substrates in the processing and / or processing, wherein the gersubstrat to be processed semiconductor substrate (1) having a Trä (2), processed on the carrier substrate (2) and / or processed and then from the carrier substrate (2 ) is separated, characterized in that for separation from the carrier substrate ( 2 ) one or more cutting edges ( 5 ) or tips parallel to an upper surface of the semiconductor substrate ( 1 ) at a feed rate in the connection area between the semiconductor substrate ( 1 ) and the Carrier substrate ( 2 ) are inserted, which is increased from an initial first value to a higher second value, so that first one or more cracks are generated in the connection area, which can be completely inserted by further insertion of the cutting edges ( 5 ) or tips Spread out the connection area and separate the two substrates. 2. The method according to claim 1, characterized, that the initial first value at ≦ 1 µm / s and the high here the second value is <1 µm / s. 3. The method according to claim 1 or 2, characterized, that the feed speed is increased in stages.   4. The method according to claim 3, characterized, that after the first and possibly further stages the feed is interrupted for a certain time interval will. 5. The method according to any one of claims 1 to 4, characterized in that the force exerted on the connection area via the one or more cutting edges ( 5 ) or tips is measured during insertion and is used to control the feed rate. 6. The method according to claim 5, characterized, that the feed rate is increased when the measured force below a first predeterminable value has dropped. 7. The method according to claim 5 or 6, characterized, that the feed rate is reduced when the measured force has a second predeterminable value was enough. 8. The method according to any one of claims 1 to 7, characterized in that the semiconductor substrate ( 1 ) in the separation with egg ner tensile force perpendicular to a surface of the semiconductor substrate ( 1 ) is applied. 9. The method according to any one of claims 1 to 8, characterized in that the connection of the semiconductor substrate ( 1 ) with the carrier substrate ( 2 ) is carried out by a joining process. 10. The method according to claim 9, characterized, that bonding through a wafer bond process, such as for example direct, anodic, eutectic, ad adhesive or glass frit wafer bonding. 11. The method according to claim 10, characterized in that the adhesive strength between the semiconductor substrate ( 1 ) and carrier substrate ( 2 ) by the choice of parameters for wafer bonding or a targeted aftertreatment is set or increased. 12. The method according to any one of claims 9 to 11, characterized in that the semiconductor substrate ( 1 ) and / or the carrier substrate ( 2 ) is provided on a connecting surface with a thin oxide layer before connection. 13. The method according to any one of claims 1 to 12, characterized in that the semiconductor substrate ( 1 ) is thinned back after connecting to the carrier substrate ( 2 ). 14. The method according to any one of claims 1 to 13, characterized in that the processing of the semiconductor substrate ( 1 ) comprises sawing into individual units. 15. The method according to any one of claims 1 to 14, characterized in that the separation of the semiconductor substrate ( 1 ) from the carrier substrate ( 2 ) is accelerated by a defined temperature increase and / or the addition of a liquid or gaseous medium. 16. Device for separating two connected sub strates in a method according to one of the preceding claims

• - A holder ( 4 ) for the connected substrates;
• - at least one cutting edge ( 5 ) or tip for producing a tear in a connection area between the connected substrates; and
• - a feed device ( 6 ) for inserting the cutting edge ( 5 ) or tip into the connection area,

characterized in that a control for increasing the feed speed of the feed device ( 6 ) is provided during the insertion of the cutting edge ( 5 ) or tip into the connection area from an initial first value to a higher second value. 17. The apparatus according to claim 16, characterized in that a plurality of cutting edges ( 5 ) or tips with feed devices are arranged symmetrically around the holder ( 4 ). 18. The apparatus according to claim 16 or 17, characterized in that a force measuring device is provided on each cutting edge ( 5 ) or tip, which measures the force exerted by the cutting edge or tip on the connection area during insertion and is connected to the control, which drives the feed device (s) ( 6 ) as a function of the measured force. 19. Device according to one of claims 16 to 18, characterized in that the cutting edges ( 5 ) are designed trapezoidal.