DE19614996A1 - Polarity independent differential amplifier - Google Patents

Polarity independent differential amplifier

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Publication number
DE19614996A1
DE19614996A1 DE1996114996 DE19614996A DE19614996A1 DE 19614996 A1 DE19614996 A1 DE 19614996A1 DE 1996114996 DE1996114996 DE 1996114996 DE 19614996 A DE19614996 A DE 19614996A DE 19614996 A1 DE19614996 A1 DE 19614996A1
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Prior art keywords
input
signal
amplifier
differential amplifier
output
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DE1996114996
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German (de)
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Drazenko Dipl Ing Sukalo
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Priority to DE1996114996 priority Critical patent/DE19614996A1/en
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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45076Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45224Complementary Pl types having parallel inputs and being supplied in parallel
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/30Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor
    • H03F3/3066Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor the collectors of complementary power transistors being connected to the output
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45076Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45376Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using junction FET transistors as the active amplifying circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45236Two dif amps realised in MOS or JFET technology, one of them being of the p-channel type and the other one of the n-channel type, are coupled in parallel with their gates

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

The amplifier includes symmetrical outputs which phase shifts are as identical as possible with the phase shift of an input signal, when the input signal is supplied to one input only, while the other one is earthed. Each random selected transistor of the incorporated circuit has its own complementary transistor operated in the same static and dynamic working point. The signal paths from each input to the required output, from which the signal is passed, are theoretically mutually identical when earthing the other input. The output zero point error of the last amplifier stage remains the same irrespective of the number of DC series coupled amplifier stages.

Description

Die Erfindung betrifft einen Differenzverstärker mit symmetrischen Ausgängen. Durch seine Schaltungsanordnung soll erreicht werden, daß die Signale zu beiden Ausgängen mit der gleichen Phasenverschiebung übertragen werden. Diese Erfindung erhält ihre Bedeutung bei der symmetrischen Signalübertragung, in dem das Signal - die symmetrische Leitungen entlang - möglichst unempfindlich gegen den Einfluß äußerer Störsignale übertragen werden soll.The invention relates to a differential amplifier with balanced outputs. By its circuit arrangement is intended to ensure that the signals to both outputs be transmitted with the same phase shift. This invention receives its Importance in symmetrical signal transmission, in which the signal - the symmetrical lines along - as insensitive as possible to the influence of external Interference signals should be transmitted.

Beispiel: Beschreibung eines solchen Audio-Signalübertragungs-Systems in "Analog Devices-Amplifier Reference Manual 1992, Seite 4-201 bis 4-220".Example: Description of such an audio signal transmission system in "Analog Devices-Amplifier Reference Manual 1992, pages 4-201 to 4-220 ".

Dynamische Eigenschaften des realen Differenzverstärkers lassen sich leichter gemäß der vereinfachten Darstellung in Abb. 2 untersuchen. Wenn man den N-Eingang des Verstär­ kers an Masse anschließt und das Eingangssignal am P-Eingang einspeist, entsteht ein unsymmetrisch betriebener Differenzverstärker, der als Phasenumkehrstufe funktioniert. Widerstand Rq ist der Innenwiderstand der Signalquelle Uq. Beide Transistoren werden mit demselben Kollektorruhestrom betrieben, jedoch T1 in Basisschaltung und T2 in Emitterschaltung. Infolge der parasitären Kapazitäten nimmt der Betrag der Verstärkung mit der Frequenz zu und, wegen der ungleichen dynamischen Arbeitspunkte der Transistoren, entsteht eine Phasenverschiebung zwischen beiden Ausgangssignalen, weil das Signal durch die verschiedenen Wege zu den Ausgängen geleitet wird. Um eine möglichst hohe Ausgangs-Gleichtaktunterdrückung (Output-Common-Rejection Ratio) zu erreichen, man muß sicherstellen, daß keine zeitliche Verschiebung der beiden Signale gegeneinander auftritt, sondern, daß der Signalweg (qualitativ) der beiden Adern der Leitung gleichbleibt.Dynamic properties of the real differential amplifier can be examined more easily according to the simplified illustration in Fig. 2. If you connect the N input of the amplifier to ground and feed the input signal to the P input, an asymmetrically operated differential amplifier is created that functions as a phase inversion stage. Resistance Rq is the internal resistance of the signal source Uq. Both transistors are operated with the same collector quiescent current, but T1 in the basic circuit and T2 in the emitter circuit. As a result of the parasitic capacitances, the amount of amplification increases with frequency and, because of the unequal dynamic operating points of the transistors, there is a phase shift between the two output signals because the signal is passed through the different paths to the outputs. In order to achieve the highest possible common-mode rejection ratio (output common rejection ratio), one must ensure that there is no temporal shift between the two signals, but that the signal path (qualitative) of the two wires of the line remains the same.

Diese "unterschiedlichen Laufzeit" - Verzerrungen werden durch die Schaltungs­ anordnung des Verstärkers beseitigt, und zwar wie folgt:These "different runtime" distortions are caused by the circuit arrangement of the amplifier eliminated, as follows:

  • a) daß jeder beliebig ausgesuchte Transistor des Schaltbildes seinen komplementären Transistor hat, der in dem gleichen statischen und dynamischen Arbeitspunkt betrieben wird,a) that each arbitrarily selected transistor of the circuit diagram its complementary Transistor that operates in the same static and dynamic operating point becomes,
  • b) daß die Signalwege von jedem Eingang (während der andere auf der Masse liegt) zum gewünschten Ausgang - auf denen das Signal weitergeleitet wird - theoretisch unter­ einander gleich sind,b) that the signal paths from each input (while the other is on the ground) to desired output - on which the signal is forwarded - theoretically under are equal to each other,
  • c) daß, gleich wieviele Verstärkerstufen hintereinander gleichstromgekoppelt sind, der Ausgangsnullpunktfehler der letzten Stufe gleich bleibt.c) that no matter how many amplifier stages are DC coupled in series, the Output zero point error of the last stage remains the same.

Durch die Beschreibung des Anspruches unter Punkt a) und b) wird erreicht, daß jeder Ausgang als Signalgenerator gesehen ein gleiches Ersatzschaltbild besitzt. Man muß aber bemerken, daß die Elektronenbeweglichkeit im allgemeinen höher als die Löcherbewe­ glichkeit ist, somit ist es unmöglich, daß ein Komplementär-Transistorenpaar gleiche Eigenschaften hat. Die Beschreibung des Anspruches unter Punkt c) ermöglicht die Serienverknüpfung von mehreren Verstärkerstufen, um eine möglichst hohe CMRR zu erzielen. Da enge Toleranzen der Kondensatoren schwer zu erreichen sind, verwendet man nur Widerstände, die serienmäßig mit den Adern der Leitungen gekoppelt sind.The description of the claim under points a) and b) ensures that everyone Output seen as a signal generator has the same equivalent circuit. But you have to note that electron mobility is generally higher than the hole movement equality, so it is impossible for a complementary pair of transistors to be the same Has properties. The description of the claim under point c) enables Series linking of several amplifier stages in order to achieve the highest possible CMRR achieve. Because tight tolerances of the capacitors are difficult to achieve, used only resistors that are coupled with the wires of the cables as standard.

Die Funktionsweise eines polungsunabhängigen Differenzverstärkers mit symmetrischen Ausgängen wird gemaß seinem Schaltbild in Abb. 1 erklärt.The operation of a polarity-independent differential amplifier with balanced outputs is explained according to its circuit diagram in Fig. 1.

Die JFET-Transistorenpaare T1.1, T1.2 und T2.1, T2.2 bilden den Eingangsdifferenz­ verstärker. Um enge Paarungstoleranzen und eine hohe Symmetrie der Schaltung zu er­ reichen, sind monolithische Doppelfets erforderlich. Die Widerstände Rs bestimmen den fließenden Drainruhestrom der Eingangstransistoren.The JFET transistor pairs T1.1, T1.2 and T2.1, T2.2 form the input difference amplifier. In order to achieve close pairing tolerances and high circuit symmetry monolithic double fats are required. The resistances Rs determine the flowing drain quiescent current of the input transistors.

Zwei Transistoren unterscheiden sich bei gleichem Drainstrom immer in ihrer Gate- Source-Spannung. Daher und weil beide Eingänge auf Nullpotential liegen, werden die Drainströme nicht untereinander genau gleich sein. Demzufolge fließt durch die Wider­ stände Rg ein Ausgleichsstrom. Rg bestimmt außerdem die Differenzverstärkung. Das heißt, daß die Offsetspannung des Verstärkers nicht in der Eingangsstufe auf Null ausgeglichen ist. Dadurch gewinnt man den Vorteil, daß die Anordnung der Bau­ elemente im Eingangsdifferenzverstärker absolut symmetrisch ist.With the same drain current, two transistors always differ in their gate Source voltage. Therefore and because both inputs are at zero potential, the Drain currents are not exactly the same with each other. As a result, flows through the contra Rg would be a compensating current. Rg also determines the differential gain. The means that the offset voltage of the amplifier is not zero in the input stage is balanced. This gives the advantage that the arrangement of the construction elements in the input differential amplifier is absolutely symmetrical.

Legt man an beide Eingänge dieselbe Signalquelle (Gleichtaktaussteuerung), dann ist es aus Symmetriegründen möglich, die Widerstände Rg wegzulassen. Wenn man die Maschenregel auf die Eingangsschleife (mit der Voraussetzung Uds=konstant) verwendet, ergibt sich, daß bei dieser Betriebsart die Drainströme konstant bleiben, das heißt, die Gleichtaktverstärkung ist gleich Null.If you apply the same signal source (common mode control) to both inputs, then it is For reasons of symmetry, it is possible to omit the resistances Rg. If you have the Stitch rule on the input loop (with the requirement Uds = constant) used, it follows that the drain currents remain constant in this mode, the that is, the common mode gain is zero.

Erfindungsgemäß (PA unter a)), arbeitet jedes von den Transistorenpaaren T1.1 + T2.1, T1.2 + T2.2, T3.1 + T4.1, T3.2 + T4.2, ,T5.2 + T6.2 in dem gleichen statischen und dynamischen Arbeitspunkt. Die Transistorenpaare T3.x (die Transistoren T3.1 und T3.2), T4.x, T5.x und T6.x sind auch als Doppeltransistoren ausgeführt.According to the invention (PA under a)), each of the transistor pairs T1.1 + T2.1 works, T1.2 + T2.2, T3.1 + T4.1, T3.2 + T4.2,, T5.2 + T6.2 in the same static and dynamic working point. The transistor pairs T3.x (the transistors T3.1 and T3.2), T4.x, T5.x and T6.x are also designed as double transistors.

Um die Nullpunktfehler der Gesamtschaltung wegen der Eingangs-Offsetspannung zu kompensieren, dienen die Operationsverstärker OV1 und OV2, die als Integratoren arbeiten. Da die OV1 und OV2 einen NF-Zweig bilden, muß man die Zeitkonstante R3C so dimensionieren, daß die niedrigste Signalfrequenz noch voll übertragen wird. Auf diese Weise ist es möglich, mehrere Verstärkerstufen hintereinander galvanisch zu koppeln. To the zero point errors of the overall circuit due to the input offset voltage compensate, the operational amplifiers OV1 and OV2 serve as integrators work. Since the OV1 and OV2 form an NF branch, the time constant R3C must be used dimension so that the lowest signal frequency is still fully transmitted. To this It is possible to couple several amplifier stages in a galvanic manner.  

Im folgenden werden einige Anwendungsbeispiele der Erfindung anhand von Zeichnungen näher erläutert. Es zeigen:The following are some application examples of the invention with reference to Drawings explained in more detail. Show it:

Fig. 3 Audio Brückenendstufe Fig. 3 audio bridge amplifier

Wenn eine Leistungsendstufe größere Ausgangsströme und Ausgangsspannungen abgeben soll, stellt man die Endtransistoren vor große Anforderungen. Sie sollen gleich­ zeitig große Ströme und Spannungen aushalten können ohne die Transistoreigenschaften zu verschlechtern. Da solche Anforderungen schwer zu erreichen sind, besteht z. B. eine Möglichkeit, die Brückenschaltung zu verwenden, um die Spannung an den Endtransi­ storen zu halbieren.If a power output stage has larger output currents and output voltages output transistors, the end transistors face great challenges. You should be right away Can withstand large currents and voltages without the transistor properties to deteriorate. Since such requirements are difficult to achieve, there is e.g. Legs Possibility to use the bridge circuit to transfer the voltage to the final transi to cut in half.

Wegen der hohen Ausgangs-Gleichtaktunterdrückung ist ein extrem hoher Dämpfungs­ faktor in den Höhen ereichbar.Because of the high output common mode rejection is an extremely high attenuation factor can be reached in the heights.

Fig. 4 Symmetrische Signalübertragung Fig. 4 Symmetrical signal transmission

Der Verstärker V1 arbeitet als Phasenumkehrschaltung, also als "Leitungstreiber". Er gibt symmetrische Signale an die Leitung ab. Bei der relativ großen Länge der Leitungen empfiehlt es sich, das Signal zu verstärken und Gleichtaktstörsignale in den Leitungen zu unterdrücken. Diese Aufgabe erfüllt der Verstärker V2. Als Empfänger am Ende der Leitung dient der Verstärker V3 der als Differenzverstärker arbeitet und ein zweiphasiges Ausgangssignal liefert.The amplifier V1 works as a phase inversion circuit, ie as a "line driver". He gives balanced signals to the line. Given the relatively long length of the lines it is recommended to amplify the signal and common mode interference signals in the lines to suppress. This is the task of amplifier V2. As a recipient at the end of the The line serves the amplifier V3, which works as a differential amplifier and a two-phase Output signal delivers.

Claims (1)

Der polungsunabhängige Differenzverstärker ist ein Differenzverstärker mit symme­ trischen Ausgängen, bei dem die Phasenverschiebungen der beiden Ausgangssignale zum Eingangssignal, das nur auf einem von beiden Eingängen eingespeist ist (wenn der andere auf der Masse liegt), möglichst gleich sind und dessen Schaltungsanordnung dadurch gekennzeichnet ist,
  • a) daß jeder beliebig ausgesuchte Transistor des Schaltbildes seinen komplementären Transistor hat, der in dem gleichen statischen und dynamischen Arbeitspunkt betrieben wird,
  • b) daß die Signalwege von jedem Eingang (während der andere auf der Masse liegt) zum gewünschten Ausgang - auf denen das Signal weitergeleitet wird - theoretisch unter­ einander gleich sind,
  • c) daß, gleich wieviele Verstärkerstufen hintereinander gleichstromgekoppelt sind, der Ausgangsnullpunktfehler der letzten Stufe gleich bleibt.
The polarity-independent differential amplifier is a differential amplifier with symmetrical outputs, in which the phase shifts of the two output signals to the input signal, which is fed in only on one of the two inputs (when the other is on the ground), are as identical as possible and whose circuit arrangement is characterized by
  • a) that each arbitrarily selected transistor of the circuit diagram has its complementary transistor, which is operated in the same static and dynamic operating point,
  • b) that the signal paths from each input (while the other lies on ground) to the desired output - on which the signal is passed on - are theoretically identical to one another,
  • c) that no matter how many amplifier stages are DC-coupled in series, the output zero point error of the last stage remains the same.
DE1996114996 1996-04-16 1996-04-16 Polarity independent differential amplifier Withdrawn DE19614996A1 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8446201B2 (en) 2004-04-20 2013-05-21 Nxp B.V. High speed rail to rail phase splitter for providing a symmetrical differential output signal having low skew
DE102012005488A1 (en) 2012-03-19 2013-09-19 Drazenko Sukalo Composite-operational amplifier e.g. single-step difference trans-conductance amplifier, has connector formed as amplifier's inverted input, and main-forward signal path whose input is connected with output of auxiliary-forward signal path

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0204915A1 (en) * 1985-04-08 1986-12-17 Sony Corporation Balanced differential amplifier
DE3624207A1 (en) * 1985-07-18 1987-03-26 Sgs Microelettronica Spa SINGLE STAGE DIFFERENTIAL OPERATIONAL AMPLIFIER WITH HIGH IDLE GAIN
EP0234806A1 (en) * 1986-02-19 1987-09-02 Advanced Micro Devices, Inc. Full differential amplifier circuit and method for producing differential output signals
DE4002871C2 (en) * 1989-04-28 1993-10-07 Crystal Semiconductor Corp Low power amplifier output stage circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0204915A1 (en) * 1985-04-08 1986-12-17 Sony Corporation Balanced differential amplifier
DE3624207A1 (en) * 1985-07-18 1987-03-26 Sgs Microelettronica Spa SINGLE STAGE DIFFERENTIAL OPERATIONAL AMPLIFIER WITH HIGH IDLE GAIN
EP0234806A1 (en) * 1986-02-19 1987-09-02 Advanced Micro Devices, Inc. Full differential amplifier circuit and method for producing differential output signals
DE4002871C2 (en) * 1989-04-28 1993-10-07 Crystal Semiconductor Corp Low power amplifier output stage circuit

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Diskreter Klasse-A-Vorverstärker. In: Elektor 7-8/93, S.87,88 *
Solid-State Audio Power. In: Electronics World + Wireless World, Jan.1990, S.16-21 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8446201B2 (en) 2004-04-20 2013-05-21 Nxp B.V. High speed rail to rail phase splitter for providing a symmetrical differential output signal having low skew
DE102012005488A1 (en) 2012-03-19 2013-09-19 Drazenko Sukalo Composite-operational amplifier e.g. single-step difference trans-conductance amplifier, has connector formed as amplifier's inverted input, and main-forward signal path whose input is connected with output of auxiliary-forward signal path
DE102012005488B4 (en) * 2012-03-19 2014-05-15 Drazenko Sukalo Composite op-amp with parallel or serial architecture with active cancellation of nonlinearities

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