DE1959819A1 - Four-stroke generator - Google Patents

Description

The present invention relates to a four-cycle generator i'iir operation, more dynamic, with repetitive clock pulses operated logic circuits.

Logical circuits and memory elements which are operated with clock pulses are already known. So a bistabiele flip-flop, for example, been proposed gen ä, which once written information is constantly renewed by the clock operation with four staggered in time pulses. Flip-flops and logic links that are operated with clock pulses are usually built with MOS field effect transistors.

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MOS field effect transistors generally consist of one Semiconductor body from 1 ″, conduction type, in the one Surface side from at a certain distance from each other Zones of the 2nd line type are embedded. The surface area of the 1st conductivity type between the two named zones is covered with an insulating layer on which the control electrode is arranged. At each dear two zones of the 2nd type of conduction a main electrode is connected, which are often referred to as "drain" or "source electrode". MOS transistors mostly consist of single crystal Silicon while the insulating material located between the control electrode and the semiconductor surface mostly made of silicon dioxide.

The pulse sequence of pulses “0 to 0 ” shown in FIG. 1 is often required for the operation of a multivibrator or other logical links. The phase clock pulses 0 _Λ and 0 _O or 0 and 0, _t , which are generally used to charge and discharge capacitive components, each start at the same time, the pulse duration of 0 and 0 being greater than that of pulses 0 and 0, however .

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The required clock pulses have so far been generated outside of the circuit to be operated with the pulses and fed externally to the circuit. In the case of integrated solid-state circuits, this means that each semiconductor chip provided with a circuit to be controlled must have additional lines for connecting the clock pulses. Correspondingly, ir. The housing, which has the integrated solid-state circuit. contains k supply lines for cyclic operation alone.

The present invention is based on the task of reducing the number of clock lines and the possibility to create a portion of the required clock pulses in one integrated with the circuit to be operated Generating part of the generator.

These. The object is achieved in that the controlled current path of a field effect transistor (Q) is _{connected and operated in series with another non-linear switching element (Q 0} or D) in such a way that when a first input pulse is applied to a free electrode (1, 2 or »3) of the non-linear switching element (Q_

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or D) the output assigned to the field effect transistor

> output capacitance (C) is charged via the non-linear switching element, while this capacitance is discharged at the control electrode (k) of the field effect transistor when a second input pulse occurs at the control electrode (k), so that the connection between

• see the two components a third impulse occurs, ■

which begins with one of the input _{pulses (0 or, 0 O} ) and ends with the beginning of the other subsequent input pulse (0 or »0 ·), while a fourth clock pulse, which is shifted in time to the third pulse, by swapping the two input pulses (0 and 0) compared to the mode of operation selected when generating the third pulse, a second similar circuit consisting of a further field effect transistor (Q.,) and a non-linear switching element (Q, or »D ₀ ) is generated at the respective input electrodes«

The circuit according to the invention requires two input lines for two clock pulses offset in time, while the output of the circuit consists of k lines via which the pulse shown in FIG.

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._ ■ 5 -

follow -will «, Since the four-stroke generator according to the invention consists of components that can be easily integrated into a solid body, the clock generator can operate without technological Difficulties with being involved in the circuit to be operated, so that the number of leads reduced and the structure of the overall circuit can be simplified and cheaper. fl

The field effect transistor of the clock circuit is preferably a MOS field effect transistor with the semiconductor body isolated control electrode. Also, the non-linear switching element is used to make the circuit simple to ensure, consist in an advantageous embodiment of a MOS field effect transistor- The control electrode this second field effect transistor is then preferably with the free main electrode of the same ^

Field effect transistor short-circuited »

However, the non-linear switching element can also be in a particularly advantageous and 'simple embodiment are formed by a diode, which is connected in series with the controlled current path of the field effect transistor

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This means that the diode turns on when a pulse occurs the free electrode of the diode is conductive. Such an arrangement has the advantage that the field effect transistor The associated capacitance is quickly charged via the diode willo

The four-stroke generator is explained in more detail below with reference to FIGS.

In FIG. 2, a semiconductor wafer 7 is shown schematically, which consists of two parts 8 and 11. Part 8 contains the logic circuit to be operated, for example a flip-flop, the components and the leads to this flip-flop not being shown. This logic circuit is operated with the pulses 0 to 0 coming out of the generator part 11. The generator part Ho is used to generate the pulses 0 _{p and 0.} With the help of a first circuit 10, the pulse 0 _{O is} obtained, while a second circuit 9 is used to generate the pulse 0,

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In Figures 3 and k it is shown how the circuit parts 10 and 9 can be implemented. The circuit of Figures 3a consists of zv. · ■ I MOS transistors Q and Qj whose controlled current paths are connected in series "The MOS field-effect transistor Q has a capacitance C, resulting from the output capacitance of the in the figure 3a illustrated circuit stage, from the link capacity and of Λ of the input capacitance of the following Composed of stages. The control electrode Γ of the MOS field effect transistor Q _p is short-circuited with the main electrode 2 that is still free from this field effect transistor. The free main electrodes 2 and 6 of the two series-connected MOS transistors Q and Q are generally connected to one another. The circuit 10, with which the pulse 0 is generated, works as follows?

When applying the pulse 0 to the main electrode of the Transistor Q, and thus at the same time at its control electrode 1, transistor Q becomes conductive and capacitance C becomes conductive thus almost charged to the voltage of the impulse 0 via this transistor »After the impulse 0 ends is, the potential at the capacitance C is retained, there

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Both MCKj transistors Q and Q are blocked. The potential 0 is applied to both control electrodes 1 and k of the two MOS transistors. When the pulse 0 "occurs at the control electrode k of the transistor Q, the latter becomes conductive, so that the capacitance C is discharged via the transistor Q with a certain time constant. Thus, a pulse occurs at the capacitance C and thus at the connecting electrode 5 between the two components, which begins with the pulse 0 and ends with the beginning of the pulse 0. This output pulse corresponds to the pulse 0 shown in Figures 1 and 3b and required for the operation of a logic circuit ,

The pulse 0 is obtained, as shown in FIG. Ka, with a circuit 9 which is identical to the circuit shown in FIG Q is assigned the capacity C. There is only one difference from the circuit according to FIG. "} A in the mode of operation, the two input pulses now being interchanged with respect to the mode of operation required for generating the pulse 0 at the respective input electrodes. The pulse 0 is therefore sent to the main electrode 2 of the Transistor Q ₁

and thus also applied to its control electrode 1. the

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Capacitance C can therefore only be charged and discharged with the beginning of Impuls.es 0_ via transistor Q1

then again when the control electrode 4 of the Transistor the input pulse Q occurs, through which the Transistor Q becomes conductive, and thus a discharge current

path for the capacity C forms.

In this way, the ^ shown in FIG. 4b arises

ImPi ¹ Ls 0 _t at the connection electrode 5 between the two components Q 1 and Q 1, which begins with the pulse 0 and ends with the beginning of the 0 pulse.

In FIGS. 5 and 5b, circuits are shown which are equivalent in their mode of operation to the circuits shown in FIGS. 3a and 4a. In the circuits according to FIG. 5, the transistors Q and

Q. from the circuits of FIGS. 3a and 4a by means of diodes A.

I) or D _n replaced. The diode is connected in series to the controlled current path of the field effect transistor Q or Q that when a pulse occurs at the free electrode of the diode 3 or 3, this diode becomes conductive. If, therefore, a pulse 0 characterized by a negative potential U / occurs at electrode 3, then so

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the capacitance C charges through the diode D to the Forward voltage of the diode reduced pulse potential on. At the end of the pulse 0, the diode goes back into the locking state. Since the transistor Q. remains blocked, the capacitor C can no longer discharge. An unloading possibility is only given again, when an input pulse 0 occurs at the input electrode 4 of the MOS transistor Q, through which this transistor Q becomes conductive. In this case, the capacitance C discharges through the MOS field effect transistor Q. At the Connection electrode 5 between the diode and the MOS field effect transistor can thus be a pulse 0 of the in the figure 3t> shown form can be removed. Corresponding applies to the generation of the pulse 0. with an identical one from the diode D and the MOS field effect transistor Q existing circuit. Here, too, the pulses 0 and 0 are interchanged, so that the capacitance

C charged with the beginning of the pulse 0 and with the loading

start of the pulse 0 at the control electrode ¹ I of the transistor Q "is discharged again. In such an operating mode of the circuit shown on the right in FIG. 5, the pulse 0 _t according to FIG. ^ B is obtained. The diode

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D or D can also be replaced by another non-linear 1 £

Switching element, for example by a bipolar

Transistor, to be replaced.

In the erfindungssemäßen four clock generator is essential that the generator now, Λ can be integrated in a common semiconductor body with INTEGI .rten logic operations that are to be operated with clock pulses. This generator then has two input lines for the input pulses 0 and 0. and k output lines for the input and output pulses 0, 0, 0 and

1 2 3

0. on. The integrated logic links then preferably also consist of MOS field effect transistors with an insulated control electrode, which of course can be combined with other conventional components if necessary can be combined.

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Claims (7)

Pa ten t an s ρ r ü c h β / Fourth ale t gen ei ~ a tor ..for the operation of dynamic logic circuits operated with ^ P repeating clock pulses, characterized in that the controlled current path of a field effect transistor (Q) with a further non-linear switching element (Q 'or D) is connected in series in such and operated such that upon application of a first input pulse to a free electrode of the non-linear switching element (Q or D) which is _Ä charged the field effect transistor associated with output capacitance (C) via the non-linear switching element (l, 2 3 respectively) , while this capacitance is discharged when a second input pulse occurs at the control electrode (k) of the field effect transistor, which is shifted in time from the first pulse, so that a third pulse occurs at the connection between the two components, which with one of the input pulses (0, 0 ) begins and with the beginning of the other subsequent input 109823/1 597 pulse (0 ", 0) ends, while a fourth clock pulse, which is shifted in time to the third pulse, by interchanging the two input pulses (0, 0) with respect to the mode of operation selected for the generation of the third pulse at the respective input electrodes of a second similar, is generated from a further field effect transistor (Q) and a non-linear switching element ™ (Q ,, or D _n ) existing circuit. 2) four-stroke generator according to claim 1, characterized marked. net that the field effect transistor (Q, Q.) is a MOS field effect transistor with a control electrode (k) isolated from the semiconductor body. 3) four-cycle generator ntich claim 1, characterized in that the non-linear "switching element (Q _p , Q ^) is a MOS Λ field effect transistor with a control electrode (l) isolated from the semiconductor body, and that the control electrode (l) with the free main electrode (2 ) of the field effect transistor (Q ₉ IQ / ') is short-circuited « 109823/1597 4) Four-stroke generator according to claim 1, characterized in that the non-linear switching element (D, D) is a diode is that so with the controlled current path of the field effect transistor (Q ,,., Q “) is connected in series that the diode when a pulse occurs on the free one Electrode (3) of the diode is conductive. 5) Four-cycle generator according to claim 1, characterized in that the output associated with the field effect transistor. output capacitance (C) from the output capacitance of the transistor, the connection capacitance and the input capacitance the next level. 6) Four-cycle generator according to one of the preceding claims, characterized in that the generator with integrated logic operations, which are operated with clock pulses, is accommodated in a common semiconductor body, and that this generator has two input lines for the input pulses (0, 0 ) and four output lines for diu output pulses (0., 0 ₂ , 0 , 0 _ijt ). 7) Viertaktgeneraotr according to claim 6 _S, characterized in that the logical links also with MOS-PeId- 109823/1597 Effect transistors built with an isolated control electrode are. 109823/1597 Blank page